mirror of git://gcc.gnu.org/git/gcc.git
Daily bump.
This commit is contained in:
GCC Administrator
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2fcb0c0795
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gcc/ChangeLog
356
gcc/ChangeLog
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@ -1,3 +1,359 @@
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2025-01-20 Vladimir N. Makarov <vmakarov@redhat.com>
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PR target/118560
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* lra-constraints.cc (invalid_mode_reg_p): Exchange args in
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hard_reg_set_subset_p call.
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2025-01-20 Jeff Law <jlaw@ventanamicro.com>
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PR target/114442
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* config/riscv/xiangshan.md: Add missing insn types to a
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new dummy insn reservation.
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2025-01-20 Jeff Law <jlaw@ventanamicro.com>
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PR target/116256
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* config/riscv/riscv.md (reassocating constant addition): Adjust
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condition to avoid creating an unrecognizable insn.
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2025-01-20 Denis Chertykov <chertykov@gmail.com>
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PR rtl-optimization/117868
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* lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Reuse slots
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only without allocated memory or only with equal or smaller registers
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with equal or smaller alignment.
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(lra_spill): Print slot size as width.
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2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
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PR tree-optimization/118348
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* tree-vectorizer.cc (vec_info::move_dr): Copy
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STMT_VINFO_SIMD_LANE_ACCESS_P.
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2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
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Revert:
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2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
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PR tree-optimization/118384
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* tree-vectorizer.cc (vec_info::move_dr): Copy
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STMT_VINFO_SIMD_LANE_ACCESS_P.
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2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
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PR tree-optimization/118384
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* tree-vectorizer.cc (vec_info::move_dr): Copy
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STMT_VINFO_SIMD_LANE_ACCESS_P.
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2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
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PR target/118501
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* config/aarch64/aarch64.md (@xorsign<mode>3): Use
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force_lowpart_subreg.
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2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
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PR target/118531
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* config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
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(*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>)
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(*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Add missing
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simd requirements.
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2025-01-20 Jin Ma <jinma@linux.alibaba.com>
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* config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>):
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Change GPR2 to X.
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(*th_cond_mov<GPR:mode>): Likewise.
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2025-01-20 Andrew Pinski <quic_apinski@quicinc.com>
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PR tree-optimization/118077
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PR tree-optimization/117668
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* tree-inline.cc (fold_marked_statements): Purge abnormal edges
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as needed.
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2025-01-20 Richard Biener <rguenther@suse.de>
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PR tree-optimization/117875
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* tree-vect-slp.cc (vect_build_slp_tree_1): Handle SSA copies.
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2025-01-20 Xi Ruoyao <xry111@xry111.site>
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PR target/115921
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* config/loongarch/loongarch-protos.h
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(loongarch_reassoc_shift_bitwise): New function prototype.
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* config/loongarch/loongarch.cc
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(loongarch_reassoc_shift_bitwise): Implement.
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* config/loongarch/loongarch.md
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(*alslsi3_extend_subreg): New define_insn_and_split.
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(<any_bitwise:optab>_shift_reverse<X:mode>): New
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define_insn_and_split.
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(<any_bitwise:optab>_alsl_reversesi_extended): New
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define_insn_and_split.
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(zero_extend_ashift): Remove as it's just a special case of
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and_shift_reversedi, and it does not make too much sense to
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write "alsl.d rd,rs,r0,shamt" instead of "slli.d rd,rs,shamt".
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(bstrpick_alsl_paired): Remove as it is already done by
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splitting and_shift_reversedi into and + ashift first, then
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late combining the ashift and a further add.
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2025-01-20 Xi Ruoyao <xry111@xry111.site>
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* config/loongarch/constraints.md (Yy): New define_constriant.
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* config/loongarch/loongarch.cc (loongarch_print_operand):
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For "%M", output the index of bits to be used with
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bstrins/bstrpick.
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* config/loongarch/predicates.md (ins_zero_bitmask_operand):
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Exclude low_bitmask_operand as for low_bitmask_operand it's
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always better to use bstrpick instead of bstrins.
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(and_operand): New define_predicate.
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* config/loongarch/loongarch.md (any_or): New
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define_code_iterator.
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(bitwise_operand): New define_code_attr.
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(*<optab:any_or><mode:GPR>3): New define_insn.
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(*and<mode:GPR>3): New define_insn.
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(<optab:any_bitwise><mode:X>3): New define_expand.
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(and<mode>3_extended): Remove, replaced by the 3rd alternative
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of *and<mode:GPR>3.
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(bstrins_<mode>_for_mask): Remove, replaced by the 4th
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alternative of *and<mode:GPR>3.
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(*<optab:any_bitwise>si3_internal): Remove, already covered by
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the *<optab:any_or><mode:GPR>3 and *and<mode:GPR>3 templates.
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2025-01-20 Richard Biener <rguenther@suse.de>
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PR tree-optimization/118552
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* cfgloopmanip.cc (fix_loop_placement): Properly mark
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exit source blocks as to be scanned for LC SSA update when
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the loops nesting relationship changed.
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(fix_loop_placements): Adjust.
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(fix_bb_placements): Likewise.
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2025-01-20 Thomas Schwinge <tschwinge@baylibre.com>
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* config/nvptx/t-nvptx (MULTILIB_OPTIONS): Don't add 'mptx=3.1' if
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neither sm_30 nor sm_35 multilib variant is built.
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2025-01-20 Jakub Jelinek <jakub@redhat.com>
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PR c++/118509
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* tree.cc (tree_invariant_p_1): Return true for TARGET_EXPR too.
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2025-01-20 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/118224
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* tree-ssa-dce.cc (is_removable_allocation_p): Multiply a1 by a2
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instead of adding it.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def (s390_vec_load_len): Deprecate
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some overloads.
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(s390_vec_store_len): Deprecate some overloads.
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(s390_vec_load_len_r): Add.
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(s390_vec_store_len_r): Add.
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* config/s390/s390-c.cc (s390_vec_load_len_r): Add.
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(s390_vec_store_len_r): Add.
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* config/s390/vecintrin.h (vec_load_len_r): Redefine.
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(vec_store_len_r): Redefine.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def: Add 128-bit variants.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/vector.md (<vec_shifts_name><mode>3): Add 128-bit
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variants.
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* config/s390/vx-builtins.md: Ditto.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def: Add 128-bit variants and remove
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bool variants.
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* config/s390/s390-builtin-types.def: Update accordinly.
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* config/s390/s390.md: Emulate min/max for GPR.
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* config/s390/vector.md: Add min/max patterns and emulate in
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case of no VXE3.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def (s390_vec_abs_s128): Add.
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(s390_vlpq): Add.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/vector.md (abs<mode>2): Emulate w/o VXE3.
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(*abs<mode>2): Add 128-bit variant.
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(*vec_sel0<mode>): Make it a ...
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(vec_sel0<mode>): named pattern.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def: Add 128-bit variants.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/s390.cc (s390_expand_vec_compare_cc): Also
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consider TI modes for vectors.
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* config/s390/vector.md: Enable *vec_cmp et al. for VXE3.
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* config/s390/vx-builtins.md: Ditto.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/vector.md (div<mode>3): Add.
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(udiv<mode>3): Add.
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(mod<mode>3): Add.
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(umod<mode>3): Add.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def (s390_vec_cntlz): Add 128-bit
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integer overloads.
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(s390_vclzq): Add.
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(s390_vec_cnttz): Add 128-bit integer overloads.
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(s390_vctzq): Add.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/s390.h (CTZ_DEFINED_VALUE_AT_ZERO): Define.
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* config/s390/s390.md (*clzg): New insn.
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(clztidi2): Exploit new insn for target arch15.
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(ctzdi2): New insn.
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* config/s390/vector.md (clz<mode>2): Extend modes including
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128-bit integer.
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(ctz<mode>2): Likewise.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def (s390_vec_gen_element_masks_128): Add.
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(s390_vgemb): Add.
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(s390_vgemh): Add.
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(s390_vgemf): Add.
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(s390_vgemg): Add.
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(s390_vgemq): Add.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/s390.md (UNSPEC_VEC_VGEM): Add.
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* config/s390/vecintrin.h (vec_gen_element_masks_8): Define.
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(vec_gen_element_masks_16): Define.
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(vec_gen_element_masks_32): Define.
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(vec_gen_element_masks_64): Define.
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(vec_gen_element_masks_128): Define.
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* config/s390/vx-builtins.md (vgemv16qi): Add.
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(vgem<mode>): Add.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def (s390_vec_evaluate): Add.
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(s390_veval): Add.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/s390.md (UNSPEC_VEC_VEVAL): Add.
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* config/s390/vecintrin.h (vec_evaluate): Define.
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* config/s390/vector.md
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(*veval<mode>_<logic_op1:logic_op_stringify><logic_op2:logic_op_stringify>):
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Add.
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(veval<mode>): Add.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def (s390_vec_blend): Add.
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(s390_vblendb): Add.
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(s390_vblendh): Add.
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(s390_vblendf): Add.
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(s390_vblendg): Add.
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(s390_vblendq): Add.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/s390.md (UNSPEC_VEC_VBLEND): Add.
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* config/s390/vecintrin.h (vec_blend): Define.
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* config/s390/vx-builtins.md (vblend<mode>): Add.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def (s390_bdepg): Add.
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(s390_bextg): Add.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/s390.md (UNSPEC_BDEPG): Add.
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(UNSPEC_BEXTG): Add.
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(bdepg): Add.
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(bextg): Add.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390.md (*lxa<LXAMODE>_index): Add.
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(*lxa<LXAMODE>_displacement_index): Add.
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(*lxa<LXAMODE>_index_base): Add.
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(*lxa<LXAMODE>_displacement_index_base): Add.
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(*lxab_displacement_index_base): Add.
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(*llxa<LXAMODE>_displacement_index): Add.
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(*llxa<LXAMODE>_index_base): Add.
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(*llxa<LXAMODE>_displacement_index_base): Add.
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(*llxab_displacement_index_base): Add.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
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* config/s390/s390-builtins.def: Add new instruction variants.
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* config/s390/s390-builtin-types.def: Update accordingly.
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* config/s390/vecintrin.h: Add new defines.
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* config/s390/vector.md: Adapt insns for new instruction
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variants.
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* config/s390/vx-builtins.md: Ditto.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
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* config/s390/s390-builtins.def (B_VXE3): Define.
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(B_ARCH15): Define.
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* config/s390/s390-c.cc (s390_resolve_overloaded_builtin):
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Consistency checks for VXE3.
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* config/s390/s390.cc (s390_expand_builtin): Consistency checks
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for VXE3.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
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* config/s390/s390-c.cc (rid_int128): New helper function.
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(s390_macro_to_expand): Deal with `vector __int128`.
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(s390_cpu_cpp_builtins_internal): Bump __VEC__.
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* config/s390/s390.cc (s390_handle_vectorbool_attribute): Add
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128-bit bool zvector.
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2025-01-20 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
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* common/config/s390/s390-common.cc: Add arch15 processor flags.
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* config.gcc: Add arch15 for options --with-{arch,mtune}.
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* config/s390/driver-native.cc (s390_host_detect_local_cpu):
|
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Default to arch15.
|
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* config/s390/s390-opts.h (enum processor_type): Add
|
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PROCESSOR_ARCH15.
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* config/s390/s390.cc (processor_table,s390_issue_rate,
|
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s390_get_sched_attrmask,s390_get_unit_mask): Add arch15.
|
||||
* config/s390/s390.h (enum processor_flags): Add processor flags
|
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for VXE3 and ARCH15.
|
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(TARGET_CPU_VXE3): Define.
|
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(TARGET_CPU_VXE3_P): Define.
|
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(TARGET_CPU_ARCH15): Define.
|
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(TARGET_CPU_ARCH15_P): Define.
|
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(TARGET_VXE3): Define.
|
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(TARGET_VXE3_P): Define.
|
||||
(TARGET_ARCH15): Define.
|
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(TARGET_ARCH15_P): Define.
|
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* config/s390/s390.md: Add VXE3 and ARCH15 to cpu_facility, and
|
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let attribute "enabled" deal with them.
|
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* config/s390/s390.opt: Add arch15.
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||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
|
||||
|
||||
* config/s390/vecintrin.h: Sort definitions.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
|
||||
|
||||
* config/s390/vector.md: Stay scalar for TOINTVEC/tointvec.
|
||||
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||||
2025-01-20 Kito Cheng <kito.cheng@sifive.com>
|
||||
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* config.gcc (riscv*): Install sifive_vector.h.
|
||||
* config/riscv/sifive_vector.h: New.
|
||||
|
||||
2025-01-20 Hongyu Wang <hongyu.wang@intel.com>
|
||||
|
||||
PR target/118510
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* config/i386/i386.md (*x86_64_shld_ndd_2): Use register_operand
|
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for operand[0] and adjust the output template to directly
|
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generate ndd form shld pattern.
|
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(*x86_shld_ndd_2): Likewise.
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(*x86_64_shrd_ndd_2): Likewise.
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(*x86_shrd_ndd_2): Likewise.
|
||||
|
||||
2025-01-19 Uros Bizjak <ubizjak@gmail.com>
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||||
* config/i386/i386.md (*movdi_internal): Reorder ISA attribute
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|
|
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@ -1 +1 @@
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20250120
|
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20250121
|
||||
|
|
|
|||
|
|
@ -1,3 +1,15 @@
|
|||
2025-01-20 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR c++/118528
|
||||
* c-common.cc (make_tree_vector_from_ctor): Expand RAW_DATA_CST
|
||||
elements from the CONSTRUCTOR to individual INTEGER_CSTs.
|
||||
|
||||
2025-01-20 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR c++/118509
|
||||
* c-omp.cc (c_finish_omp_for): Handle TARGET_EXPR in first operand
|
||||
of COMPOUND_EXPR incr the same as SAVE_EXPR.
|
||||
|
||||
2025-01-16 Sandra Loosemore <sloosemore@baylibre.com>
|
||||
|
||||
* c-attribs.cc (c_common_gnu_attributes): Delete "omp declare
|
||||
|
|
|
|||
|
|
@ -1,3 +1,16 @@
|
|||
2025-01-20 Nathaniel Shead <nathanieloshead@gmail.com>
|
||||
|
||||
* parser.cc (cp_parser_decomposition_declaration): Check linkage
|
||||
of structured bindings in modules.
|
||||
* tree.cc (decl_linkage): Structured bindings don't necessarily
|
||||
have no linkage.
|
||||
|
||||
2025-01-20 Nathaniel Shead <nathanieloshead@gmail.com>
|
||||
|
||||
PR c++/118101
|
||||
* module.cc (trees_in::decl_value): Use structural equality when
|
||||
deduping partial specs with mismatching canonical types.
|
||||
|
||||
2025-01-18 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR c++/118513
|
||||
|
|
|
|||
|
|
@ -1,3 +1,10 @@
|
|||
2025-01-20 Iain Buclaw <ibuclaw@gdcproject.org>
|
||||
|
||||
PR d/114434
|
||||
* expr.cc (ExprVisitor::visit (PtrExp *)): Get the offset as a
|
||||
dinteger_t rather than a size_t.
|
||||
(ExprVisitor::visit (SymOffExp *)): Likewise.
|
||||
|
||||
2025-01-18 Iain Buclaw <ibuclaw@gdcproject.org>
|
||||
|
||||
* dmd/MERGE: Merge upstream dmd d115713410.
|
||||
|
|
|
|||
|
|
@ -1,3 +1,15 @@
|
|||
2025-01-20 Harald Anlauf <anlauf@gmx.de>
|
||||
|
||||
PR fortran/107122
|
||||
* openmp.cc (resolve_omp_clauses): Add 'with' to error message text.
|
||||
|
||||
2025-01-20 Harald Anlauf <anlauf@gmx.de>
|
||||
|
||||
PR fortran/81978
|
||||
* trans-array.cc (gfc_conv_array_parameter): Do not copy back data
|
||||
if actual array parameter has the PARAMETER attribute.
|
||||
* trans-expr.cc (gfc_conv_subref_array_arg): Likewise.
|
||||
|
||||
2025-01-16 Tobias Burnus <tburnus@baylibre.com>
|
||||
|
||||
PR fortran/118321
|
||||
|
|
|
|||
|
|
@ -1,3 +1,7 @@
|
|||
2025-01-20 Joseph Myers <josmyers@redhat.com>
|
||||
|
||||
* zh_CN.po: Update.
|
||||
|
||||
2024-12-03 Joseph Myers <josmyers@redhat.com>
|
||||
|
||||
* zh_CN.po: Update.
|
||||
|
|
|
|||
|
|
@ -1,3 +1,195 @@
|
|||
2025-01-20 Nathaniel Shead <nathanieloshead@gmail.com>
|
||||
|
||||
* g++.dg/modules/export-6.C: Add structured binding tests.
|
||||
* g++.dg/modules/hdr-2.H: Likewise.
|
||||
|
||||
2025-01-20 Nathaniel Shead <nathanieloshead@gmail.com>
|
||||
|
||||
PR c++/118101
|
||||
* g++.dg/modules/partial-7.h: New test.
|
||||
* g++.dg/modules/partial-7_a.C: New test.
|
||||
* g++.dg/modules/partial-7_b.C: New test.
|
||||
* g++.dg/modules/partial-7_c.C: New test.
|
||||
|
||||
2025-01-20 Jeff Law <jlaw@ventanamicro.com>
|
||||
|
||||
PR target/116256
|
||||
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: Update expected
|
||||
output.
|
||||
* gcc.target/riscv/rvv/vsetvl/vsetvl-15.c: Likewise.
|
||||
|
||||
2025-01-20 Jeff Law <jlaw@ventanamicro.com>
|
||||
|
||||
PR target/114442
|
||||
* gcc.target/riscv/pr114442.c: New test.
|
||||
|
||||
2025-01-20 Harald Anlauf <anlauf@gmx.de>
|
||||
|
||||
PR fortran/107122
|
||||
* gfortran.dg/gomp/order-8.f90: Adjust pattern.
|
||||
|
||||
2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
PR tree-optimization/118348
|
||||
* gcc.target/aarch64/pr118348_1.c: New test.
|
||||
* gcc.target/aarch64/pr118348_2.c: Likewise.
|
||||
|
||||
2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
Revert:
|
||||
2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
PR tree-optimization/118384
|
||||
* gcc.target/aarch64/pr118384_1.c: New test.
|
||||
* gcc.target/aarch64/pr118384_2.c: Likewise.
|
||||
|
||||
2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
PR tree-optimization/118384
|
||||
* gcc.target/aarch64/pr118384_1.c: New test.
|
||||
* gcc.target/aarch64/pr118384_2.c: Likewise.
|
||||
|
||||
2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
PR target/118501
|
||||
* gcc.c-torture/compile/pr118501.c: New test.
|
||||
|
||||
2025-01-20 Richard Sandiford <richard.sandiford@arm.com>
|
||||
|
||||
* gcc.target/aarch64/ins_bitfield_1a.c: New test.
|
||||
* gcc.target/aarch64/ins_bitfield_3a.c: Likewise.
|
||||
* gcc.target/aarch64/ins_bitfield_5a.c: Likewise.
|
||||
|
||||
2025-01-20 Harald Anlauf <anlauf@gmx.de>
|
||||
|
||||
PR fortran/81978
|
||||
* gfortran.dg/pr81978.f90: New test.
|
||||
|
||||
2025-01-20 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR c++/118528
|
||||
* g++.dg/cpp/embed-21.C: New test.
|
||||
* g++.dg/cpp2a/class-deduction-aggr16.C: New test.
|
||||
|
||||
2025-01-20 Jin Ma <jinma@linux.alibaba.com>
|
||||
|
||||
* gcc.target/riscv/xtheadcondmov-bug.c: New test.
|
||||
|
||||
2025-01-20 Andrew Pinski <quic_apinski@quicinc.com>
|
||||
|
||||
PR tree-optimization/118077
|
||||
PR tree-optimization/117668
|
||||
* g++.dg/opt/devirt6.C: New test.
|
||||
|
||||
2025-01-20 Christophe Lyon <christophe.lyon@linaro.org>
|
||||
|
||||
* gcc.dg/vect/complex/fast-math-bb-slp-complex-mla-float.c: Use
|
||||
arm_v8_3a_complex_neon.
|
||||
|
||||
2025-01-20 Christophe Lyon <christophe.lyon@linaro.org>
|
||||
|
||||
* gcc.dg/vect/complex/complex-operations-run.c: Remove duplicate
|
||||
dg-add-options arm_v8_3a_complex_neon.
|
||||
* gcc.dg/vect/complex/fast-math-bb-slp-complex-add-pattern-double.c:
|
||||
Likewise.
|
||||
|
||||
2025-01-20 Xi Ruoyao <xry111@xry111.site>
|
||||
|
||||
PR target/115921
|
||||
* gcc.target/loongarch/bstrpick_alsl_paired.c (scan-rtl-dump):
|
||||
Scan for and_shift_reversedi instead of the removed
|
||||
bstrpick_alsl_paired.
|
||||
* gcc.target/loongarch/bitwise-shift-reassoc.c: New test.
|
||||
|
||||
2025-01-20 Xi Ruoyao <xry111@xry111.site>
|
||||
|
||||
* gcc.c-torture/compile/pr116438.c: Rename to ...
|
||||
* gcc.c-torture/compile/pr116348.c: ... this.
|
||||
|
||||
2025-01-20 Richard Biener <rguenther@suse.de>
|
||||
|
||||
PR tree-optimization/118552
|
||||
* gcc.dg/torture/pr118552.c: New testcase.
|
||||
|
||||
2025-01-20 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR c++/118509
|
||||
* g++.dg/expr/pmf-4.C: New test.
|
||||
|
||||
2025-01-20 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR tree-optimization/118224
|
||||
* gcc.dg/pr118224.c: New test.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
|
||||
|
||||
* gcc.target/s390/vector/vec-shift-10.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-11.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-12.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-3.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-4.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-5.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-6.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-7.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-8.c: New test.
|
||||
* gcc.target/s390/vector/vec-shift-9.c: New test.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
|
||||
|
||||
* gcc.target/s390/vector/vec-max-emu.c: New test.
|
||||
* gcc.target/s390/vector/vec-min-emu.c: New test.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
|
||||
|
||||
* gcc.target/s390/vector/vec-abs-emu.c: New test.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
|
||||
|
||||
* gcc.target/s390/vxe3/vd-1.c: New test.
|
||||
* gcc.target/s390/vxe3/vd-2.c: New test.
|
||||
* gcc.target/s390/vxe3/vdl-1.c: New test.
|
||||
* gcc.target/s390/vxe3/vdl-2.c: New test.
|
||||
* gcc.target/s390/vxe3/vr-1.c: New test.
|
||||
* gcc.target/s390/vxe3/vr-2.c: New test.
|
||||
* gcc.target/s390/vxe3/vrl-1.c: New test.
|
||||
* gcc.target/s390/vxe3/vrl-2.c: New test.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
|
||||
|
||||
* gcc.target/s390/vxe3/veval-1.c: New test.
|
||||
* gcc.target/s390/vxe3/veval-2.c: New test.
|
||||
* gcc.target/s390/vxe3/veval-3.c: New test.
|
||||
* gcc.target/s390/vxe3/veval-4.c: New test.
|
||||
* gcc.target/s390/vxe3/veval-5.c: New test.
|
||||
* gcc.target/s390/vxe3/veval-6.c: New test.
|
||||
* gcc.target/s390/vxe3/veval-7.c: New test.
|
||||
* gcc.target/s390/vxe3/veval-8.c: New test.
|
||||
* gcc.target/s390/vxe3/veval-9.c: New test.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
|
||||
|
||||
* gcc.target/s390/llxa-1.c: New test.
|
||||
* gcc.target/s390/llxa-2.c: New test.
|
||||
* gcc.target/s390/llxa-3.c: New test.
|
||||
* gcc.target/s390/lxa-1.c: New test.
|
||||
* gcc.target/s390/lxa-2.c: New test.
|
||||
* gcc.target/s390/lxa-3.c: New test.
|
||||
* gcc.target/s390/lxa-4.c: New test.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
|
||||
|
||||
* lib/target-supports.exp: VXE3 effective target check.
|
||||
|
||||
2025-01-20 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
|
||||
|
||||
* gcc.target/s390/s390.exp: Set compiler flags for the vxe3
|
||||
subdirectory of the testsuite as done e.g. for vxe2.
|
||||
|
||||
2025-01-20 Hongyu Wang <hongyu.wang@intel.com>
|
||||
|
||||
PR target/118510
|
||||
* gcc.target/i386/pr118510.c: New test.
|
||||
|
||||
2025-01-19 Uros Bizjak <ubizjak@gmail.com>
|
||||
|
||||
PR rtl-optimization/118067
|
||||
|
|
|
|||
|
|
@ -1,3 +1,11 @@
|
|||
2025-01-20 Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>
|
||||
|
||||
PR libstdc++/118185
|
||||
PR libstdc++/100249
|
||||
* include/bits/ranges_algo.h (__clamp_fn): Correctly forward the
|
||||
projected value to the comparator.
|
||||
* testsuite/25_algorithms/clamp/118185.cc: New test.
|
||||
|
||||
2025-01-16 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
PR libstdc++/99995
|
||||
|
|
|
|||
Loading…
Reference in New Issue