ft32.opt (mnodiv): New.

* config/ft32/ft32.opt (mnodiv): New.
	* config/ft32/ft32.md (*divsi3, *modsi3): Qualify with
	TARGET_NODIV.
	* doc/invoke.texi (FT32 Options -mnodiv): New.
        * libgcc/config/ft32/lib1funcs.S (*divsi3, *modsi3): New.

From-SVN: r234516

gcc/ChangeLog

@@ -1,3 +1,10 @@
+2016-03-28  James Bowman  <james.bowman@ftdichip.com>
+
+	* config/ft32/ft32.opt (mnodiv): New.
+	* config/ft32/ft32.md (*divsi3, *modsi3): Qualify with
+	TARGET_NODIV.
+	* doc/invoke.texi (FT32 Options -mnodiv): New.
+
 2016-03-28  Kirill Yukhin  <kirill.yukhin@intel.com>
 
 	 PR target/70406

gcc/config/ft32/ft32.md

@@ -101,7 +101,7 @@
           (div:SI
            (match_operand:SI 1 "register_operand" "r,r")
            (match_operand:SI 2 "ft32_rimm_operand" "r,KA")))]
-  ""
+  "!TARGET_NODIV"
   "div.l  %0,%1,%2")
 
 (define_insn "modsi3"
@@ -109,7 +109,7 @@
           (mod:SI
            (match_operand:SI 1 "register_operand" "r,r")
            (match_operand:SI 2 "ft32_rimm_operand" "r,KA")))]
-  ""
+  "!TARGET_NODIV"
   "mod.l  %0,%1,%2")
 
 (define_insn "udivsi3"
@@ -117,7 +117,7 @@
           (udiv:SI
            (match_operand:SI 1 "register_operand" "r,r")
            (match_operand:SI 2 "ft32_rimm_operand" "r,KA")))]
-  ""
+  "!TARGET_NODIV"
   "udiv.l %0,%1,%2")
 
 (define_insn "umodsi3"
@@ -125,7 +125,7 @@
           (umod:SI
            (match_operand:SI 1 "register_operand" "r,r")
            (match_operand:SI 2 "register_operand" "r,KA")))]
-  ""
+  "!TARGET_NODIV"
   "umod.l %0,%1,%2")
 
 (define_insn "extvsi"

gcc/config/ft32/ft32.opt

@@ -25,3 +25,7 @@ target the software simulator.
 mlra
 Target Report Var(ft32_lra_flag) Init(0) Save
 Use LRA instead of reload.
+
+mnodiv
+Target Report Mask(NODIV)
+Avoid use of the DIV and MOD instructions

gcc/doc/invoke.texi

@@ -712,7 +712,7 @@ Objective-C and Objective-C++ Dialects}.
 @gccoptlist{-msmall-model -mno-lsim}
 
 @emph{FT32 Options}
-@gccoptlist{-msim -mlra}
+@gccoptlist{-msim -mlra -mnodiv}
 
 @emph{FRV Options}
 @gccoptlist{-mgpr-32  -mgpr-64  -mfpr-32  -mfpr-64 @gol
@@ -15827,6 +15827,10 @@ I/O functions are needed.
 Enable Local Register Allocation.  This is still experimental for FT32,
 so by default the compiler uses standard reload.
 
+@item -mnodiv
+@opindex mnodiv
+Do not use div and mod instructions.
+
 @end table
 
 @node FRV Options

libgcc/ChangeLog

@@ -1,3 +1,7 @@
+2016-03-28  James Bowman  <james.bowman@ftdichip.com>
+
+        * libgcc/config/ft32/lib1funcs.S (*divsi3, *modsi3): New.
+
 2016-03-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
 	PR libgcc/70363

libgcc/config/ft32/lib1funcs.S

@@ -25,8 +25,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 # for implementation details of all except division which is detailed below
 #
 
+#ifdef L_fp_tools
 // .global __cmpsf2_
-
 nan:            .long 0x7FFFFFFF    # also abs mask
 inf:            .long 0x7F800000
 sign_mask:      .long 0x80000000
@@ -37,6 +37,14 @@ smallest_norm:  .long 0x00800000    # implicit bit
 high_FF:        .long 0xFF000000
 high_uint:      .long 0xFFFFFFFF
 
+ntz_table:
+    .byte   32,0,1,12,2,6,0,13,3,0,7,0,0,0,0,14
+    .byte   10,4,0,0,8,0,0,25,0,0,0,0,0,21,27,15
+    .byte   31,11,5,0,0,0,0,0,9,0,0,24,0,0,20,26
+    .byte   30,0,0,0,0,23,0,19,29,0,22,18,28,17,16,0
+
+#endif
+
 # Supply a few 'missing' instructions
 
 # not
@@ -87,12 +95,6 @@ high_uint:      .long 0xFFFFFFFF
     lpmi.b  \x, \x, 0
 .endm
 
-ntz_table:
-    .byte   32,0,1,12,2,6,0,13,3,0,7,0,0,0,0,14
-    .byte   10,4,0,0,8,0,0,25,0,0,0,0,0,21,27,15
-    .byte   31,11,5,0,0,0,0,0,9,0,0,24,0,0,20,26
-    .byte   30,0,0,0,0,23,0,19,29,0,22,18,28,17,16,0
-
 # calculate leading zero count
 .macro      nlz x, scr
     flip    \x, \x, 31
@@ -503,6 +505,9 @@ mul_z0:
 ## for implementation details
 
 
+
+
+#ifdef  L_divsf3
 dc_1: .long             0xffffe7d7
 dc_2: .long             0xffffffe8
 dc_3: .long             0xffbad86f
@@ -517,9 +522,6 @@ dc_11: .long            0x0452b1bf
 dc_12: .long            0xFFFFFFC0
 spec_val_test:  .long   0x7F7FFFFF
 
-
-
-#ifdef  L_divsf3
 .global __divsf3
 __divsf3:
     push    $r13
@@ -869,6 +871,7 @@ float_not_zero2:
     return
 #endif
 
+#if 0
 ##########################################################################
 ##########################################################################
 ## float compare
@@ -913,7 +916,74 @@ cmp_is_gt:
 cmp_is_eq:
     ldk     $r0, 0
     return
+#endif
 
+#ifdef  L_udivsi3
+.global __udivsi3
+__udivsi3:
+	# $r0 is dividend
+	# $r1 is divisor
+	ldk	$r2,0
+	push	$r28
+	ldk	$r28,-32
+0:
+	lshr	$r3,$r0,31	# Shift $r2:$r0 left one
+	ashl	$r0,$r0,1
+	ashl	$r2,$r2,1
+	or	$r2,$r2,$r3
+	cmp	$r2,$r1
+	jmpc	b,1f
+2:
+	sub	$r2,$r2,$r1
+	add	$r0,$r0,1
+1:
+	add	$r28,$r28,1
+	jmpx	31,$r28,1,0b
+	pop	$r28
+	# $r0: quotient
+	# $r2: remainder
+	return
+#endif
 
+#ifdef	L_umodsi3
+.global	__umodsi3
+__umodsi3:
+	call	__udivsi3
+	move	$r0,$r2
+	return
+#endif
 
+#ifdef	L_divsi3
+.global	__divsi3
+__divsi3:
+	xor	$r5,$r0,$r1	# $r5 is sign of result
+	ashr	$r2,$r0,31	# $r0 = abs($r0)
+	xor	$r0,$r0,$r2
+	sub	$r0,$r0,$r2
+	ashr	$r2,$r1,31	# $r1 = abs($r1)
+	xor	$r1,$r1,$r2
+	sub	$r1,$r1,$r2
+	call	__udivsi3
+	ashr	$r5,$r5,31
+	xor	$r0,$r0,$r5
+	sub	$r0,$r0,$r5
+	return
+	
+#endif
 
+#ifdef	L_modsi3
+.global	__modsi3
+__modsi3:
+	move	$r5,$r0		# $r5 is sign of result
+	ashr	$r2,$r0,31	# $r0 = abs($r0)
+	xor	$r0,$r0,$r2
+	sub	$r0,$r0,$r2
+	ashr	$r2,$r1,31	# $r1 = abs($r1)
+	xor	$r1,$r1,$r2
+	sub	$r1,$r1,$r2
+	call	__umodsi3
+	ashr	$r5,$r5,31
+	xor	$r0,$r0,$r5
+	sub	$r0,$r0,$r5
+	return
+#endif

libgcc/config/ft32/t-ft32

@@ -1,3 +1,7 @@
+LIB1ASMSRC = ft32/lib1funcs.S
+LIB1ASMFUNCS = \
+  _udivsi3 _divsi3 _umodsi3 _modsi3
+
 LIB2ADD = $(srcdir)/config/ft32/epilog.S $(srcdir)/config/ft32/prolog.S
 
 crti-hw.o: $(srcdir)/config/ft32/crti-hw.S