mirror of git://gcc.gnu.org/git/gcc.git
This patchset improves zero extend costs and code generation.
When zero extending a 32-bit register, we emit a "mov", but currently
report the cost of the "mov" incorrectly.
In terms of speed, we currently say the cost is that of an extend
operation. But the cost of a "mov" is the cost of 1 instruction, so fix
that.
In terms of size, we currently say that the "mov" takes 0 instructions.
Fix it by changing it to 1.
Bootstrapped and tested on aarch64-none-elf.
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Fix cost of zero extend.
From-SVN: r238820
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@ -1,3 +1,7 @@
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2016-07-28 Kristina Martsenko <kristina.martsenko@arm.com>
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* config/aarch64/aarch64.c (aarch64_rtx_costs): Fix cost of zero extend.
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2016-07-28 Wilco Dijkstra <wdijkstr@arm.com>
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2016-07-28 Wilco Dijkstra <wdijkstr@arm.com>
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* config/aarch64/aarch64.c (aarch64_pushwb_pair_reg): Rename.
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* config/aarch64/aarch64.c (aarch64_pushwb_pair_reg): Rename.
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@ -6803,11 +6803,12 @@ cost_plus:
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{
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{
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int op_cost = rtx_cost (op0, VOIDmode, ZERO_EXTEND, 0, speed);
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int op_cost = rtx_cost (op0, VOIDmode, ZERO_EXTEND, 0, speed);
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if (!op_cost && speed)
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/* If OP_COST is non-zero, then the cost of the zero extend
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/* MOV. */
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is effectively the cost of the inner operation. Otherwise
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*cost += extra_cost->alu.extend;
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we have a MOV instruction and we take the cost from the MOV
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else
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itself. This is true independently of whether we are
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/* Free, the cost is that of the SI mode operation. */
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optimizing for space or time. */
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if (op_cost)
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*cost = op_cost;
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*cost = op_cost;
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return true;
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return true;
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