mirror of git://gcc.gnu.org/git/gcc.git
re PR regression/63150 (FAIL: gcc.target/powerpc/pr53199.c scan-assembler-times *)
PR target/63150 gcc/ * config/rs6000/rs6000.md (bswapdi2): Remove one scratch reg. Modify Z->r bswapdi splitter to use dest in place of scratch. In r->Z and Z->r bswapdi splitter rename word_high, word_low to word1, word2 and rearrange logic to suit. (bswapdi2_64bit): Remove early clobber on Z->r alternative. (bswapdi2_ldbrx): Likewise. Remove '??' on r->r. (bswapdi2_32bit): Remove early clobber on Z->r alternative. Add one '?' on r->r. Modify Z->r splitter to avoid need for early clobber. gcc/testsuite/ * gcc.target/powerpc/pr53199.c: Add extra functions. Revert 2014-12-05 change. From-SVN: r221445
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e1be83cac8
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@ -1,3 +1,16 @@
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2015-03-16 Alan Modra <amodra@gmail.com>
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PR target/63150
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* config/rs6000/rs6000.md (bswapdi2): Remove one scratch reg.
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Modify Z->r bswapdi splitter to use dest in place of scratch.
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In r->Z and Z->r bswapdi splitter rename word_high, word_low
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to word1, word2 and rearrange logic to suit.
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(bswapdi2_64bit): Remove early clobber on Z->r alternative.
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(bswapdi2_ldbrx): Likewise. Remove '??' on r->r.
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(bswapdi2_32bit): Remove early clobber on Z->r alternative.
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Add one '?' on r->r. Modify Z->r splitter to avoid need for
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early clobber.
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2015-03-14 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/65369
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@ -2264,8 +2264,7 @@
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(bswap:DI
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(match_operand:DI 1 "reg_or_mem_operand" "")))
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(clobber (match_scratch:DI 2 ""))
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(clobber (match_scratch:DI 3 ""))
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(clobber (match_scratch:DI 4 ""))])]
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(clobber (match_scratch:DI 3 ""))])]
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""
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{
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if (!REG_P (operands[0]) && !REG_P (operands[1]))
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@ -2283,11 +2282,10 @@
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;; Power7/cell has ldbrx/stdbrx, so use it directly
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(define_insn "*bswapdi2_ldbrx"
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[(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,??&r")
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[(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,&r")
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(bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
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(clobber (match_scratch:DI 2 "=X,X,&r"))
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(clobber (match_scratch:DI 3 "=X,X,&r"))
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(clobber (match_scratch:DI 4 "=X,X,&r"))]
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(clobber (match_scratch:DI 3 "=X,X,&r"))]
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"TARGET_POWERPC64 && TARGET_LDBRX
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&& (REG_P (operands[0]) || REG_P (operands[1]))"
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"@
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@ -2299,11 +2297,10 @@
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;; Non-power7/cell, fall back to use lwbrx/stwbrx
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(define_insn "*bswapdi2_64bit"
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[(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,&r")
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[(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,&r")
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(bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
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(clobber (match_scratch:DI 2 "=&b,&b,&r"))
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(clobber (match_scratch:DI 3 "=&r,&r,&r"))
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(clobber (match_scratch:DI 4 "=&r,X,&r"))]
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(clobber (match_scratch:DI 3 "=&r,&r,&r"))]
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"TARGET_POWERPC64 && !TARGET_LDBRX
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&& (REG_P (operands[0]) || REG_P (operands[1]))
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&& !(MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0]))
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@ -2315,8 +2312,7 @@
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[(set (match_operand:DI 0 "gpc_reg_operand" "")
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(bswap:DI (match_operand:DI 1 "indexed_or_indirect_operand" "")))
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(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
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(clobber (match_operand:DI 3 "gpc_reg_operand" ""))
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(clobber (match_operand:DI 4 "gpc_reg_operand" ""))]
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(clobber (match_operand:DI 3 "gpc_reg_operand" ""))]
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"TARGET_POWERPC64 && !TARGET_LDBRX && reload_completed"
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[(const_int 0)]
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"
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@ -2325,15 +2321,14 @@
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rtx src = operands[1];
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rtx op2 = operands[2];
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rtx op3 = operands[3];
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rtx op4 = operands[4];
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rtx op3_32 = simplify_gen_subreg (SImode, op3, DImode,
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BYTES_BIG_ENDIAN ? 4 : 0);
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rtx op4_32 = simplify_gen_subreg (SImode, op4, DImode,
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BYTES_BIG_ENDIAN ? 4 : 0);
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rtx dest_32 = simplify_gen_subreg (SImode, dest, DImode,
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BYTES_BIG_ENDIAN ? 4 : 0);
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rtx addr1;
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rtx addr2;
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rtx word_high;
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rtx word_low;
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rtx word1;
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rtx word2;
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addr1 = XEXP (src, 0);
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if (GET_CODE (addr1) == PLUS)
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@ -2358,21 +2353,22 @@
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addr2 = gen_rtx_PLUS (Pmode, op2, addr1);
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}
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word1 = change_address (src, SImode, addr1);
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word2 = change_address (src, SImode, addr2);
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if (BYTES_BIG_ENDIAN)
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{
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word_high = change_address (src, SImode, addr1);
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word_low = change_address (src, SImode, addr2);
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emit_insn (gen_bswapsi2 (op3_32, word2));
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emit_insn (gen_bswapsi2 (dest_32, word1));
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}
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else
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{
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word_high = change_address (src, SImode, addr2);
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word_low = change_address (src, SImode, addr1);
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emit_insn (gen_bswapsi2 (op3_32, word1));
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emit_insn (gen_bswapsi2 (dest_32, word2));
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}
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emit_insn (gen_bswapsi2 (op3_32, word_low));
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emit_insn (gen_bswapsi2 (op4_32, word_high));
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emit_insn (gen_ashldi3 (dest, op3, GEN_INT (32)));
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emit_insn (gen_iordi3 (dest, dest, op4));
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emit_insn (gen_ashldi3 (op3, op3, GEN_INT (32)));
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emit_insn (gen_iordi3 (dest, dest, op3));
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DONE;
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}")
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@ -2380,8 +2376,7 @@
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[(set (match_operand:DI 0 "indexed_or_indirect_operand" "")
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(bswap:DI (match_operand:DI 1 "gpc_reg_operand" "")))
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(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
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(clobber (match_operand:DI 3 "gpc_reg_operand" ""))
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(clobber (match_operand:DI 4 "" ""))]
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(clobber (match_operand:DI 3 "gpc_reg_operand" ""))]
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"TARGET_POWERPC64 && !TARGET_LDBRX && reload_completed"
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[(const_int 0)]
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"
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@ -2396,8 +2391,8 @@
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BYTES_BIG_ENDIAN ? 4 : 0);
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rtx addr1;
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rtx addr2;
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rtx word_high;
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rtx word_low;
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rtx word1;
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rtx word2;
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addr1 = XEXP (dest, 0);
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if (GET_CODE (addr1) == PLUS)
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@ -2422,19 +2417,21 @@
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addr2 = gen_rtx_PLUS (Pmode, op2, addr1);
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}
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word1 = change_address (dest, SImode, addr1);
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word2 = change_address (dest, SImode, addr2);
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emit_insn (gen_lshrdi3 (op3, src, GEN_INT (32)));
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if (BYTES_BIG_ENDIAN)
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{
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word_high = change_address (dest, SImode, addr1);
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word_low = change_address (dest, SImode, addr2);
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emit_insn (gen_bswapsi2 (word1, src_si));
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emit_insn (gen_bswapsi2 (word2, op3_si));
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}
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else
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{
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word_high = change_address (dest, SImode, addr2);
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word_low = change_address (dest, SImode, addr1);
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emit_insn (gen_bswapsi2 (word2, src_si));
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emit_insn (gen_bswapsi2 (word1, op3_si));
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}
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emit_insn (gen_bswapsi2 (word_high, src_si));
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emit_insn (gen_bswapsi2 (word_low, op3_si));
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DONE;
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}")
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@ -2442,8 +2439,7 @@
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[(set (match_operand:DI 0 "gpc_reg_operand" "")
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(bswap:DI (match_operand:DI 1 "gpc_reg_operand" "")))
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(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
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(clobber (match_operand:DI 3 "gpc_reg_operand" ""))
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(clobber (match_operand:DI 4 "" ""))]
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(clobber (match_operand:DI 3 "gpc_reg_operand" ""))]
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"TARGET_POWERPC64 && reload_completed"
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[(const_int 0)]
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"
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@ -2467,7 +2463,7 @@
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}")
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(define_insn "bswapdi2_32bit"
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[(set (match_operand:DI 0 "reg_or_mem_operand" "=&r,Z,&r")
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[(set (match_operand:DI 0 "reg_or_mem_operand" "=r,Z,?&r")
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(bswap:DI (match_operand:DI 1 "reg_or_mem_operand" "Z,r,r")))
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(clobber (match_scratch:SI 2 "=&b,&b,X"))]
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"!TARGET_POWERPC64 && (REG_P (operands[0]) || REG_P (operands[1]))"
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@ -2496,7 +2492,8 @@
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if (GET_CODE (addr1) == PLUS)
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{
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emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4)));
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if (TARGET_AVOID_XFORM)
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if (TARGET_AVOID_XFORM
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|| REGNO (XEXP (addr1, 1)) == REGNO (dest2))
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{
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emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2));
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addr2 = op2;
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@ -2504,7 +2501,8 @@
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else
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addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1));
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}
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else if (TARGET_AVOID_XFORM)
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else if (TARGET_AVOID_XFORM
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|| REGNO (addr1) == REGNO (dest2))
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{
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emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4)));
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addr2 = op2;
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@ -2519,6 +2517,8 @@
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word2 = change_address (src, SImode, addr2);
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emit_insn (gen_bswapsi2 (dest2, word1));
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/* The REGNO (dest2) tests above ensure that addr2 has not been trashed,
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thus allowing us to omit an early clobber on the output. */
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emit_insn (gen_bswapsi2 (dest1, word2));
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DONE;
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}")
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@ -1,3 +1,8 @@
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2015-03-16 Alan Modra <amodra@gmail.com>
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* gcc.target/powerpc/pr53199.c: Add extra functions. Revert
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2014-12-05 change.
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2015-03-15 John David Anglin <danglin@gcc.gnu.org>
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* gcc.dg/torture/pr65270-1.c: Add -fno-common to dg-options on
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@ -1,8 +1,8 @@
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/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
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/* { dg-options "-O2 -mcpu=power6 -mavoid-indexed-addresses" } */
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/* { dg-final { scan-assembler-times "lwbrx" 6 } } */
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/* { dg-final { scan-assembler-times "lwbrx" 12 } } */
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/* { dg-final { scan-assembler-times "stwbrx" 6 } } */
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/* PR 51399: bswap gets an error if -mavoid-indexed-addresses was used in
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@ -26,6 +26,24 @@ load64_reverse_3 (long long *p, int i)
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return __builtin_bswap64 (p[i]);
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}
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long long
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load64_reverse_4 (long long dummy __attribute__ ((unused)), long long *p)
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{
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return __builtin_bswap64 (*p);
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}
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long long
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load64_reverse_5 (long long dummy __attribute__ ((unused)), long long *p)
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{
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return __builtin_bswap64 (p[1]);
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}
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long long
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load64_reverse_6 (long long dummy __attribute__ ((unused)), long long *p, int i)
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{
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return __builtin_bswap64 (p[i]);
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}
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void
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store64_reverse_1 (long long *p, long long x)
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{
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@ -45,7 +63,13 @@ store64_reverse_3 (long long *p, long long x, int i)
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}
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long long
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reg_reverse (long long x)
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reg_reverse_1 (long long x)
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{
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return __builtin_bswap64 (x);
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}
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long long
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reg_reverse_2 (long long dummy __attribute__ ((unused)), long long x)
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{
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return __builtin_bswap64 (x);
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}
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