mirror of git://gcc.gnu.org/git/gcc.git
Enable AES, PCLMUL and RDRND for Silvermont
gcc/ 2013-11-22 Yuri Rumyantsev <ysrumyan@gmail.com> * config/i386/i386.c(processor_alias_table): Enable PTA_AES, PTA_PCLMUL and PTA_RDRND for Silvermont. * config/i386/driver-i386.c (host_detect_local_cpu): Set up cpu for Silvermont. * doc/invoke.texi: Mention AES, PCLMUL and RDRND for Silvermont. libgcc/ 2013-11-22 Yuri Rumyantsev <ysrumyan@gmail.com> * config/i386/cpuinfo.c (get_intel_cpu): Add Silvermont cases. From-SVN: r205275
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@ -1,3 +1,12 @@
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2013-11-22 Yuri Rumyantsev <ysrumyan@gmail.com>
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* config/i386/i386.c(processor_alias_table): Enable PTA_AES,
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PTA_PCLMUL and PTA_RDRND for Silvermont.
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* config/i386/driver-i386.c (host_detect_local_cpu): Set up cpu
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for Silvermont.
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* doc/invoke.texi: Mention AES, PCLMUL and RDRND for Silvermont.
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2013-11-22 Andrew MacLeod <amacleod@redhat.com>
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2013-11-22 Andrew MacLeod <amacleod@redhat.com>
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* hooks.h (hook_uint_mode_0): Add Prototype.
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* hooks.h (hook_uint_mode_0): Add Prototype.
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@ -646,6 +646,11 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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/* Atom. */
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/* Atom. */
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cpu = "atom";
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cpu = "atom";
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break;
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break;
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case 0x37:
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case 0x4d:
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/* Silvermont. */
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cpu = "slm";
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break;
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case 0x0f:
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case 0x0f:
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/* Merom. */
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/* Merom. */
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case 0x17:
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case 0x17:
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@ -3147,8 +3147,8 @@ ix86_option_override_internal (bool main_args_p,
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| PTA_SSSE3 | PTA_CX16 | PTA_MOVBE | PTA_FXSR},
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| PTA_SSSE3 | PTA_CX16 | PTA_MOVBE | PTA_FXSR},
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{"slm", PROCESSOR_SLM, CPU_SLM,
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{"slm", PROCESSOR_SLM, CPU_SLM,
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PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3
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PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3
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| PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_MOVBE
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| PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_AES
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| PTA_FXSR},
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| PTA_PCLMUL | PTA_RDRND | PTA_MOVBE | PTA_FXSR},
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{"geode", PROCESSOR_GEODE, CPU_GEODE,
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{"geode", PROCESSOR_GEODE, CPU_GEODE,
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PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_PREFETCH_SSE | PTA_PRFCHW},
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PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_PREFETCH_SSE | PTA_PRFCHW},
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{"k6", PROCESSOR_K6, CPU_K6, PTA_MMX},
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{"k6", PROCESSOR_K6, CPU_K6, PTA_MMX},
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@ -14535,7 +14535,7 @@ instruction set support.
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@item slm
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@item slm
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Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
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Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
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SSE4.1, SSE4.2 and POPCNT instruction set support.
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SSE4.1, SSE4.2, POPCNT, AES, PCLMUL and RDRND instruction set support.
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@item k6
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@item k6
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AMD K6 CPU with MMX instruction set support.
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AMD K6 CPU with MMX instruction set support.
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@ -1,3 +1,7 @@
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2013-11-22 Yuri Rumyantsev <ysrumyan@gmail.com>
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* config/i386/cpuinfo.c (get_intel_cpu): Add Silvermont cases.
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2013-11-18 Jan Hubicka <jh@suse.cz>
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2013-11-18 Jan Hubicka <jh@suse.cz>
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* libgcov-driver.c (run_accounted): Make global level static.
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* libgcov-driver.c (run_accounted): Make global level static.
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@ -170,6 +170,11 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
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/* Atom. */
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/* Atom. */
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__cpu_model.__cpu_type = INTEL_ATOM;
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__cpu_model.__cpu_type = INTEL_ATOM;
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break;
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break;
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case 0x37:
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case 0x4d:
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/* Silvermont. */
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__cpu_model.__cpu_type = INTEL_SLM;
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break;
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case 0x1a:
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case 0x1a:
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case 0x1e:
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case 0x1e:
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case 0x1f:
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case 0x1f:
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