mirror of git://gcc.gnu.org/git/gcc.git
[ARM] PR/63870 Add qualifier to check lane bounds in expand
* config/arm/arm-builtins.c (enum arm_type_qualifiers): Add qualifier_lane_index. (arm_binop_imm_qualifiers, BINOP_IMM_QUALIFIERS): New. (arm_getlane_qualifiers): Use qualifier_lane_index. (arm_lanemac_qualifiers): Rename to... (arm_mac_n_qualifiers): ...this. (LANEMAC_QUALIFIERS): Rename to... (MAC_N_QUALIFIERS): ...this. (arm_mac_lane_qualifiers, MAC_LANE_QUALIFIERS): New. (arm_setlane_qualifiers): Use qualifier_lane_index. (arm_ternop_imm_qualifiers, TERNOP_IMM_QUALIFIERS): New. (enum builtin_arg): Add NEON_ARG_LANE_INDEX. (arm_expand_neon_args): Handle NEON_ARG_LANE_INDEX. (arm_expand_neon_builtin): Handle qualifier_lane_index. * config/arm/arm-protos.h (neon_lane_bounds): Add const_tree parameter. * config/arm/arm.c (bounds_check): Likewise, improve error message. (neon_lane_bounds, neon_const_bounds): Add arguments to bounds_check. * config/arm/arm_neon_builtins.def (vshrs_n, vshru_n, vrshrs_n, vrshru_n, vshrn_n, vrshrn_n, vqshrns_n, vqshrnu_n, vqrshrns_n, vqrshrnu_n, vqshrun_n, vqrshrun_n, vshl_n, vqshl_s_n, vqshl_u_n, vqshlu_n, vshlls_n, vshllu_n): Change qualifiers to BINOP_IMM. (vsras_n, vsrau_n, vrsras_n, vrsrau_n, vsri_n, vsli_n): Change qualifiers to TERNOP_IMM. (vdup_lane): Change qualifiers to GETLANE. (vmla_lane, vmlals_lane, vmlalu_lane, vqdmlal_lane, vmls_lane, vmlsls_lane, vmlslu_lane, vqdmlsl_lane): Change qualifiers to MAC_LANE. (vmla_n, vmlals_n, vmlalu_n, vqdmlal_n, vmls_n, vmlsls_n, vmlslu_n, vqdmlsl_n): Change qualifiers to MAC_N. * config/arm/neon.md (neon_vget_lane<mode>, neon_vget_laneu<mode>, neon_vget_lanedi, neon_vget_lanev2di, neon_vset_lane<mode>, neon_vset_lanedi, neon_vdup_lane<mode>, neon_vdup_lanedi, neon_vdup_lanev2di, neon_vmul_lane<mode>, neon_vmul_lane<mode>, neon_vmull<sup>_lane<mode>, neon_vqdmull_lane<mode>, neon_vq<r>dmulh_lane<mode>, neon_vq<r>dmulh_lane<mode>, neon_vmla_lane<mode>, neon_vmla_lane<mode>, neon_vmlal<sup>_lane<mode>, neon_vqdmlal_lane<mode>, neon_vmls_lane<mode>, neon_vmls_lane<mode>, neon_vmlsl<sup>_lane<mode>, neon_vqdmlsl_lane<mode>): Remove call to neon_lane_bounds. From-SVN: r226251
This commit is contained in:
Alan Lawrence
Alan Lawrence
parent
d99dacc948
commit
eaa80f6464
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@ -1,3 +1,47 @@
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2015-07-27 Alan Lawrence <alan.lawrence@arm.com>
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PR/63870
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* config/arm/arm-builtins.c (enum arm_type_qualifiers):
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Add qualifier_lane_index.
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(arm_binop_imm_qualifiers, BINOP_IMM_QUALIFIERS): New.
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(arm_getlane_qualifiers): Use qualifier_lane_index.
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(arm_lanemac_qualifiers): Rename to...
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(arm_mac_n_qualifiers): ...this.
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(LANEMAC_QUALIFIERS): Rename to...
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(MAC_N_QUALIFIERS): ...this.
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(arm_mac_lane_qualifiers, MAC_LANE_QUALIFIERS): New.
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(arm_setlane_qualifiers): Use qualifier_lane_index.
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(arm_ternop_imm_qualifiers, TERNOP_IMM_QUALIFIERS): New.
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(enum builtin_arg): Add NEON_ARG_LANE_INDEX.
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(arm_expand_neon_args): Handle NEON_ARG_LANE_INDEX.
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(arm_expand_neon_builtin): Handle qualifier_lane_index.
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* config/arm/arm-protos.h (neon_lane_bounds): Add const_tree parameter.
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* config/arm/arm.c (bounds_check): Likewise, improve error message.
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(neon_lane_bounds, neon_const_bounds): Add arguments to bounds_check.
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* config/arm/arm_neon_builtins.def (vshrs_n, vshru_n, vrshrs_n,
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vrshru_n, vshrn_n, vrshrn_n, vqshrns_n, vqshrnu_n, vqrshrns_n,
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vqrshrnu_n, vqshrun_n, vqrshrun_n, vshl_n, vqshl_s_n, vqshl_u_n,
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vqshlu_n, vshlls_n, vshllu_n): Change qualifiers to BINOP_IMM.
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(vsras_n, vsrau_n, vrsras_n, vrsrau_n, vsri_n, vsli_n): Change
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qualifiers to TERNOP_IMM.
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(vdup_lane): Change qualifiers to GETLANE.
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(vmla_lane, vmlals_lane, vmlalu_lane, vqdmlal_lane, vmls_lane,
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vmlsls_lane, vmlslu_lane, vqdmlsl_lane): Change qualifiers to MAC_LANE.
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(vmla_n, vmlals_n, vmlalu_n, vqdmlal_n, vmls_n, vmlsls_n, vmlslu_n,
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vqdmlsl_n): Change qualifiers to MAC_N.
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* config/arm/neon.md (neon_vget_lane<mode>, neon_vget_laneu<mode>,
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neon_vget_lanedi, neon_vget_lanev2di, neon_vset_lane<mode>,
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neon_vset_lanedi, neon_vdup_lane<mode>, neon_vdup_lanedi,
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neon_vdup_lanev2di, neon_vmul_lane<mode>, neon_vmul_lane<mode>,
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neon_vmull<sup>_lane<mode>, neon_vqdmull_lane<mode>,
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neon_vq<r>dmulh_lane<mode>, neon_vq<r>dmulh_lane<mode>,
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neon_vmla_lane<mode>, neon_vmla_lane<mode>, neon_vmlal<sup>_lane<mode>,
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neon_vqdmlal_lane<mode>, neon_vmls_lane<mode>, neon_vmls_lane<mode>,
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neon_vmlsl<sup>_lane<mode>, neon_vqdmlsl_lane<mode>):
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Remove call to neon_lane_bounds.
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2015-07-27 Wilco Dijkstra <wdijkstr@arm.com>
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* config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3):
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@ -75,7 +75,9 @@ enum arm_type_qualifiers
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/* qualifier_const_pointer | qualifier_map_mode */
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qualifier_const_pointer_map_mode = 0x86,
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/* Polynomial types. */
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qualifier_poly = 0x100
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qualifier_poly = 0x100,
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/* Lane indices - must be within range of previous argument = a vector. */
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qualifier_lane_index = 0x200
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};
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/* The qualifier_internal allows generation of a unary builtin from
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@ -106,21 +108,40 @@ arm_ternop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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/* T (T, immediate). */
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static enum arm_type_qualifiers
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arm_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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arm_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_none, qualifier_none, qualifier_immediate };
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#define BINOP_IMM_QUALIFIERS (arm_binop_imm_qualifiers)
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/* T (T, lane index). */
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static enum arm_type_qualifiers
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arm_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_none, qualifier_none, qualifier_lane_index };
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#define GETLANE_QUALIFIERS (arm_getlane_qualifiers)
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/* T (T, T, T, immediate). */
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static enum arm_type_qualifiers
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arm_lanemac_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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arm_mac_n_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_none, qualifier_none, qualifier_none,
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qualifier_none, qualifier_immediate };
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#define LANEMAC_QUALIFIERS (arm_lanemac_qualifiers)
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#define MAC_N_QUALIFIERS (arm_mac_n_qualifiers)
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/* T (T, T, T, lane index). */
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static enum arm_type_qualifiers
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arm_mac_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_none, qualifier_none, qualifier_none,
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qualifier_none, qualifier_lane_index };
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#define MAC_LANE_QUALIFIERS (arm_mac_lane_qualifiers)
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/* T (T, T, immediate). */
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static enum arm_type_qualifiers
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arm_setlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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arm_ternop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_none, qualifier_none, qualifier_none, qualifier_immediate };
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#define TERNOP_IMM_QUALIFIERS (arm_ternop_imm_qualifiers)
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/* T (T, T, lane index). */
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static enum arm_type_qualifiers
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arm_setlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
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= { qualifier_none, qualifier_none, qualifier_none, qualifier_lane_index };
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#define SETLANE_QUALIFIERS (arm_setlane_qualifiers)
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/* T (T, T). */
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@ -1925,6 +1946,7 @@ arm_expand_unop_builtin (enum insn_code icode,
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typedef enum {
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NEON_ARG_COPY_TO_REG,
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NEON_ARG_CONSTANT,
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NEON_ARG_LANE_INDEX,
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NEON_ARG_MEMORY,
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NEON_ARG_STOP
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} builtin_arg;
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@ -2041,6 +2063,16 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
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op[argc] = copy_to_mode_reg (mode[argc], op[argc]);
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break;
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case NEON_ARG_LANE_INDEX:
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/* Previous argument must be a vector, which this indexes. */
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gcc_assert (argc > 0);
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if (CONST_INT_P (op[argc]))
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{
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enum machine_mode vmode = mode[argc - 1];
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neon_lane_bounds (op[argc], 0, GET_MODE_NUNITS (vmode), exp);
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}
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/* Fall through - if the lane index isn't a constant then
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the next case will error. */
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case NEON_ARG_CONSTANT:
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if (!(*insn_data[icode].operand[opno].predicate)
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(op[argc], mode[argc]))
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@ -2168,7 +2200,9 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target)
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int operands_k = k - is_void;
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int expr_args_k = k - 1;
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if (d->qualifiers[qualifiers_k] & qualifier_immediate)
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if (d->qualifiers[qualifiers_k] & qualifier_lane_index)
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args[k] = NEON_ARG_LANE_INDEX;
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else if (d->qualifiers[qualifiers_k] & qualifier_immediate)
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args[k] = NEON_ARG_CONSTANT;
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else if (d->qualifiers[qualifiers_k] & qualifier_maybe_immediate)
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{
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@ -86,7 +86,7 @@ extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
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extern rtx neon_make_constant (rtx);
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extern tree arm_builtin_vectorized_function (tree, tree, tree);
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extern void neon_expand_vector_init (rtx, rtx);
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extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
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extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
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extern void neon_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
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extern HOST_WIDE_INT neon_element_bits (machine_mode);
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extern void neon_reinterpret (rtx, rtx);
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@ -12789,12 +12789,12 @@ neon_expand_vector_init (rtx target, rtx vals)
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}
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/* Ensure OPERAND lies between LOW (inclusive) and HIGH (exclusive). Raise
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ERR if it doesn't. FIXME: NEON bounds checks occur late in compilation, so
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reported source locations are bogus. */
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ERR if it doesn't. EXP indicates the source location, which includes the
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inlining history for intrinsics. */
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static void
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bounds_check (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
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const char *err)
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const_tree exp, const char *desc)
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{
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HOST_WIDE_INT lane;
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@ -12803,15 +12803,22 @@ bounds_check (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
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lane = INTVAL (operand);
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if (lane < low || lane >= high)
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error (err);
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{
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if (exp)
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error ("%K%s %lld out of range %lld - %lld",
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exp, desc, lane, low, high - 1);
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else
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error ("%s %lld out of range %lld - %lld", desc, lane, low, high - 1);
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}
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}
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/* Bounds-check lanes. */
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void
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neon_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
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neon_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
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const_tree exp)
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{
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bounds_check (operand, low, high, "lane out of range");
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bounds_check (operand, low, high, exp, "lane");
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}
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/* Bounds-check constants. */
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@ -12819,7 +12826,7 @@ neon_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
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void
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neon_const_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
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{
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bounds_check (operand, low, high, "constant out of range");
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bounds_check (operand, low, high, NULL_TREE, "constant");
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}
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HOST_WIDE_INT
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@ -67,28 +67,28 @@ VAR8 (BINOP, vqshls, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP, vqshlu, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP, vqrshls, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP, vqrshlu, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (GETLANE, vshrs_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (GETLANE, vshru_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (GETLANE, vrshrs_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (GETLANE, vrshru_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR3 (GETLANE, vshrn_n, v8hi, v4si, v2di)
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VAR3 (GETLANE, vrshrn_n, v8hi, v4si, v2di)
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VAR3 (GETLANE, vqshrns_n, v8hi, v4si, v2di)
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VAR3 (GETLANE, vqshrnu_n, v8hi, v4si, v2di)
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VAR3 (GETLANE, vqrshrns_n, v8hi, v4si, v2di)
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VAR3 (GETLANE, vqrshrnu_n, v8hi, v4si, v2di)
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VAR3 (GETLANE, vqshrun_n, v8hi, v4si, v2di)
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VAR3 (GETLANE, vqrshrun_n, v8hi, v4si, v2di)
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VAR8 (GETLANE, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (GETLANE, vqshl_s_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (GETLANE, vqshl_u_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (GETLANE, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR3 (GETLANE, vshlls_n, v8qi, v4hi, v2si)
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VAR3 (GETLANE, vshllu_n, v8qi, v4hi, v2si)
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VAR8 (SETLANE, vsras_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (SETLANE, vsrau_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (SETLANE, vrsras_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (SETLANE, vrsrau_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP_IMM, vshrs_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP_IMM, vshru_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP_IMM, vrshrs_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP_IMM, vrshru_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vshrn_n, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vrshrn_n, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vqshrns_n, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vqshrnu_n, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vqrshrns_n, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vqrshrnu_n, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vqshrun_n, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vqrshrun_n, v8hi, v4si, v2di)
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VAR8 (BINOP_IMM, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP_IMM, vqshl_s_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP_IMM, vqshl_u_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (BINOP_IMM, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR3 (BINOP_IMM, vshlls_n, v8qi, v4hi, v2si)
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VAR3 (BINOP_IMM, vshllu_n, v8qi, v4hi, v2si)
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VAR8 (TERNOP_IMM, vsras_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (TERNOP_IMM, vsrau_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (TERNOP_IMM, vrsras_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR8 (TERNOP_IMM, vrsrau_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
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VAR2 (BINOP, vsub, v2sf, v4sf)
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VAR3 (BINOP, vsubls, v8qi, v4hi, v2si)
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VAR3 (BINOP, vsublu, v8qi, v4hi, v2si)
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@ -140,8 +140,8 @@ VAR6 (BINOP, vpadals, v8qi, v4hi, v2si, v16qi, v8hi, v4si)
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VAR6 (BINOP, vpadalu, v8qi, v4hi, v2si, v16qi, v8hi, v4si)
|
||||
VAR2 (BINOP, vrecps, v2sf, v4sf)
|
||||
VAR2 (BINOP, vrsqrts, v2sf, v4sf)
|
||||
VAR8 (SETLANE, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
|
||||
VAR8 (SETLANE, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
|
||||
VAR8 (TERNOP_IMM, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
|
||||
VAR8 (TERNOP_IMM, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
|
||||
VAR8 (UNOP, vabs, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf)
|
||||
VAR6 (UNOP, vqabs, v8qi, v4hi, v2si, v16qi, v8hi, v4si)
|
||||
VAR8 (UNOP, vneg, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf)
|
||||
|
|
@ -162,7 +162,7 @@ VAR10 (SETLANE, vset_lane,
|
|||
VAR5 (UNOP, vcreate, v8qi, v4hi, v2si, v2sf, di)
|
||||
VAR10 (UNOP, vdup_n,
|
||||
v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
|
||||
VAR10 (BINOP, vdup_lane,
|
||||
VAR10 (GETLANE, vdup_lane,
|
||||
v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
|
||||
VAR5 (COMBINE, vcombine, v8qi, v4hi, v2si, v2sf, di)
|
||||
VAR5 (UNOP, vget_high, v16qi, v8hi, v4si, v4sf, v2di)
|
||||
|
|
@ -174,23 +174,23 @@ VAR3 (UNOP, vqmovun, v8hi, v4si, v2di)
|
|||
VAR3 (UNOP, vmovls, v8qi, v4hi, v2si)
|
||||
VAR3 (UNOP, vmovlu, v8qi, v4hi, v2si)
|
||||
VAR6 (SETLANE, vmul_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR6 (LANEMAC, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR2 (LANEMAC, vmlals_lane, v4hi, v2si)
|
||||
VAR2 (LANEMAC, vmlalu_lane, v4hi, v2si)
|
||||
VAR2 (LANEMAC, vqdmlal_lane, v4hi, v2si)
|
||||
VAR6 (LANEMAC, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR2 (LANEMAC, vmlsls_lane, v4hi, v2si)
|
||||
VAR2 (LANEMAC, vmlslu_lane, v4hi, v2si)
|
||||
VAR2 (LANEMAC, vqdmlsl_lane, v4hi, v2si)
|
||||
VAR6 (MAC_LANE, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR2 (MAC_LANE, vmlals_lane, v4hi, v2si)
|
||||
VAR2 (MAC_LANE, vmlalu_lane, v4hi, v2si)
|
||||
VAR2 (MAC_LANE, vqdmlal_lane, v4hi, v2si)
|
||||
VAR6 (MAC_LANE, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR2 (MAC_LANE, vmlsls_lane, v4hi, v2si)
|
||||
VAR2 (MAC_LANE, vmlslu_lane, v4hi, v2si)
|
||||
VAR2 (MAC_LANE, vqdmlsl_lane, v4hi, v2si)
|
||||
VAR6 (BINOP, vmul_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR6 (LANEMAC, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR2 (LANEMAC, vmlals_n, v4hi, v2si)
|
||||
VAR2 (LANEMAC, vmlalu_n, v4hi, v2si)
|
||||
VAR2 (LANEMAC, vqdmlal_n, v4hi, v2si)
|
||||
VAR6 (LANEMAC, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR2 (LANEMAC, vmlsls_n, v4hi, v2si)
|
||||
VAR2 (LANEMAC, vmlslu_n, v4hi, v2si)
|
||||
VAR2 (LANEMAC, vqdmlsl_n, v4hi, v2si)
|
||||
VAR6 (MAC_N, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR2 (MAC_N, vmlals_n, v4hi, v2si)
|
||||
VAR2 (MAC_N, vmlalu_n, v4hi, v2si)
|
||||
VAR2 (MAC_N, vqdmlal_n, v4hi, v2si)
|
||||
VAR6 (MAC_N, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
|
||||
VAR2 (MAC_N, vmlsls_n, v4hi, v2si)
|
||||
VAR2 (MAC_N, vmlslu_n, v4hi, v2si)
|
||||
VAR2 (MAC_N, vqdmlsl_n, v4hi, v2si)
|
||||
VAR10 (SETLANE, vext,
|
||||
v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
|
||||
VAR8 (UNOP, vrev64, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf)
|
||||
|
|
|
|||
|
|
@ -2663,8 +2663,6 @@
|
|||
(match_operand:SI 2 "immediate_operand" "")]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
|
||||
if (BYTES_BIG_ENDIAN)
|
||||
{
|
||||
/* The intrinsics are defined in terms of a model where the
|
||||
|
|
@ -2694,8 +2692,6 @@
|
|||
(match_operand:SI 2 "immediate_operand" "")]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
|
||||
if (BYTES_BIG_ENDIAN)
|
||||
{
|
||||
/* The intrinsics are defined in terms of a model where the
|
||||
|
|
@ -2725,7 +2721,6 @@
|
|||
(match_operand:SI 2 "immediate_operand" "")]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[2], 0, 1);
|
||||
emit_move_insn (operands[0], operands[1]);
|
||||
DONE;
|
||||
})
|
||||
|
|
@ -2736,18 +2731,11 @@
|
|||
(match_operand:SI 2 "immediate_operand" "")]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
switch (INTVAL (operands[2]))
|
||||
{
|
||||
case 0:
|
||||
emit_move_insn (operands[0], gen_lowpart (DImode, operands[1]));
|
||||
break;
|
||||
case 1:
|
||||
emit_move_insn (operands[0], gen_highpart (DImode, operands[1]));
|
||||
break;
|
||||
default:
|
||||
neon_lane_bounds (operands[2], 0, 1);
|
||||
FAIL;
|
||||
}
|
||||
int lane = INTVAL (operands[2]);
|
||||
gcc_assert ((lane ==0) || (lane == 1));
|
||||
emit_move_insn (operands[0], lane == 0
|
||||
? gen_lowpart (DImode, operands[1])
|
||||
: gen_highpart (DImode, operands[1]));
|
||||
DONE;
|
||||
})
|
||||
|
||||
|
|
@ -2759,7 +2747,6 @@
|
|||
"TARGET_NEON"
|
||||
{
|
||||
unsigned int elt = INTVAL (operands[3]);
|
||||
neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
|
||||
if (BYTES_BIG_ENDIAN)
|
||||
{
|
||||
|
|
@ -2782,7 +2769,6 @@
|
|||
(match_operand:SI 3 "immediate_operand" "i")]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[3], 0, 1);
|
||||
emit_move_insn (operands[0], operands[1]);
|
||||
DONE;
|
||||
})
|
||||
|
|
@ -2864,7 +2850,6 @@
|
|||
(match_operand:SI 2 "immediate_operand" "i")]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<V_double_vector_mode>mode));
|
||||
if (BYTES_BIG_ENDIAN)
|
||||
{
|
||||
unsigned int elt = INTVAL (operands[2]);
|
||||
|
|
@ -2885,7 +2870,6 @@
|
|||
(match_operand:SI 2 "immediate_operand" "i")]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[2], 0, 1);
|
||||
emit_move_insn (operands[0], operands[1]);
|
||||
DONE;
|
||||
})
|
||||
|
|
@ -2897,7 +2881,6 @@
|
|||
(match_operand:SI 2 "immediate_operand" "i")]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[2], 0, 1);
|
||||
emit_insn (gen_neon_vdup_nv2di (operands[0], operands[1]));
|
||||
DONE;
|
||||
})
|
||||
|
|
@ -3097,7 +3080,6 @@
|
|||
UNSPEC_VMUL_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vmul.<V_if_elem>\t%P0, %P1, %P2[%c3]";
|
||||
}
|
||||
[(set (attr "type")
|
||||
|
|
@ -3115,7 +3097,6 @@
|
|||
UNSPEC_VMUL_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<V_HALF>mode));
|
||||
return "vmul.<V_if_elem>\t%q0, %q1, %P2[%c3]";
|
||||
}
|
||||
[(set (attr "type")
|
||||
|
|
@ -3133,7 +3114,6 @@
|
|||
VMULL_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vmull.<sup>%#<V_sz_elem>\t%q0, %P1, %P2[%c3]";
|
||||
}
|
||||
[(set_attr "type" "neon_mul_<V_elem_ch>_scalar_long")]
|
||||
|
|
@ -3148,7 +3128,6 @@
|
|||
UNSPEC_VQDMULL_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vqdmull.<V_s_elem>\t%q0, %P1, %P2[%c3]";
|
||||
}
|
||||
[(set_attr "type" "neon_sat_mul_<V_elem_ch>_scalar_long")]
|
||||
|
|
@ -3163,7 +3142,6 @@
|
|||
VQDMULH_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vq<r>dmulh.<V_s_elem>\t%q0, %q1, %P2[%c3]";
|
||||
}
|
||||
[(set_attr "type" "neon_sat_mul_<V_elem_ch>_scalar_q")]
|
||||
|
|
@ -3178,7 +3156,6 @@
|
|||
VQDMULH_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vq<r>dmulh.<V_s_elem>\t%P0, %P1, %P2[%c3]";
|
||||
}
|
||||
[(set_attr "type" "neon_sat_mul_<V_elem_ch>_scalar_q")]
|
||||
|
|
@ -3194,7 +3171,6 @@
|
|||
UNSPEC_VMLA_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vmla.<V_if_elem>\t%P0, %P2, %P3[%c4]";
|
||||
}
|
||||
[(set (attr "type")
|
||||
|
|
@ -3213,7 +3189,6 @@
|
|||
UNSPEC_VMLA_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vmla.<V_if_elem>\t%q0, %q2, %P3[%c4]";
|
||||
}
|
||||
[(set (attr "type")
|
||||
|
|
@ -3232,7 +3207,6 @@
|
|||
VMLAL_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vmlal.<sup>%#<V_sz_elem>\t%q0, %P2, %P3[%c4]";
|
||||
}
|
||||
[(set_attr "type" "neon_mla_<V_elem_ch>_scalar_long")]
|
||||
|
|
@ -3248,7 +3222,6 @@
|
|||
UNSPEC_VQDMLAL_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vqdmlal.<V_s_elem>\t%q0, %P2, %P3[%c4]";
|
||||
}
|
||||
[(set_attr "type" "neon_sat_mla_<V_elem_ch>_scalar_long")]
|
||||
|
|
@ -3264,7 +3237,6 @@
|
|||
UNSPEC_VMLS_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vmls.<V_if_elem>\t%P0, %P2, %P3[%c4]";
|
||||
}
|
||||
[(set (attr "type")
|
||||
|
|
@ -3283,7 +3255,6 @@
|
|||
UNSPEC_VMLS_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vmls.<V_if_elem>\t%q0, %q2, %P3[%c4]";
|
||||
}
|
||||
[(set (attr "type")
|
||||
|
|
@ -3302,7 +3273,6 @@
|
|||
VMLSL_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vmlsl.<sup>%#<V_sz_elem>\t%q0, %P2, %P3[%c4]";
|
||||
}
|
||||
[(set_attr "type" "neon_mla_<V_elem_ch>_scalar_long")]
|
||||
|
|
@ -3318,7 +3288,6 @@
|
|||
UNSPEC_VQDMLSL_LANE))]
|
||||
"TARGET_NEON"
|
||||
{
|
||||
neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
|
||||
return "vqdmlsl.<V_s_elem>\t%q0, %P2, %P3[%c4]";
|
||||
}
|
||||
[(set_attr "type" "neon_sat_mla_<V_elem_ch>_scalar_long")]
|
||||
|
|
|
|||
Loading…
Reference in New Issue