mirror of git://gcc.gnu.org/git/gcc.git
i386.c (get_thread_pointer): Add tp_mode argument.
* config/i386/i386.c (get_thread_pointer): Add tp_mode argument. Generate ZERO_EXTEND in place if GET_MODE (tp) != tp_mode. (legitimize_tls_address) <TLS_MODEL_INITIAL_EXEC>: Always generate DImode UNSPEC_GOTNTPOFF references on TARGET_64BIT. (ix86_decompose_address): Allow zero extended UNSPEC_TP references. Revert: 2012-03-13 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.h (TARGET_TLS_INDIRECT_SEG_REFS): New. * config/i386/i386.c (ix86_decompose_address): Use TARGET_TLS_INDIRECT_SEG_REFS to prevent %fs:(%reg) addresses. (legitimize_tls_address): Use TARGET_TLS_INDIRECT_SEG_REFS to load thread pointer to a register. Revert: 2012-03-10 H.J. Lu <hongjiu.lu@intel.com> * config/i386/i386.c (ix86_decompose_address): Disallow fs:(reg) if Pmode != word_mode. (legitimize_tls_address): Call gen_tls_initial_exec_x32 if Pmode == SImode for TARGET_X32. * config/i386/i386.md (UNSPEC_TLS_IE_X32): New. (tls_initial_exec_x32): Likewise. From-SVN: r185536
This commit is contained in:
Uros Bizjak
parent
ae5a8549b5
commit
edd8bb126d
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@ -1,3 +1,31 @@
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2012-03-19 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (get_thread_pointer): Add tp_mode argument.
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Generate ZERO_EXTEND in place if GET_MODE (tp) != tp_mode.
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(legitimize_tls_address) <TLS_MODEL_INITIAL_EXEC>: Always generate
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DImode UNSPEC_GOTNTPOFF references on TARGET_64BIT.
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(ix86_decompose_address): Allow zero extended UNSPEC_TP references.
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Revert:
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2012-03-13 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.h (TARGET_TLS_INDIRECT_SEG_REFS): New.
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* config/i386/i386.c (ix86_decompose_address): Use
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TARGET_TLS_INDIRECT_SEG_REFS to prevent %fs:(%reg) addresses.
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(legitimize_tls_address): Use TARGET_TLS_INDIRECT_SEG_REFS to load
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thread pointer to a register.
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Revert:
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2012-03-10 H.J. Lu <hongjiu.lu@intel.com>
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* config/i386/i386.c (ix86_decompose_address): Disallow fs:(reg)
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if Pmode != word_mode.
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(legitimize_tls_address): Call gen_tls_initial_exec_x32 if
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Pmode == SImode for TARGET_X32.
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* config/i386/i386.md (UNSPEC_TLS_IE_X32): New.
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(tls_initial_exec_x32): Likewise.
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2012-03-19 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/50751
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@ -6,7 +34,7 @@
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* config/sh/sh.c (sh_address_cost): Add SH2A special case.
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(sh_legitimate_index_p): Allow QImode displacements for non-SH2A.
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(sh_legitimize_address): Add QImode displacement handling.
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(sh_cannot_change_mode_class): Disallow GENERAL_REGS for SFmode
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(sh_cannot_change_mode_class): Disallow GENERAL_REGS for SFmode
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vector subregs.
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(sh_secondary_reload): Add QImode displacement handling.
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* config/sh/predicates.md (movsrc_no_disp_mem_operand): New predicate.
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@ -11514,6 +11514,10 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
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scale = 1 << scale;
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break;
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case ZERO_EXTEND:
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op = XEXP (op, 0);
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/* FALLTHRU */
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case UNSPEC:
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if (XINT (op, 1) == UNSPEC_TP
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&& TARGET_TLS_DIRECT_SEG_REFS
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@ -12483,15 +12487,20 @@ legitimize_pic_address (rtx orig, rtx reg)
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/* Load the thread pointer. If TO_REG is true, force it into a register. */
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static rtx
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get_thread_pointer (bool to_reg)
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get_thread_pointer (enum machine_mode tp_mode, bool to_reg)
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{
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rtx tp = gen_rtx_UNSPEC (ptr_mode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
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if (GET_MODE (tp) != Pmode)
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tp = convert_to_mode (Pmode, tp, 1);
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if (GET_MODE (tp) != tp_mode)
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{
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gcc_assert (GET_MODE (tp) == SImode);
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gcc_assert (tp_mode == DImode);
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tp = gen_rtx_ZERO_EXTEND (tp_mode, tp);
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}
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if (to_reg)
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tp = copy_addr_to_reg (tp);
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tp = copy_to_mode_reg (tp_mode, tp);
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return tp;
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}
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@ -12543,6 +12552,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
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{
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rtx dest, base, off;
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rtx pic = NULL_RTX, tp = NULL_RTX;
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enum machine_mode tp_mode = Pmode;
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int type;
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switch (model)
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@ -12568,7 +12578,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
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else
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emit_insn (gen_tls_dynamic_gnu2_32 (dest, x, pic));
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tp = get_thread_pointer (true);
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tp = get_thread_pointer (Pmode, true);
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dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, tp, dest));
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set_unique_reg_note (get_last_insn (), REG_EQUAL, x);
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@ -12618,7 +12628,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
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else
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emit_insn (gen_tls_dynamic_gnu2_32 (base, tmp, pic));
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tp = get_thread_pointer (true);
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tp = get_thread_pointer (Pmode, true);
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set_unique_reg_note (get_last_insn (), REG_EQUAL,
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gen_rtx_MINUS (Pmode, tmp, tp));
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}
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@ -12674,18 +12684,10 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
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emit_insn (gen_tls_initial_exec_64_sun (dest, x));
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return dest;
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}
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else if (Pmode == SImode)
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{
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/* Always generate
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movl %fs:0, %reg32
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addl xgottpoff(%rip), %reg32
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to support linker IE->LE optimization and avoid
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fs:(%reg32) as memory operand. */
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dest = gen_reg_rtx (Pmode);
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emit_insn (gen_tls_initial_exec_x32 (dest, x));
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return dest;
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}
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/* Generate DImode references to avoid %fs:(%reg32)
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problems and linker IE->LE relaxation bug. */
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tp_mode = DImode;
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pic = NULL;
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type = UNSPEC_GOTNTPOFF;
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}
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@ -12708,24 +12710,23 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
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type = UNSPEC_INDNTPOFF;
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}
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off = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, x), type);
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off = gen_rtx_CONST (Pmode, off);
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off = gen_rtx_UNSPEC (tp_mode, gen_rtvec (1, x), type);
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off = gen_rtx_CONST (tp_mode, off);
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if (pic)
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off = gen_rtx_PLUS (Pmode, pic, off);
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off = gen_const_mem (Pmode, off);
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off = gen_rtx_PLUS (tp_mode, pic, off);
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off = gen_const_mem (tp_mode, off);
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set_mem_alias_set (off, ix86_GOT_alias_set ());
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if (TARGET_64BIT || TARGET_ANY_GNU_TLS)
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{
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base = get_thread_pointer (for_mov
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|| !(TARGET_TLS_DIRECT_SEG_REFS
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&& TARGET_TLS_INDIRECT_SEG_REFS));
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off = force_reg (Pmode, off);
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return gen_rtx_PLUS (Pmode, base, off);
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base = get_thread_pointer (tp_mode,
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for_mov || !TARGET_TLS_DIRECT_SEG_REFS);
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off = force_reg (tp_mode, off);
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return gen_rtx_PLUS (tp_mode, base, off);
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}
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else
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{
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base = get_thread_pointer (true);
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base = get_thread_pointer (Pmode, true);
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dest = gen_reg_rtx (Pmode);
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emit_insn (ix86_gen_sub3 (dest, base, off));
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}
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@ -12739,14 +12740,13 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
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if (TARGET_64BIT || TARGET_ANY_GNU_TLS)
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{
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base = get_thread_pointer (for_mov
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|| !(TARGET_TLS_DIRECT_SEG_REFS
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&& TARGET_TLS_INDIRECT_SEG_REFS));
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base = get_thread_pointer (Pmode,
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for_mov || !TARGET_TLS_DIRECT_SEG_REFS);
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return gen_rtx_PLUS (Pmode, base, off);
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}
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else
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{
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base = get_thread_pointer (true);
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base = get_thread_pointer (Pmode, true);
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dest = gen_reg_rtx (Pmode);
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emit_insn (ix86_gen_sub3 (dest, base, off));
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}
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@ -13274,8 +13274,7 @@ ix86_delegitimize_tls_address (rtx orig_x)
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rtx x = orig_x, unspec;
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struct ix86_address addr;
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if (!(TARGET_TLS_DIRECT_SEG_REFS
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&& TARGET_TLS_INDIRECT_SEG_REFS))
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if (!TARGET_TLS_DIRECT_SEG_REFS)
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return orig_x;
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if (MEM_P (x))
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x = XEXP (x, 0);
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@ -467,9 +467,6 @@ extern int x86_prefetch_sse;
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#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0
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#endif
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/* Address override works only on the (%reg) part of %fs:(%reg). */
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#define TARGET_TLS_INDIRECT_SEG_REFS (Pmode == word_mode)
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/* Fence to use after loop using storent. */
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extern tree x86_mfence;
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@ -96,7 +96,6 @@
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UNSPEC_TLS_LD_BASE
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UNSPEC_TLSDESC
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UNSPEC_TLS_IE_SUN
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UNSPEC_TLS_IE_X32
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;; Other random patterns
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UNSPEC_SCAS
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@ -12836,28 +12835,6 @@
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}
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[(set_attr "type" "multi")])
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;; When Pmode == SImode, there may be no REX prefix for ADD. Avoid
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;; any instructions between MOV and ADD, which may interfere linker
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;; IE->LE optimization, since the last byte of the previous instruction
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;; before ADD may look like a REX prefix. This also avoids
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;; movl x@gottpoff(%rip), %reg32
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;; movl $fs:(%reg32), %reg32
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;; Since address override works only on the (reg32) part in fs:(reg32),
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;; we can't use it as memory operand.
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(define_insn "tls_initial_exec_x32"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(unspec:SI
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[(match_operand 1 "tls_symbolic_operand")]
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UNSPEC_TLS_IE_X32))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_X32"
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{
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output_asm_insn
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("mov{l}\t{%%fs:0, %0|%0, DWORD PTR fs:0}", operands);
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return "add{l}\t{%a1@gottpoff(%%rip), %0|%0, %a1@gottpoff[rip]}";
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}
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[(set_attr "type" "multi")])
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;; GNU2 TLS patterns can be split.
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(define_expand "tls_dynamic_gnu2_32"
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