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s390.md: ("HQI"): New mode macro. 

2005-05-09  Adrian Straetling  <straetling@de.ibm.com>

	* config/s390/s390.md: ("HQI"): New mode macro.
	("icm_lo", "icm_hi", "max_uint"): New mode attributes.
	("*tmhi_full", "*tmqi_full"): Merge.
	("*tsthiCCT", "*tstqiCCT"): Merge.
	("*tsthi", "*tstqi"): Merge.
	("*tsthi_cconly", "tstqi_cconly"): Merge.
	("*sethighhisi", "*sethighqisi"): Merge.

From-SVN: r99449
This commit is contained in:
Adrian Straetling 2005-05-09 17:01:36 +00:00 committed by Ulrich Weigand
parent 1f4a355acb
commit f52c81dd6b
2 changed files with 57 additions and 80 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2005-05-09 Adrian Straetling <straetling@de.ibm.com>
* config/s390/s390.md: ("HQI"): New mode macro.
("icm_lo", "icm_hi", "max_uint"): New mode attributes.
("*tmhi_full", "*tmqi_full"): Merge.
("*tsthiCCT", "*tstqiCCT"): Merge.
("*tsthi", "*tstqi"): Merge.
("*tsthi_cconly", "tstqi_cconly"): Merge.
("*sethighhisi", "*sethighqisi"): Merge.
2005-05-09 Kazu Hirata <kazu@cs.umass.edu> 2005-05-09 Kazu Hirata <kazu@cs.umass.edu>
* crtstuff.c, integrate.h, tree-scalar-evolution.h, * crtstuff.c, integrate.h, tree-scalar-evolution.h,

127
gcc/config/s390/s390.md
View File

@ -232,6 +232,26 @@
;; Predicates ;; Predicates
(include "predicates.md") (include "predicates.md")
;; Macros
;; This mode macro allows the QI and HI patterns to be defined from
;; the same template.
(define_mode_macro HQI [HI QI])
;; ICM mask required to load MODE value into the highest subreg
;; of a SImode register.
(define_mode_attr icm_hi [(HI "12") (QI "8")])
;; ICM mask required to load MODE value into the lowest subreg
;; of a SImode register.
(define_mode_attr icm_lo [(HI "3") (QI "1")])
;; Maximum unsigned integer that fits in MODE.
(define_mode_attr max_uint [(HI "65535") (QI "255")])
;; ;;
;;- Compare instructions. ;;- Compare instructions.
;; ;;
@ -322,20 +342,12 @@
tml\t%0,%i1" tml\t%0,%i1"
[(set_attr "op_type" "RI")]) [(set_attr "op_type" "RI")])
(define_insn "*tmhi_full" (define_insn "*tm<mode>_full"
[(set (reg 33) [(set (reg 33)
(compare (match_operand:HI 0 "register_operand" "d") (compare (match_operand:HQI 0 "register_operand" "d")
(match_operand:HI 1 "immediate_operand" "n")))] (match_operand:HQI 1 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))" "s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))"
"tml\t%0,65535" "tml\t%0,<max_uint>"
[(set_attr "op_type" "RI")])
(define_insn "*tmqi_full"
[(set (reg 33)
(compare (match_operand:QI 0 "register_operand" "d")
(match_operand:QI 1 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))"
"tml\t%0,255"
[(set_attr "op_type" "RI")]) [(set_attr "op_type" "RI")])
@ -413,17 +425,17 @@
"ltr\t%0,%0" "ltr\t%0,%0"
[(set_attr "op_type" "RR")]) [(set_attr "op_type" "RR")])
(define_insn "*tsthiCCT" (define_insn "*tst<mode>CCT"
[(set (reg 33) [(set (reg 33)
(compare (match_operand:HI 0 "nonimmediate_operand" "?Q,?S,d") (compare (match_operand:HQI 0 "nonimmediate_operand" "?Q,?S,d")
(match_operand:HI 1 "const0_operand" ""))) (match_operand:HQI 1 "const0_operand" "")))
(set (match_operand:HI 2 "register_operand" "=d,d,0") (set (match_operand:HQI 2 "register_operand" "=d,d,0")
(match_dup 0))] (match_dup 0))]
"s390_match_ccmode(insn, CCTmode)" "s390_match_ccmode(insn, CCTmode)"
"@ "@
icm\t%2,3,%S0 icm\t%2,<icm_lo>,%S0
icmy\t%2,3,%S0 icmy\t%2,<icm_lo>,%S0
tml\t%0,65535" tml\t%0,<max_uint>"
[(set_attr "op_type" "RS,RSY,RI")]) [(set_attr "op_type" "RS,RSY,RI")])
(define_insn "*tsthiCCT_cconly" (define_insn "*tsthiCCT_cconly"
@ -438,42 +450,6 @@
tml\t%0,65535" tml\t%0,65535"
[(set_attr "op_type" "RS,RSY,RI")]) [(set_attr "op_type" "RS,RSY,RI")])
(define_insn "*tsthi"
[(set (reg 33)
(compare (match_operand:HI 0 "s_operand" "Q,S")
(match_operand:HI 1 "const0_operand" "")))
(set (match_operand:HI 2 "register_operand" "=d,d")
(match_dup 0))]
"s390_match_ccmode(insn, CCSmode)"
"@
icm\t%2,3,%S0
icmy\t%2,3,%S0"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*tsthi_cconly"
[(set (reg 33)
(compare (match_operand:HI 0 "s_operand" "Q,S")
(match_operand:HI 1 "const0_operand" "")))
(clobber (match_scratch:HI 2 "=d,d"))]
"s390_match_ccmode(insn, CCSmode)"
"@
icm\t%2,3,%S0
icmy\t%2,3,%S0"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*tstqiCCT"
[(set (reg 33)
(compare (match_operand:QI 0 "nonimmediate_operand" "?Q,?S,d")
(match_operand:QI 1 "const0_operand" "")))
(set (match_operand:QI 2 "register_operand" "=d,d,0")
(match_dup 0))]
"s390_match_ccmode(insn, CCTmode)"
"@
icm\t%2,1,%S0
icmy\t%2,1,%S0
tml\t%0,255"
[(set_attr "op_type" "RS,RSY,RI")])
(define_insn "*tstqiCCT_cconly" (define_insn "*tstqiCCT_cconly"
[(set (reg 33) [(set (reg 33)
(compare (match_operand:QI 0 "nonimmediate_operand" "?Q,?S,d") (compare (match_operand:QI 0 "nonimmediate_operand" "?Q,?S,d")
@ -485,27 +461,27 @@
tml\t%0,255" tml\t%0,255"
[(set_attr "op_type" "SI,SIY,RI")]) [(set_attr "op_type" "SI,SIY,RI")])
(define_insn "*tstqi" (define_insn "*tst<mode>"
[(set (reg 33) [(set (reg 33)
(compare (match_operand:QI 0 "s_operand" "Q,S") (compare (match_operand:HQI 0 "s_operand" "Q,S")
(match_operand:QI 1 "const0_operand" ""))) (match_operand:HQI 1 "const0_operand" "")))
(set (match_operand:QI 2 "register_operand" "=d,d") (set (match_operand:HQI 2 "register_operand" "=d,d")
(match_dup 0))] (match_dup 0))]
"s390_match_ccmode(insn, CCSmode)" "s390_match_ccmode(insn, CCSmode)"
"@ "@
icm\t%2,1,%S0 icm\t%2,<icm_lo>,%S0
icmy\t%2,1,%S0" icmy\t%2,<icm_lo>,%S0"
[(set_attr "op_type" "RS,RSY")]) [(set_attr "op_type" "RS,RSY")])
(define_insn "*tstqi_cconly" (define_insn "*tst<mode>_cconly"
[(set (reg 33) [(set (reg 33)
(compare (match_operand:QI 0 "s_operand" "Q,S") (compare (match_operand:HQI 0 "s_operand" "Q,S")
(match_operand:QI 1 "const0_operand" ""))) (match_operand:HQI 1 "const0_operand" "")))
(clobber (match_scratch:QI 2 "=d,d"))] (clobber (match_scratch:HQI 2 "=d,d"))]
"s390_match_ccmode(insn, CCSmode)" "s390_match_ccmode(insn, CCSmode)"
"@ "@
icm\t%2,1,%S0 icm\t%2,<icm_lo>,%S0
icmy\t%2,1,%S0" icmy\t%2,<icm_lo>,%S0"
[(set_attr "op_type" "RS,RSY")]) [(set_attr "op_type" "RS,RSY")])
@ -2338,24 +2314,15 @@
;;- Conversion instructions. ;;- Conversion instructions.
;; ;;
(define_insn "*sethighqisi"
[(set (match_operand:SI 0 "register_operand" "=d,d")
(unspec:SI [(match_operand:QI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]
""
"@
icm\t%0,8,%S1
icmy\t%0,8,%S1"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*sethighhisi" (define_insn "*sethigh<mode>si"
[(set (match_operand:SI 0 "register_operand" "=d,d") [(set (match_operand:SI 0 "register_operand" "=d,d")
(unspec:SI [(match_operand:HI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH)) (unspec:SI [(match_operand:HQI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))] (clobber (reg:CC 33))]
"" ""
"@ "@
icm\t%0,12,%S1 icm\t%0,<icm_hi>,%S1
icmy\t%0,12,%S1" icmy\t%0,<icm_hi>,%S1"
[(set_attr "op_type" "RS,RSY")]) [(set_attr "op_type" "RS,RSY")])
(define_insn "*sethighqidi_64" (define_insn "*sethighqidi_64"