mirror of git://gcc.gnu.org/git/gcc.git
rl78-real.md (*addqi_real): Allow SADDR types for inc/dec.
* config/rl78/rl78-real.md (*addqi_real): Allow SADDR types for inc/dec. (*addhi3_real): Likewise. * config/rl78/rl78-virt.md (*inc<mode>3_virt): Additional pattern to match incrementing memory. * config/rl78/predicates.md (rl78_1_2_operand): New. * config/rl78/rl78.c (rl78_force_nonfar_3): Allow far mem-mem if it's the same and only mem. (rl78_alloc_physical_registers_op2): If there's effectively only one MEM, transcode it into HL. (rl78_far_p): Reject addresses that aren't legitimate. From-SVN: r221164
This commit is contained in:
DJ Delorie
DJ Delorie
parent
bf66b9b45c
commit
f6115d44cc
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@ -1,3 +1,17 @@
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2015-03-03 DJ Delorie <dj@redhat.com>
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* config/rl78/rl78-real.md (*addqi_real): Allow SADDR types for
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inc/dec.
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(*addhi3_real): Likewise.
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* config/rl78/rl78-virt.md (*inc<mode>3_virt): Additional
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pattern to match incrementing memory.
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* config/rl78/predicates.md (rl78_1_2_operand): New.
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* config/rl78/rl78.c (rl78_force_nonfar_3): Allow far mem-mem if
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it's the same and only mem.
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(rl78_alloc_physical_registers_op2): If there's effectively only
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one MEM, transcode it into HL.
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(rl78_far_p): Reject addresses that aren't legitimate.
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2015-03-03 Eric Botcazou <ebotcazou@adacore.com>
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* fold-const.c (round_up_loc): Cast divisor to HOST_WIDE_INT before
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@ -58,6 +58,21 @@
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(and (match_code "const_int")
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(match_test "IN_RANGE (INTVAL (op), 0, 255)")))
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(define_predicate "rl78_incdec_memory_operand"
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(and (match_code "mem")
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(match_test "rl78_far_p (op)
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|| satisfies_constraint_Wsa (op)
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|| satisfies_constraint_Whl (op)
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|| satisfies_constraint_Wh1 (op)
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|| satisfies_constraint_Wab (op)")
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)
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)
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(define_predicate "rl78_1_2_operand"
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(and (match_code "const_int")
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(match_test "IN_RANGE (INTVAL (op), 1, 2)
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|| IN_RANGE (INTVAL (op), -2, -1)")))
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(define_predicate "rl78_24_operand"
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(and (match_code "const_int")
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(match_test "INTVAL (op) == 2 || INTVAL (op) == 4")))
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@ -113,14 +113,14 @@
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;;---------- Arithmetic ------------------------
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(define_insn "*addqi3_real"
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[(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=rvWabWhlWh1,rvWabWhlWh1,a,*bcdehl,Wsa")
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[(set (match_operand:QI 0 "rl78_nonimmediate_operand" "=rvWabWhlWh1Wsa,rvWabWhlWh1Wsa,a,*bcdehl,Wsa")
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(plus:QI (match_operand:QI 1 "rl78_general_operand" "%0,0,0,0,0")
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(match_operand:QI 2 "rl78_general_operand" "K,L,RWhlWh1Wabi,a,i")))
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]
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"rl78_real_insns_ok ()"
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"@
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inc\t%0
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dec\t%0
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inc\t%p0
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dec\t%p0
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add\t%0, %2
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add\t%0, %2
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add\t%0, %2"
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@ -128,7 +128,7 @@
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)
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(define_insn "*addhi3_real"
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[(set (match_operand:HI 0 "rl78_nonimmediate_operand" "=vABDTWh1Wab,vABDTWh1Wab,v,v,A,S,S,A")
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[(set (match_operand:HI 0 "rl78_nonimmediate_operand" "=vABDTWhlWh1WabWsa,vABDTWhlWh1WabWsa,v,v,A,S,S,A")
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(plus:HI (match_operand:HI 1 "rl78_general_operand" "%0,0,0,0,0,0,0,S")
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(match_operand:HI 2 "" "K,L,N,O,RWh1WhlWabiv,Int8Qs8,J,Ri")))
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]
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@ -85,6 +85,15 @@
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;;---------- Arithmetic ------------------------
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(define_insn "*inc<mode>3_virt"
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[(set (match_operand:QHI 0 "rl78_incdec_memory_operand" "=vm")
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(plus:QHI (match_operand:QHI 1 "rl78_incdec_memory_operand" "0")
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(match_operand:QHI 2 "rl78_1_2_operand" "KLNO")))
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]
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"rl78_virt_insns_ok ()"
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"v.inc\t%0, %1, %2"
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)
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(define_insn "*add<mode>3_virt"
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[(set (match_operand:QHI 0 "rl78_nonfar_nonimm_operand" "=vY,S")
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(plus:QHI (match_operand:QHI 1 "rl78_nonfar_operand" "viY,0")
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@ -579,6 +579,13 @@ rl78_force_nonfar_3 (rtx *operands, rtx (*gen)(rtx,rtx,rtx))
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int did = 0;
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rtx temp_reg = NULL;
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/* As an exception, we allow two far operands if they're identical
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and the third operand is not a MEM. This allows global variables
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to be incremented, for example. */
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if (rtx_equal_p (operands[0], operands[1])
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&& ! MEM_P (operands[2]))
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return 0;
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/* FIXME: Likewise. */
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if (rl78_far_p (operands[1]))
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{
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@ -970,6 +977,12 @@ rl78_far_p (rtx x)
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fprintf (stderr, "\033[35mrl78_far_p: "); debug_rtx (x);
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fprintf (stderr, " = %d\033[0m\n", MEM_ADDR_SPACE (x) == ADDR_SPACE_FAR);
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#endif
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/* Not all far addresses are legitimate, because the devirtualizer
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can't handle them. */
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if (! rl78_as_legitimate_address (GET_MODE (x), XEXP (x, 0), false, ADDR_SPACE_FAR))
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return 0;
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return GET_MODE_BITSIZE (rl78_addr_space_address_mode (MEM_ADDR_SPACE (x))) == 32;
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}
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@ -3007,9 +3020,18 @@ rl78_alloc_physical_registers_op2 (rtx_insn * insn)
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if (rtx_equal_p (OP (0), OP (1)))
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{
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OP (0) =
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OP (1) = transcode_memory_rtx (OP (1), DE, insn);
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OP (2) = transcode_memory_rtx (OP (2), HL, insn);
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if (MEM_P (OP (2)))
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{
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OP (0) =
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OP (1) = transcode_memory_rtx (OP (1), DE, insn);
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OP (2) = transcode_memory_rtx (OP (2), HL, insn);
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}
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else
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{
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OP (0) =
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OP (1) = transcode_memory_rtx (OP (1), HL, insn);
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OP (2) = transcode_memory_rtx (OP (2), DE, insn);
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}
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}
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else if (rtx_equal_p (OP (0), OP (2)))
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{
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