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re PR target/77403 (assemble failure of vinserti64x4 with -masm=intel) 

PR target/77403
	* config/i386/sse.md (vec_set_lo_<mode><mask_name>): Fix assembler
	template for intel asm dialect.
	(vec_set_hi_<mode><mask_name>): Ditto.

testsuite/ChangeLog:

	PR target/77403
	* gcc.target/i386/pr77403.c: New test.

From-SVN: r239842
This commit is contained in:
Uros Bizjak 2016-08-29 22:26:13 +02:00
parent 3787ecfdcd
commit f8c014ea57
4 changed files with 33 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2016-08-29 Uros Bizjak <ubizjak@gmail.com>
PR target/77403
* config/i386/sse.md (vec_set_lo_<mode><mask_name>): Fix assembler
template for intel asm dialect.
(vec_set_hi_<mode><mask_name>): Ditto.
2016-08-29 Eric Botcazou <ebotcazou@adacore.com>
* Makefile.in (gcov-iov.h): Add dummy recipe.

8
gcc/config/i386/sse.md
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@ -11866,7 +11866,7 @@
(const_int 12) (const_int 13)
(const_int 14) (const_int 15)]))))]
"TARGET_AVX512DQ"
"vinsert<shuffletype>32x8\t{$0x0, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x0}"
"vinsert<shuffletype>32x8\t{$0x0, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x0}"
[(set_attr "type" "sselog")
(set_attr "length_immediate" "1")
(set_attr "prefix" "evex")
@ -11883,7 +11883,7 @@
(const_int 6) (const_int 7)]))
(match_operand:<ssehalfvecmode> 2 "nonimmediate_operand" "vm")))]
"TARGET_AVX512DQ"
"vinsert<shuffletype>32x8\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x1}"
"vinsert<shuffletype>32x8\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x1}"
[(set_attr "type" "sselog")
(set_attr "length_immediate" "1")
(set_attr "prefix" "evex")
@ -11898,7 +11898,7 @@
(parallel [(const_int 4) (const_int 5)
(const_int 6) (const_int 7)]))))]
"TARGET_AVX512F"
"vinsert<shuffletype>64x4\t{$0x0, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x0}"
"vinsert<shuffletype>64x4\t{$0x0, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x0}"
[(set_attr "type" "sselog")
(set_attr "length_immediate" "1")
(set_attr "prefix" "evex")
@ -11913,7 +11913,7 @@
(const_int 2) (const_int 3)]))
(match_operand:<ssehalfvecmode> 2 "nonimmediate_operand" "vm")))]
"TARGET_AVX512F"
"vinsert<shuffletype>64x4\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x1}"
"vinsert<shuffletype>64x4\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x1}"
[(set_attr "type" "sselog")
(set_attr "length_immediate" "1")
(set_attr "prefix" "evex")

9
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2016-08-29 Uros Bizjak <ubizjak@gmail.com>
PR target/77403
* gcc.target/i386/pr77403.c: New test.
2016-08-29 Tom de Vries <tom@codesourcery.com>
backport from trunk:
@ -145,8 +150,8 @@
2016-07-20 Martin Jambor <mjambor@suse.cz>
PR fortran/71688
* gfortran.dg/pr71688.f90: New test.
PR fortran/71688
* gfortran.dg/pr71688.f90: New test.
2016-07-19 Jakub Jelinek <jakub@redhat.com>

15
gcc/testsuite/gcc.target/i386/pr77403.c Normal file
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@ -0,0 +1,15 @@
/* { dg-do assemble } */
/* { dg-require-effective-target int128 } */
/* { dg-require-effective-target avx512f } */
/* { dg-require-effective-target masm_intel } */
/* { dg-options "-O -mavx512f -masm=intel" } */
typedef __int128 V __attribute__((vector_size(64)));
V v;
void
foo()
{
v ^= (V){1};
}