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20101011-1.c (__aeabi_idiv0): Define for ARM.
gcc/testsuite/ * gcc.c-torture/execute/20101011-1.c (__aeabi_idiv0): Define for ARM. (DO_TEST): Define to 1 for appropriate ARM targets. From-SVN: r189780
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2012-07-23 Julian Brown <julian@codesourcery.com>
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* gcc.c-torture/execute/20101011-1.c (__aeabi_idiv0): Define for
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ARM.
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(DO_TEST): Define to 1 for appropriate ARM targets.
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2012-07-22 Steven Bosscher <steven@gcc.gnu.org>
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PR tree-optimization/53881
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@ -15,9 +15,6 @@
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#elif defined (__TMS320C6X__)
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/* On TI C6X division by zero does not trap. */
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# define DO_TEST 0
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#elif defined (__arm__)
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/* We cannot rely on division by zero generating a trap. */
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# define DO_TEST 0
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#elif defined (__mips__) && !defined(__linux__)
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/* MIPS divisions do trap by default, but libgloss targets do not
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intercept the trap and raise a SIGFPE. The same is probably
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@ -39,6 +36,24 @@
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#elif defined (__CRIS__)
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/* No SIGFPE for CRIS integer division. */
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# define DO_TEST 0
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#elif defined (__arm__) && defined (__ARM_EABI__)
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# ifdef __ARM_ARCH_EXT_IDIV__
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/* Hardware division instructions may not trap, and handle trapping
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differently anyway. Skip the test if we have those instructions. */
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# define DO_TEST 0
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# else
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# include <signal.h>
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/* ARM division-by-zero behaviour is to call a helper function, which
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can do several different things, depending on requirements. Emulate
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the behaviour of other targets here by raising SIGFPE. */
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int __attribute__((used))
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__aeabi_idiv0 (int return_value)
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{
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raise (SIGFPE);
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return return_value;
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}
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# define DO_TEST 1
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# endif
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#else
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# define DO_TEST 1
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#endif
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