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Author SHA1 Message Date
Hu, Lin1 9f6cae5b99 x86: Cast stride to __PTRDIFF_TYPE__ for AMX-MOVRS intrinsics. [PR122119]
On 64-bit windows, long can't be used, because it is 32 bits. Use
__PTRDIFF_TYPE__ instead of long.

gcc/ChangeLog:

	PR target/122119
	* config/i386/amxmovrsintrin.h
	(_tile_loaddrs_internal): Use __PTRDIFF_TYPE__ instead of long.
	(_tile_loaddrst1_internal): Ditto.
	(_tile_2rpntlvwz0rs_internal): Ditto.
	(_tile_2rpntlvwz0rst1_internal): Ditto.
	(_tile_2rpntlvwz1rs_internal): Ditto.
	(_tile_2rpntlvwz1rst1_internal): Ditto.
2025-10-17 11:29:59 +08:00
GCC Administrator 6af0281e41 Daily bump. 2025-10-17 00:23:52 +00:00
3 changed files with 17 additions and 7 deletions

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@ -1,3 +1,13 @@
2025-10-16 Ayappan Perumal <ayappap2@in.ibm.com>
Backported from master:
2025-10-16 Ayappan Perumal <ayappap2@in.ibm.com>
* config/rs6000/aix.h (SUBTARGET_DRIVER_SELF_SPECS):
Error out when stack-protector option is used in AIX
as it is not supported on AIX
Approved By: Segher Boessenkool <segher@kernel.crashing.org>
2025-10-15 Alice Carlotti <alice.carlotti@arm.com> 2025-10-15 Alice Carlotti <alice.carlotti@arm.com>
* config/aarch64/aarch64-sys-regs.def: Fix pmsdsfr_el1 encoding. * config/aarch64/aarch64-sys-regs.def: Fix pmsdsfr_el1 encoding.

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@ -1 +1 @@
20251016 20251017

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@ -40,13 +40,13 @@
__asm__ volatile \ __asm__ volatile \
("{tileloaddrs\t(%0,%1,1), %%tmm"#tdst \ ("{tileloaddrs\t(%0,%1,1), %%tmm"#tdst \
"|tileloaddrs\t%%tmm"#tdst", [%0+%1*1]}" \ "|tileloaddrs\t%%tmm"#tdst", [%0+%1*1]}" \
:: "r" ((const void*) (base)), "r" ((long) (stride))) :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)))
#define _tile_loaddrst1_internal(tdst, base, stride) \ #define _tile_loaddrst1_internal(tdst, base, stride) \
__asm__ volatile \ __asm__ volatile \
("{tileloaddrst1\t(%0,%1,1), %%tmm"#tdst \ ("{tileloaddrst1\t(%0,%1,1), %%tmm"#tdst \
"|tileloaddrst1\t%%tmm"#tdst", [%0+%1*1]}" \ "|tileloaddrst1\t%%tmm"#tdst", [%0+%1*1]}" \
:: "r" ((const void*) (base)), "r" ((long) (stride))) :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)))
#define _tile_loaddrs(tdst, base, stride) \ #define _tile_loaddrs(tdst, base, stride) \
_tile_loaddrs_internal(tdst, base, stride) _tile_loaddrs_internal(tdst, base, stride)
@ -69,25 +69,25 @@ __asm__ volatile \
__asm__ volatile \ __asm__ volatile \
("{t2rpntlvwz0rs\t(%0,%1,1), %%tmm"#tdst \ ("{t2rpntlvwz0rs\t(%0,%1,1), %%tmm"#tdst \
"|t2rpntlvwz0rs\t%%tmm"#tdst", [%0+%1*1]}" \ "|t2rpntlvwz0rs\t%%tmm"#tdst", [%0+%1*1]}" \
:: "r" ((const void*) (base)), "r" ((long) (stride))) :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)))
#define _tile_2rpntlvwz0rst1_internal(tdst, base, stride) \ #define _tile_2rpntlvwz0rst1_internal(tdst, base, stride) \
__asm__ volatile \ __asm__ volatile \
("{t2rpntlvwz0rst1\t(%0,%1,1), %%tmm"#tdst \ ("{t2rpntlvwz0rst1\t(%0,%1,1), %%tmm"#tdst \
"|t2rpntlvwz0rst1\t%%tmm"#tdst", [%0+%1*1]}" \ "|t2rpntlvwz0rst1\t%%tmm"#tdst", [%0+%1*1]}" \
:: "r" ((const void*) (base)), "r" ((long) (stride))) :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)))
#define _tile_2rpntlvwz1rs_internal(tdst, base, stride) \ #define _tile_2rpntlvwz1rs_internal(tdst, base, stride) \
__asm__ volatile \ __asm__ volatile \
("{t2rpntlvwz1rs\t(%0,%1,1), %%tmm"#tdst \ ("{t2rpntlvwz1rs\t(%0,%1,1), %%tmm"#tdst \
"|t2rpntlvwz1rs\t%%tmm"#tdst", [%0+%1*1]}" \ "|t2rpntlvwz1rs\t%%tmm"#tdst", [%0+%1*1]}" \
:: "r" ((const void*) (base)), "r" ((long) (stride))) :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)))
#define _tile_2rpntlvwz1rst1_internal(tdst, base, stride) \ #define _tile_2rpntlvwz1rst1_internal(tdst, base, stride) \
__asm__ volatile \ __asm__ volatile \
("{t2rpntlvwz1rst1\t(%0,%1,1), %%tmm"#tdst \ ("{t2rpntlvwz1rst1\t(%0,%1,1), %%tmm"#tdst \
"|t2rpntlvwz1rst1\t%%tmm"#tdst", [%0+%1*1]}" \ "|t2rpntlvwz1rst1\t%%tmm"#tdst", [%0+%1*1]}" \
:: "r" ((const void*) (base)), "r" ((long) (stride))) :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)))
#define _tile_2rpntlvwz0rs(tdst, base, stride) \ #define _tile_2rpntlvwz0rs(tdst, base, stride) \
_tile_2rpntlvwz0rs_internal(tdst, base, stride) _tile_2rpntlvwz0rs_internal(tdst, base, stride)