mirror of git://gcc.gnu.org/git/gcc.git
12196 lines
463 KiB
Plaintext
12196 lines
463 KiB
Plaintext
2018-05-07 Luis Machado <luis.machado@linaro.org>
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* config/aarch64/aarch64.c (qdf24xx_prefetch_tune) <l2_cache_size>: Set
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to 512.
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2018-05-07 Luis Machado <luis.machado@linaro.org>
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gcc/
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* config/aarch64/aarch64-protos.h (cpu_prefetch_tune)
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<prefetch_dynamic_strides>: New const bool field.
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* config/aarch64/aarch64.c (generic_prefetch_tune): Update to include
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prefetch_dynamic_strides.
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(exynosm1_prefetch_tune): Likewise.
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(thunderxt88_prefetch_tune): Likewise.
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(thunderx_prefetch_tune): Likewise.
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(thunderx2t99_prefetch_tune): Likewise.
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(qdf24xx_prefetch_tune): Likewise. Set prefetch_dynamic_strides to false.
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(aarch64_override_options_internal): Update to set
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PARAM_PREFETCH_DYNAMIC_STRIDES.
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* doc/invoke.texi (prefetch-dynamic-strides): Document new option.
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* params.def (PARAM_PREFETCH_DYNAMIC_STRIDES): New.
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* params.h (PARAM_PREFETCH_DYNAMIC_STRIDES): Define.
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* tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Account for
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prefetch-dynamic-strides setting.
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2018-05-07 Luis Machado <luis.machado@linaro.org>
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gcc/
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* config/aarch64/aarch64-protos.h (cpu_prefetch_tune)
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<minimum_stride>: New const int field.
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* config/aarch64/aarch64.c (generic_prefetch_tune): Update to include
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minimum_stride field.
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(exynosm1_prefetch_tune): Likewise.
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(thunderxt88_prefetch_tune): Likewise.
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(thunderx_prefetch_tune): Likewise.
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(thunderx2t99_prefetch_tune): Likewise.
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(qdf24xx_prefetch_tune): Likewise. Set minimum_stride to 2048.
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(aarch64_override_options_internal): Update to set
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PARAM_PREFETCH_MINIMUM_STRIDE.
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* doc/invoke.texi (prefetch-minimum-stride): Document new option.
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* params.def (PARAM_PREFETCH_MINIMUM_STRIDE): New.
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* params.h (PARAM_PREFETCH_MINIMUM_STRIDE): Define.
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* tree-ssa-loop-prefetch.c (should_issue_prefetch_p): Return false if
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stride is constant and is below the minimum stride threshold.
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2018-05-06 Jakub Jelinek <jakub@redhat.com>
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PR c++/85659
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* cfgexpand.c (expand_asm_stmt): Don't create a temporary if
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the type is addressable. Don't force op into register if it has
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BLKmode.
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2018-05-05 Roland McGrath <mcgrathr@google.com>
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PR other/77609
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* varasm.c (default_section_type_flags): Set SECTION_NOTYPE for
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any section for which we don't know a specific type it should have,
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regardless of name. Previously this was done only for the exact
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names ".init_array", ".fini_array", and ".preinit_array".
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(default_elf_asm_named_section): Add comment about
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relationship with default_section_type_flags and SECTION_NOTYPE.
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(get_section): Don't consider it a type conflict if one side has
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SECTION_NOTYPE and the other doesn't, as long as neither has the
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SECTION_BSS et al used in the default_section_type_flags logic.
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2018-05-05 Tom de Vries <tom@codesourcery.com>
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PR target/85653
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* config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_3): Define.
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(workaround_barsyncs): New function.
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(nvptx_reorg): Use workaround_barsyncs.
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* config/nvptx/nvptx.md (define_c_enum "unspecv"): Add UNSPECV_MEMBAR.
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(define_expand "nvptx_membar_cta"): New define_expand.
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(define_insn "*nvptx_membar_cta"): New insn.
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2018-05-04 Pekka Jääskeläinen <pekka.jaaskelainen@parmance.com>
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* brig-builtins.def: Add consts to ptrs etc. in BRIG builtin defs.
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To improve optimization opportunities.
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* builtin-types.def: The new needed builtin types for the above.
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2018-05-04 Richard Biener <rguenther@suse.de>
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* bb-reorder.c (sanitize_hot_paths): Release hot_bbs_to_check.
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* gimple-ssa-store-merging.c
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(imm_store_chain_info::output_merged_store): Remove redundant create,
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release split_store vector contents on failure.
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* tree-vect-slp.c (vect_schedule_slp_instance): Avoid leaking
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scalar stmt vector on cache hit.
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2018-05-04 Segher Boessenkool <segher@kernel.crashing.org>
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* common/config/rs6000/rs6000-common.c (rs6000_handle_option): Remove
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Xilinx FP support.
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* config.gcc (powerpc-xilinx-eabi*): Remove.
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* config/rs6000/predicates.md (easy_fp_constant): Remove Xilinx FP
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support.
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(fusion_addis_mem_combo_load): Ditto.
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* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Remove Xilinx
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FP support.
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(rs6000_cpu_cpp_builtins): Ditto.
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* config/rs6000/rs6000-linux.c
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(rs6000_linux_float_exceptions_rounding_supported_p): Ditto.
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* config/rs6000/rs6000-opts.h (enum fpu_type_t): Delete.
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* config/rs6000/rs6000.c (rs6000_debug_reg_global): Remove Xilinx FP
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support.
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(rs6000_setup_reg_addr_masks): Ditto.
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(rs6000_init_hard_regno_mode_ok): Ditto.
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(rs6000_option_override_internal): Ditto.
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(legitimate_lo_sum_address_p): Ditto.
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(rs6000_legitimize_address): Ditto.
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(rs6000_legitimize_reload_address): Ditto.
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(rs6000_legitimate_address_p): Ditto.
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(abi_v4_pass_in_fpr): Ditto.
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(setup_incoming_varargs): Ditto.
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(rs6000_gimplify_va_arg): Ditto.
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(rs6000_split_multireg_move): Ditto.
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(rs6000_savres_strategy): Ditto.
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(rs6000_emit_prologue_components): Ditto.
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(rs6000_emit_epilogue_components): Ditto.
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(rs6000_emit_prologue): Ditto.
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(rs6000_emit_epilogue): Ditto.
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(rs6000_elf_file_end): Ditto.
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(rs6000_function_value): Ditto.
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(rs6000_libcall_value): Ditto.
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* config/rs6000/rs6000.h: Ditto.
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(TARGET_MINMAX_SF, TARGET_MINMAX_DF): Delete, merge to ...
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(TARGET_MINMAX): ... this. New.
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(TARGET_SF_FPR, TARGET_DF_FPR, TARGET_SF_INSN, TARGET_DF_INSN): Delete.
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* config/rs6000/rs6000.md: Remove Xilinx FP support.
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(*movsi_internal1_single): Delete.
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* config/rs6000/rs6000.opt (msingle-float, mdouble-float, msimple-fpu,
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mfpu=, mxilinx-fpu): Delete.
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* config/rs6000/singlefp.h: Delete.
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* config/rs6000/sysv4.h: Remove Xilinx FP support.
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* config/rs6000/t-rs6000: Ditto.
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* config/rs6000/t-xilinx: Delete.
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* gcc/config/rs6000/titan.md: Adjust for fp_type removal.
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* gcc/config/rs6000/vsx.md: Remove Xilinx FP support.
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(VStype_simple): Delete.
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(VSfptype_simple, VSfptype_mul, VSfptype_div, VSfptype_sqrt): Delete.
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* config/rs6000/xfpu.h: Delete.
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* config/rs6000/xfpu.md: Delete.
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* config/rs6000/xilinx.h: Delete.
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* config/rs6000/xilinx.opt: Delete.
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* gcc/doc/invoke.texi (RS/6000 and PowerPC Options): Remove
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-msingle-float, -mdouble-float, -msimple-fpu, -mfpu=, and -mxilinx-fpu.
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2018-05-04 Tom de Vries <tom@codesourcery.com>
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PR libgomp/85639
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* builtins.c (expand_builtin_goacc_parlevel_id_size): Handle null target
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if ignore == 0.
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2018-05-04 Richard Biener <rguenther@suse.de>
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PR middle-end/85627
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* tree-complex.c (update_complex_assignment): We are always in SSA form.
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(expand_complex_div_wide): Likewise.
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(expand_complex_operations_1): Likewise.
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(expand_complex_libcall): Preserve EH info of the original stmt.
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(tree_lower_complex): Handle removed blocks.
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* tree.c (build_common_builtin_nodes): Do not set ECF_NOTRHOW
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on complex multiplication and division libcall builtins.
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2018-05-04 Richard Biener <rguenther@suse.de>
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PR middle-end/85574
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* fold-const.c (negate_expr_p): Restrict negation of operand
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zero of a division to when we know that can happen without
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overflow.
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(fold_negate_expr_1): Likewise.
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2018-05-04 Jakub Jelinek <jakub@redhat.com>
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PR libstdc++/85466
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* real.h (real_nextafter): Declare.
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* real.c (real_nextafter): New function.
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* fold-const-call.c (fold_const_nextafter): New function.
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(fold_const_call_sss): Call it for CASE_CFN_NEXTAFTER and
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CASE_CFN_NEXTTOWARD.
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(fold_const_call_1): For CASE_CFN_NEXTTOWARD call fold_const_call_sss
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even when arg1_mode is different from arg0_mode.
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2018-05-03 Nathan Sidwell <nathan@acm.org>
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* doc/extend.texi (Deprecated Features): Remove
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-ffriend-injection.
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(Backwards Compatibility): Likewise.
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* doc/invoke.texi (C++ Language Options): Likewise.
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(C++ Dialect Options): Likewise.
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2018-05-03 Jakub Jelinek <jakub@redhat.com>
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PR target/85530
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* config/i386/avx512fintrin.h (_mm512_mullox_epi64,
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_mm512_mask_mullox_epi64): New intrinsics.
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2018-05-03 Tom de Vries <tom@codesourcery.com>
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PR testsuite/85106
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* doc/sourcebuild.texi (Commands for use in dg-final, Scan optimization
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dump files): Add offload-tree.
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2018-05-03 Richard Biener <rguenther@suse.de>
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PR tree-optimization/85615
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* tree-ssa-threadupdate.c (thread_block_1): Only allow exits
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to loops not nested in BBs loop father to avoid creating multi-entry
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loops.
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2018-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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PR tree-optimization/70291
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* tree-complex.c (expand_complex_libcall): Add type, inplace_p
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arguments. Change return type to tree. Emit libcall as a new
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statement rather than replacing existing one when inplace_p is true.
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(expand_complex_multiplication_components): New function.
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(expand_complex_multiplication): Expand floating-point complex
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multiplication using the above.
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(expand_complex_division): Rename inner_type parameter to type.
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Update expand_complex_libcall call-site.
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(expand_complex_operations_1): Update expand_complex_multiplication
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and expand_complex_division call-sites.
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2018-05-02 Jakub Jelinek <jakub@redhat.com>
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PR target/85582
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* config/i386/i386.md (*ashl<dwi>3_doubleword_mask,
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*ashl<dwi>3_doubleword_mask_1, *<shift_insn><dwi>3_doubleword_mask,
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*<shift_insn><dwi>3_doubleword_mask_1): In condition require that
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the highest significant bit of the shift count mask is clear. In
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check whether and[sq]i3 is needed verify that all significant bits
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of the shift count other than the highest are set.
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2018-05-02 Tom de Vries <tom@codesourcery.com>
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PR libgomp/82428
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* builtins.def (DEF_GOACC_BUILTIN_ONLY): Define.
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* omp-builtins.def (BUILT_IN_GOACC_PARLEVEL_ID)
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(BUILT_IN_GOACC_PARLEVEL_SIZE): New builtin.
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* builtins.c (expand_builtin_goacc_parlevel_id_size): New function.
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(expand_builtin): Call expand_builtin_goacc_parlevel_id_size.
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* doc/extend.texi (Other Builtins): Add __builtin_goacc_parlevel_id and
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__builtin_goacc_parlevel_size.
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2018-05-02 Richard Biener <rguenther@suse.de>
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PR tree-optimization/85597
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* tree-vect-stmts.c (vectorizable_operation): For ternary SLP
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do not use split vect_get_vec_defs call but call vect_get_slp_defs
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directly.
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2018-05-02 Tom de Vries <tom@codesourcery.com>
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PR testsuite/85106
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* doc/sourcebuild.texi (Commands for use in dg-final, Scan optimization
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dump files): Add ltrans-tree.
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2018-05-02 Tom de Vries <tom@codesourcery.com>
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PR testsuite/85106
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* doc/sourcebuild.texi (Commands for use in dg-final, Scan optimization
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dump files): Add wpa-ipa.
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2018-05-02 Segher Boessenkool <segher@kernel.crashing.org>
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* config.gcc (powerpc*-*-*): Remove paired.h. Unsupport the
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powerpc*-*-linux*paired* target.
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* config/rs6000/750cl.h: Delete.
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* config/rs6000/paired.h: Delete.
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* config/rs6000/paired.md: Delete.
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* config/rs6000/predicates.md (easy_vector_constant): Remove paired
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float support.
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* config/rs6000/rs6000-builtin.def: Remove paired float support.
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* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Update
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comment. Remove paired float support.
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* config/rs6000/rs6000-modes.def: Remove V2SF and V2SI.
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* config/rs6000/rs6000-opts.h (enum rs6000_vector): Delete
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VECTOR_PAIRED.
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* config/rs6000/rs6000-protos.h (paired_expand_vector_init,
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paired_emit_vector_cond_expr, paired_expand_vector_move): Delete
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declarations.
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* config/rs6000/rs6000.c: Remove paired float support.
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(paired_expand_vector_init, paired_expand_vector_move,
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paired_emit_vector_compare, paired_emit_vector_cond_expr,
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(paired_expand_lv_builtin, paired_expand_stv_builtin,
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paired_expand_builtin, paired_expand_predicate_builtin,
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paired_init_builtins): Delete.
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* config/rs6000/rs6000.h: Remove paired float support.
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* config/rs6000/rs6000.md: Remove paired float support.
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(move_from_CR_ov_bit): Delete.
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* config/rs6000/rs6000.opt (mpaired): Delete.
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* config/rs6000/t-rs6000: Remove paired.md from MD_INCLUDES.
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* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mpaired.
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2018-05-02 Richard Biener <rguenther@suse.de>
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PR middle-end/85567
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* gimplify.c (gimplify_save_expr): When in SSA form allow
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SAVE_EXPRs to compute to SSA vars.
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2018-05-02 Jakub Jelinek <jakub@redhat.com>
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PR target/85582
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* config/i386/i386.md (*ashl<dwi>3_doubleword_mask,
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*ashl<dwi>3_doubleword_mask_1, *<shift_insn><dwi>3_doubleword_mask,
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*<shift_insn><dwi>3_doubleword_mask_1): If and[sq]i3 is needed, don't
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clobber operands[2], instead use a new pseudo. Formatting fixes.
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2018-05-02 Richard Sandiford <richard.sandiford@linaro.org>
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PR tree-optimization/85586
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* tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Only
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exit early for statements in the same group if the accesses are
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not strided.
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2018-05-02 Tom de Vries <tom@codesourcery.com>
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|
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PR lto/85451
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* lto-wrapper.c (compile_offload_image): Add "could not find mkoffload"
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error message.
|
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|
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2018-05-01 Marc Glisse <marc.glisse@inria.fr>
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|
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PR tree-optimization/85143
|
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* match.pd (A<B&A<C): Extend to BIT_IOR_EXPR.
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|
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2018-05-01 Tom de Vries <tom@codesourcery.com>
|
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|
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PR lto/85451
|
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* config/nvptx/mkoffload.c (main): Suggest using -B in "offload compiler
|
||
not found" error message.
|
||
|
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2018-05-01 Tom de Vries <tom@codesourcery.com>
|
||
|
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PR other/83786
|
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* vec.h (VEC_ORDERED_REMOVE_IF, VEC_ORDERED_REMOVE_IF_FROM_TO): Define.
|
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* vec.c (test_ordered_remove_if): New function.
|
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(vec_c_tests): Call test_ordered_remove_if.
|
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* dwarf2cfi.c (connect_traces): Use VEC_ORDERED_REMOVE_IF_FROM_TO.
|
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* lto-streamer-out.c (prune_offload_funcs): Use VEC_ORDERED_REMOVE_IF.
|
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* tree-vect-patterns.c (vect_pattern_recog_1): Use
|
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VEC_ORDERED_REMOVE_IF.
|
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|
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2018-05-01 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
|
||
|
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PR tree-optimization/82665
|
||
* vr-values.c (vr_values::extract_range_from_binary_expr): Handle
|
||
pointer subtraction where arguments come from a memchr call.
|
||
|
||
2018-05-01 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* configure.ac (LD_AS_NEEDED_OPTION, LD_NO_AS_NEEDED_OPTION): Use
|
||
--push-state --as-needed and --pop-state instead of --as-needed and
|
||
--no-as-needed if ld supports it.
|
||
* configure: Regenerated.
|
||
|
||
PR web/85578
|
||
* doc/install.texi2html: Replace _002d with - and _002a with * in
|
||
generated html files using sed.
|
||
|
||
2018-04-30 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR c++/85523
|
||
* gcc-rich-location.c (blank_line_before_p): New function.
|
||
(use_new_line): New function.
|
||
(gcc_rich_location::add_fixit_insert_formatted): New function.
|
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* gcc-rich-location.h
|
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(gcc_rich_location::add_fixit_insert_formatted): New function.
|
||
|
||
2018-04-30 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* selftest.c (assert_streq): Rename "expected" and "actual" to
|
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"val1" and "val2". Extend NULL-handling to cover both inputs
|
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symmetrically, while still requiring both to be non-NULL for a pass.
|
||
* selftest.h (assert_streq): Rename "expected" and "actual" to
|
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"val1" and "val2".
|
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(ASSERT_EQ): Likewise.
|
||
(ASSERT_EQ_AT): Likewise.
|
||
(ASSERT_KNOWN_EQ): Likewise.
|
||
(ASSERT_KNOWN_EQ_AT): Likewise.
|
||
(ASSERT_NE): Likewise.
|
||
(ASSERT_MAYBE_NE): Likewise.
|
||
(ASSERT_MAYBE_NE_AT): Likewise.
|
||
(ASSERT_STREQ): Likewise. Clarify that both must be non-NULL for
|
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the assertion to pass.
|
||
(ASSERT_STREQ_AT): Likewise.
|
||
|
||
2018-04-30 Jonathan Wakely <jwakely@redhat.com>
|
||
|
||
* doc/invoke.texi (-fpie, -fPIE): Fix grammar and clarify
|
||
interaction with -pie.
|
||
|
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2018-04-30 David Malcolm <dmalcolm@redhat.com>
|
||
|
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* selftest.h: Fix alphabetization of per-source-file selftest
|
||
declarations.
|
||
|
||
2018-04-30 Jason Merrill <jason@redhat.com>
|
||
|
||
PR c++/61982 - dead stores to destroyed objects.
|
||
* gimplify.c (gimplify_modify_expr): Simplify complex lvalue on LHS
|
||
of clobber.
|
||
|
||
2018-04-30 Jason Merrill <jason@redhat.com>
|
||
|
||
* tree.c (build_clobber): New.
|
||
* tree.h: Declare it.
|
||
* gimplify.c (gimplify_bind_expr, gimplify_target_expr): Use it.
|
||
|
||
2018-04-30 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* diagnostic-show-locus.c (layout::layout): Update for
|
||
location_get_source_line returning a char_span.
|
||
(struct char_span): Move to input.h.
|
||
(struct correction): Update for fields in char_span becoming
|
||
private.
|
||
(struct source_line): Update for location_get_source_line
|
||
returning a char_span.
|
||
(layout::print_line): Likewise.
|
||
* edit-context.c (edited_file::print_content): Likewise.
|
||
(edited_file::print_diff_hunk): Likewise.
|
||
(edited_file::print_run_of_changed_lines): Likewise.
|
||
(edited_file::get_num_lines): Likewise.
|
||
(edited_line::edited_line): Likewise.
|
||
* final.c (asm_show_source): Likewise.
|
||
* input.c (location_get_source_line): Convert return type
|
||
from const char * to char_span, losing the final "line_len"
|
||
param.
|
||
(dump_location_info): Update for the above.
|
||
(get_substring_ranges_for_loc): Likewise. Use a char_span
|
||
when handling the literal within the line.
|
||
(test_reading_source_line): Update for location_get_source_line
|
||
returning a char_span.
|
||
* input.h (class char_span): Move here from
|
||
diagnostic-show-locus.c, converting from a struct to a class.
|
||
Make data members private.
|
||
(char_span::operator bool): New.
|
||
(char_span::length): New.
|
||
(char_span::get_buffer): New.
|
||
(char_span::operator[]): New.
|
||
(char_span::subspan): Make const.
|
||
(char_span::xstrdup): New.
|
||
(location_get_source_line): Convert return type from const char *
|
||
to char_span, losing the final "line_size" param.
|
||
|
||
2018-04-30 Jan Hubicka <jh@suse.cz>
|
||
|
||
* lto-wrapper.c (ltrans_priorities): New static var.
|
||
(cmp_priority): New.
|
||
(run_gcc): Read priorities and if doing parallel build order
|
||
the Makefile by them.
|
||
|
||
2018-04-30 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* input.h (builtins_location_check): Convert to a STATIC_ASSERT.
|
||
|
||
2018-04-30 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-cfg.c (verify_address): Remove base argument, add
|
||
flag whether to check TREE_ADDRESSABLE and do that.
|
||
(verify_expr): Remove.
|
||
(verify_types_in_gimple_reference): Add pieces from verify_expr.
|
||
(verify_gimple_assign_single): Likewise.
|
||
(verify_gimple_switch): Likewise.
|
||
(verify_expr_location_1): Dereference tp once. Add (disabled)
|
||
piece from verify_expr.
|
||
(verify_gimple_in_cfg): Do not call verify_expr on all ops.
|
||
|
||
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/linux.h (CLEAR_INSN_CACHE): Define.
|
||
|
||
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc-protos.h (prepare_extend_operands): Remove.
|
||
(small_data_pattern): Likewise.
|
||
(arc_rewrite_small_data): Likewise.
|
||
* config/arc/arc.c (LEGITIMATE_SMALL_DATA_OFFSET_P): Remove.
|
||
(LEGITIMATE_SMALL_DATA_ADDRESS_P): Likewise.
|
||
(get_symbol_alignment): New function.
|
||
(legitimate_small_data_address_p): Likewise.
|
||
(legitimate_scaled_address): Update, call
|
||
legitimate_small_data_address_p.
|
||
(output_sdata): New static variable.
|
||
(arc_print_operand): Update how we handle small data operands.
|
||
(arc_print_operand_address): Likewise.
|
||
(arc_legitimate_address_p): Update, use
|
||
legitimate_small_data_address_p.
|
||
(arc_rewrite_small_data_p): Remove.
|
||
(arc_rewrite_small_data_1): Likewise.
|
||
(arc_rewrite_small_data): Likewise.
|
||
(small_data_pattern): Likewise.
|
||
(compact_sda_memory_operand): Update to use
|
||
legitimate_small_data_address_p and get_symbol_alignment.
|
||
(prepare_move_operands): Don't rewite sdata pattern.
|
||
(prepare_extend_operands): Remove.
|
||
* config/arc/arc.md (zero_extendqihi2): Don't rewrite sdata
|
||
pattern.
|
||
(zero_extendqisi2): Likewise.
|
||
(zero_extendhisi2): Likewise.
|
||
(extendqihi2): Likewise.
|
||
(extendqisi2): Likewise.
|
||
(extendhisi2): Likewise.
|
||
(addsi3): Likewise.
|
||
(subsi3): Likewise.
|
||
(andsi3): Likewise.
|
||
* config/arc/constraints.md (Usd): Change it to memory constraint.
|
||
|
||
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (arc_split_move): Allow signed 6-bit constants
|
||
as source of std instructions.
|
||
* config/arc/arc.md (movsi_insn): Update pattern predicate to
|
||
allow 6-bit constants as source for store instructions.
|
||
(movdi_insn): Update instruction pattern to allow 6-bit constants
|
||
as source for store instructions.
|
||
|
||
2018-04-30 Jonathan Wakely <jwakely@redhat.com>
|
||
|
||
* doc/invoke.texi (-fdebug-types-section): Fix grammar.
|
||
|
||
2018-04-30 Nathan Sidwell <nathan@acm.org>
|
||
Sandra Loosemore <sandra@codesourcery.com>
|
||
|
||
* dumpfile.c (dump_open): Allow '-' for stdout.
|
||
* doc/invoke.texi (Developer Options): Document dump filename
|
||
determination early. Document stdin/stdout selection.
|
||
|
||
2018-04-30 Andrew Sadek <andrew.sadek.se@gmail.com>
|
||
|
||
Microblaze Target: PIC data text relative
|
||
|
||
* config/microblaze/microblaze.opt: add new option -mpic-data-text-rel.
|
||
* config/microblaze/microblaze-protos.h (microblaze_constant_address_p):
|
||
Add declaration.
|
||
* gcc/config/microblaze/microblaze.h (microblaze_constant_address_p):
|
||
CONSTANT_ADDRESS_P definition to microblaze_constant_address_p.
|
||
* config/microblaze/microblaze.c (TARGET_PIC_DATA_TEXT_REL):
|
||
New addressing mode for data-text relative position indepenedent code.
|
||
(microblaze_classify_unspec): add 'UNSPEC_TEXT' case ->
|
||
'ADDRESS_SYMBOLIC_TXT_REL'.
|
||
(microblaze_classify_address): Add handling for UNSPEC + CONST_INT.
|
||
(microblaze_legitimate_pic_operand): Exclude function calls from
|
||
pic operands in case of TARGET_PIC_DATA_TEXT_REL option.
|
||
(microblaze_legitimize_address): Generate 'UNSPEC_TEXT' for all possible
|
||
addresses cases.
|
||
(microblaze_address_insns): Add 'ADDRESS_SYMBOLIC_TXT_REL' case.
|
||
(print_operand): Add 'ADDRESS_SYMBOLIC_TXT_REL' case.
|
||
(print_operand_address): Add 'ADDRESS_SYMBOLIC_TXT_REL' case + handling
|
||
for 'address + offset'.
|
||
(microblaze_expand_prologue): Add new function prologue call for
|
||
'r20' assignation.
|
||
(microblaze_asm_generate_pic_addr_dif_vec): Override new target hook
|
||
'TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC' to disable address diff vector
|
||
table in case of TARGET_PIC_DATA_TEXT_REL.
|
||
(expand_pic_symbol_ref): Add handling for 'UNSPEC_TEXT'.
|
||
* gcc/config/microblaze/microblaze.md (TARGET_PIC_DATA_TEXT_REL):
|
||
Add new macros 'UNSPEC_TEXT',
|
||
'UNSPEC_SET_TEXT' + add rule for setting r20 in function prologue
|
||
+ exclude function calls from 'UNSPEC_PLT' in case of data text
|
||
relative mode.
|
||
* doc/tm.texi.in (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Add
|
||
new target hook for generating address diff vector tables in case of
|
||
flag_pic.
|
||
* doc/tm.texi : Regenerate.
|
||
* stmt.c (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Append new condition
|
||
'targetm.asm_out.generate_pic_addr_diff_vec' to flag_pic in case
|
||
of addr diff vector generation.
|
||
* target.def (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC): Add
|
||
target hook definition.
|
||
* targhooks.h, gcc/targhooks.c (TARGET_ASM_GENERATE_PIC_ADDR_DIFF_VEC):
|
||
Add default function for generate_pic_addr_diff_vec -> flag_pic.
|
||
* doc/invoke.texi (Add new pic option): Add new microblaze pic
|
||
option for data text relative.
|
||
|
||
2018-04-30 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-chrec.h (evolution_function_is_constant_p): Remove
|
||
redundant check.
|
||
* tree-cfg.c (tree_node_can_be_shared): Re-order checks.
|
||
|
||
2018-04-30 Richard Biener <rguenther@suse.de>
|
||
|
||
PR bootstrap/85571
|
||
* dwarf2out.c (gen_producer_string): Ignore -fchecking[=].
|
||
|
||
2018-04-30 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/28364
|
||
PR tree-optimization/85275
|
||
* tree-ssa-loop-ch.c (ch_base::copy_headers): Stop after
|
||
copying first exit test.
|
||
|
||
2018-04-28 Mark Wielaard <mark@klomp.org>
|
||
|
||
* dwarf2out.c (dwarf2out_finish): Add .debug_addr table header for
|
||
dwarf_version >= 5.
|
||
(dwarf_AT): Handle DW_AT_addr_base.
|
||
(add_top_level_skeleton_die_attrs): Use dwarf_AT for DW_AT_addr_base.
|
||
|
||
2018-04-28 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/84431
|
||
* config/i386/i386.md (*ashl<dwi>3_doubleword_mask): New pattern.
|
||
(*ashl<dwi>3_doubleword_mask_1): Ditto.
|
||
(*<shift_insn><dwi>3_doubleword_mask): Ditto.
|
||
(*<shift_insn><dwi>3_doubleword_mask_1): Ditto.
|
||
|
||
2018-04-28 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-cfg.c (verify_gimple_phi): Take a gphi * argument.
|
||
(verify_gimple_in_cfg): Rename visited_stmts to visited_throwing_stmts
|
||
to reflect use. Only add interesting stmts.
|
||
|
||
2018-04-27 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR ipa/85549
|
||
* ipa-cp.c (find_aggregate_values_for_callers_subset): Make sure
|
||
the jump function allows for passing through aggregate values.
|
||
|
||
2018-04-27 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* input.h (in_system_header_at): Convert from macro to inline
|
||
function.
|
||
(from_macro_expansion_at): Likewise.
|
||
(from_macro_definition_at): Likewise.
|
||
|
||
2018-04-27 Jeff Law <law@redhat.com>
|
||
|
||
* config.gcc: Mark tile* targets as deprecated/obsolete.
|
||
|
||
2018-04-27 Richard Biener <rguenther@suse.de>
|
||
|
||
* config/aarch64/aarch64.c: Simplify ap.__stack advance and
|
||
fix for ILP32.
|
||
|
||
2018-04-27 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-cfg.c (verify_expr): Make dead code hit gcc_unreachable.
|
||
|
||
2018-04-27 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.md (*movti_internal): Substitute Ye constraint
|
||
with Yd constraint. Set "preferred_for_speed" attribute from
|
||
TARGET_INTER_UNIT_MOVES_{FROM,TO}_VEC for alternatives
|
||
with Yd constraint.
|
||
(*movdi_internal): Ditto.
|
||
(movti_interunit splitters): Remove
|
||
TARGET_INTER_UNIT_MOVES_{FROM,TO}_VEC from insn condition.
|
||
(movdi_interunit splitters): Ditto.
|
||
* config/i386/constraints.md (Ye): Remove.
|
||
(Yd): Do not depend on TARGET_INTER_UNIT_MOVES_{FROM,TO}_VEC.
|
||
|
||
2018-04-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
PR target/85512
|
||
* config/aarch64/constraints.md (Usg): Limit to 31.
|
||
(Usj): Limit to 63.
|
||
|
||
2018-04-27 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/85529
|
||
* tree-ssa-reassoc.c (optimize_range_tests_var_bound): Add FIRST_BB
|
||
argument. Don't call get_nonzero_bits if opcode is ERROR_MARK_NODE,
|
||
rhs2 def stmt's bb is dominated by first_bb and it isn't an obvious
|
||
zero extension or masking of the MSB bit.
|
||
(optimize_range_tests): Add FIRST_BB argument, pass it through
|
||
to optimize_range_tests_var_bound.
|
||
(maybe_optimize_range_tests, reassociate_bb): Adjust
|
||
optimize_range_tests callers.
|
||
|
||
2018-04-26 Richard Biener <rguenther@suse.de>
|
||
Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* cgraph.h (symbol_table): Just declare debug method here.
|
||
* symtab.c (symbol_table::debug): Define.
|
||
|
||
2018-04-26 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* loop-invariant.c (may_assign_reg_p): Return false for frame pointer.
|
||
|
||
2018-04-26 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.md ("isa" attribute): Add x64_sse2.
|
||
("enabled" attribute): Handle x64_sse2 "isa" attribute.
|
||
(*movdi_internal): Substitute Yi and Yj constraint with x
|
||
and Ym and Yn constraint with y constraint. Update "isa"
|
||
attribute and set "preferred_for_speed" attribute from
|
||
TARGET_INTER_UNIT_MOVES_{FROM,TO}_VEC for updated alternatives.
|
||
(*movsi_internal): Ditto.
|
||
(*movdf_internal): Ditto.
|
||
(*movsf_internal): Ditto.
|
||
(*zero_extendsidi2): Ditto.
|
||
* config/i386/sse.md (vec_set<mode>_0): Ditto.
|
||
(sse2_loadld): Ditto.
|
||
(*vec_extract<ssevecmodelower>_0): Ditto.
|
||
(*vec_extractv4si_0_zext_sse4): Ditto.
|
||
(vec_concatv2di): Ditto.
|
||
(*vec_dup<mode>): Ditto.
|
||
* config/i386/mmx.md (*mov<mode>_internal): Ditto.
|
||
* config/i386/constraints.md (Yi): Remove.
|
||
(Yj): Remove.
|
||
(Ym): Remove.
|
||
(Yn): Remove.
|
||
|
||
2018-04-26 Nathan Sidwell <nathan@acm.org>
|
||
|
||
* dumpfile.c (dump_open): New.
|
||
(dump_open_alternate_stream, dump_start, dump_begin): Call it.
|
||
(dump_finish): Detect stdio/stderr by value not name.
|
||
|
||
2018-04-26 Jonathan Wakely <jwakely@redhat.com>
|
||
|
||
* doc/invoke.texi (-Wreturn-type): Document default status for C++.
|
||
|
||
2018-04-26 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/84952
|
||
* config/nvptx/nvptx.c (verify_neutering_jumps)
|
||
(verify_neutering_labels): New function
|
||
(nvptx_single): Use verify_neutering_jumps and verify_neutering_labels.
|
||
|
||
2018-04-26 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/84025
|
||
* config/nvptx/nvptx.c (needs_neutering_p): New function.
|
||
(nvptx_single): Use needs_neutering_p to skip over insns that do not
|
||
need neutering.
|
||
|
||
2018-04-26 Richard Biener <rguenther@suse.de>
|
||
Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR lto/85422
|
||
* lto-streamer-out.c (output_function): Fixup loops if required to match
|
||
discovery done in the reader.
|
||
|
||
2018-04-26 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/85116
|
||
* tree-ssa-loop-ch.c (do_while_loop_p): A do-while loop should
|
||
have a loop exit from the single latch predecessor. Remove
|
||
case of header with just condition.
|
||
(ch_base::copy_headers): Exclude infinite loops from any
|
||
processing.
|
||
(pass_ch::execute): Record exits.
|
||
|
||
2018-04-26 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-vect-data-refs.c (vect_get_data_access_cost): Get
|
||
prologue cost vector and pass it to vect_get_load_cost.
|
||
(vect_get_peeling_costs_all_drs): Likewise.
|
||
(vect_peeling_hash_get_lowest_cost): Likewise.
|
||
(vect_enhance_data_refs_alignment): Likewise.
|
||
|
||
2018-04-26 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/85450
|
||
* tree-cfg.c (verify_gimple_assign_unary): Restore proper
|
||
checking of integer<->pointer conversions.
|
||
* omp-expand.c (expand_omp_for_static_nochunk): Avoid
|
||
sign-/zero-extending pointer types.
|
||
(expand_omp_for_static_chunk): Likewise.
|
||
|
||
2018-03-22 Hans-Peter Nilsson <hp@axis.com>
|
||
Jean Lee <xiaoyur347@gmail.com>
|
||
|
||
* config/mips/mips.c (mips_asan_shadow_offset): New function.
|
||
(TARGET_ASAN_SHADOW_OFFSET): Define.
|
||
* config/mips/mips.h (FRAME_GROWS_DOWNWARD): Augment to also be
|
||
true for -fsanitize=address.
|
||
|
||
2018-04-25 Mark Wielaard <mark@klomp.org>
|
||
|
||
* dwarf2out.c (file_info_cmp): Sort longer dir prefixes before
|
||
shorter ones.
|
||
|
||
2018-04-25 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* config/i386/i386.md (*x86_mov<mode>cc_0_m1): Use type "alu1" rather
|
||
than "alu", remove explicit "memory" and "imm_disp" attributes.
|
||
(*x86_mov<mode>cc_0_m1_se, *x86_mov<mode>cc_0_m1_neg): Likewise.
|
||
|
||
PR middle-end/85414
|
||
* simplify-rtx.c (simplify_unary_operation_1) <case SIGN_EXTEND,
|
||
case ZERO_EXTEND>: Pass SUBREG_REG (op) rather than op to
|
||
gen_lowpart_no_emit.
|
||
|
||
2018-04-25 Sebastian Peryt <sebastian.peryt@intel.com>
|
||
|
||
PR target/85473
|
||
* config/i386/i386.c (ix86_expand_builtin): Change memory
|
||
operand to XI, extend p0 to Pmode.
|
||
* config/i386/i386.md: Change unspec volatile and operand
|
||
1 mode to XI, change operand 0 mode to P.
|
||
|
||
2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-predicates.c (nds32_can_use_bclr_p): Mask with
|
||
GET_MODE_MASK before any checking.
|
||
(nds32_can_use_bset_p): Likewise.
|
||
(nds32_can_use_btgl_p): Likewise.
|
||
|
||
2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-doubleword.md: New define_split pattern for
|
||
illegal register number.
|
||
|
||
2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_print_operand): Set op_value ealier.
|
||
|
||
2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.h (ASM_APP_ON): Add missing newline character.
|
||
|
||
2018-04-25 Richard Biener <rguenther@suse.de>
|
||
|
||
* lto-streamer.h (LTO_major_version): Bump to 8.
|
||
|
||
2018-04-25 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* BASE-VER: Set to 9.0.0.
|
||
|
||
2018-04-24 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.c (init_float128_ieee): Fix spelling mistakes
|
||
in __abskf2 and __powikf2.
|
||
|
||
2018-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
PR target/85512
|
||
* config/aarch64/constraints.md (Usg, Usj): New constraints.
|
||
* config/aarch64/iterators.md (cmode_simd): New mode attribute.
|
||
* config/aarch64/aarch64.md (*aarch64_ashr_sisd_or_int_<mode>3):
|
||
Use the above on operand 2. Reindent.
|
||
(*aarch64_lshr_sisd_or_int_<mode>3): Likewise.
|
||
|
||
2018-04-24 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85485
|
||
* common/config/i386/i386-common.c (ix86_handle_option): Don't
|
||
handle OPT_mcet.
|
||
* config/i386/i386.opt (mcet): Removed.
|
||
* doc/install.texi: Remove -mcet documentation.
|
||
* doc/invoke.texi: Likewise.
|
||
|
||
2018-04-24 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85485
|
||
* doc/install.texi: Remove -mcet from bootstrap-cet.
|
||
|
||
2018-04-24 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/85511
|
||
* config/i386/i386.c (ix86_init_mmx_sse_builtins): Don't define
|
||
__builtin_ia32_readeflags_u32 and __builtin_ia32_writeeflags_u32
|
||
if TARGET_64BIT.
|
||
|
||
PR target/85503
|
||
* config/rs6000/rs6000-p8swap.c (const_load_sequence_p): Punt if
|
||
const_vector is not CONST_VECTOR or SYMBOL_REF for a constant pool
|
||
containing a CONST_VECTOR.
|
||
|
||
2018-04-24 Cesar Philippidis <cesar@codesourcery.com>
|
||
|
||
* doc/install.texi: Update newlib dependency for nvptx.
|
||
|
||
2018-04-24 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/85508
|
||
* config/i386/i386.c (ix86_expand_vector_init_one_var): Use UINTVAL
|
||
instead of INTVAL when shifting x left.
|
||
|
||
2018-04-24 Andreas Krebbel <krebbel@linux.ibm.com>
|
||
|
||
PR tree-optimization/85478
|
||
* tree-vect-loop.c (vect_analyze_loop_2): Do not call
|
||
vect_grouped_store_supported for single element vectors.
|
||
|
||
2018-04-24 Richard Biener <rguenther@suse.de>
|
||
|
||
PR target/85491
|
||
* config/i386/i386.c (ix86_add_stmt_cost): Restrict strided
|
||
load cost increase to the case of non-constant step.
|
||
|
||
2018-04-24 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84828
|
||
* reg-stack.c (move_for_stack_reg): Don't fail assertion about dead
|
||
destination if any_malformed_asm.
|
||
|
||
2018-04-23 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR middle-end/85496
|
||
* expr.c (store_field): In the bitfield case, if the value comes from
|
||
a function call and is returned in registers by means of a PARALLEL,
|
||
do not change the mode of the temporary unless BLKmode and VOIDmode.
|
||
|
||
2018-04-23 Andrey Belevantsev <abel@ispras.ru>
|
||
|
||
PR rtl-optimization/85423
|
||
* sel-sched-ir.c (has_dependence_note_mem_dep): Only discard
|
||
dependencies to debug insns when the previous insn is non-debug.
|
||
|
||
2018-04-23 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.md ("vunspec"): Delete it, unify all the unspec
|
||
enums into a single definition.
|
||
(fls): Fix predicates and printing.
|
||
(seti): Likewise.
|
||
|
||
2018-04-23 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc-protos.h (check_if_valid_sleep_operand): Remove.
|
||
* config/arc/arc.c (arc_expand_builtin): Sleep accepts registers
|
||
and short u6 immediate.
|
||
(check_if_valid_sleep_operand): Remove.
|
||
* config/arc/arc.md (Sleep): Accepts registers and u6 immediates.
|
||
|
||
2018-04-22 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_compute_stack_frame): Consider
|
||
flag_always_save_lp condition.
|
||
* config/nds32/nds32.opt (malways-save-lp): New option.
|
||
|
||
2018-04-22 Shiva Chen <shiva0217@gmail.com>
|
||
|
||
* config/nds32/nds32-protos.h (nds32_use_load_post_increment): Declare.
|
||
* config/nds32/nds32.c (nds32_use_load_post_increment): New.
|
||
* config/nds32/nds32.h
|
||
(USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT): Define.
|
||
(USE_STORE_POST_INCREMENT, USE_STORE_POST_DECREMENT): Define.
|
||
|
||
2018-04-22 Shiva Chen <shiva0217@gmail.com>
|
||
|
||
* config/nds32/nds32-protos.h (nds32_ls_333_p): Remove.
|
||
* config/nds32/nds32.c (nds32_ls_333_p): Remove.
|
||
|
||
2018-04-22 Shiva Chen <shiva0217@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-protos.h (nds32_case_vector_shorten_mode):
|
||
Declare.
|
||
* config/nds32/nds32.c (nds32_case_vector_shorten_mode): New function.
|
||
* config/nds32/nds32.h (CASE_VECTOR_SHORTEN_MODE): Modify.
|
||
|
||
2018-04-22 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_compute_stack_frame): Fix wrong value.
|
||
|
||
2018-04-22 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-protos.h (nds32_data_alignment,
|
||
nds32_local_alignment): Declare.
|
||
* config/nds32/nds32.c (nds32_data_alignment, nds32_constant_alignment,
|
||
nds32_local_alignment): New functions.
|
||
(TARGET_CONSTANT_ALIGNMENT): Define.
|
||
* config/nds32/nds32.h (DATA_ALIGNMENT, LOCAL_ALIGNMENT): Define.
|
||
|
||
2018-04-22 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c
|
||
(TARGET_HARD_REGNO_MODE_OK): Move to the bottom of file.
|
||
(TARGET_MODES_TIEABLE_P): Likewise.
|
||
|
||
2018-04-22 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_asm_file_start): Display optimization
|
||
level Ofast and Og.
|
||
|
||
2018-04-22 Monk Chiang <sh.chiang04@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_volatile_element): Add enum values
|
||
for unaligned access.
|
||
* config/nds32/nds32-intrinsic.c: Implementation of expanding
|
||
unaligned access.
|
||
* config/nds32/nds32-intrinsic.md: Likewise.
|
||
* config/nds32/nds32_intrinsic.h: Likewise.
|
||
* config/nds32/nds32.h (nds32_builtins): Likewise.
|
||
* config/nds32/nds32.opt (munaligned-access): New option.
|
||
* config/nds32/nds32.c (nds32_asm_file_start): Display
|
||
flag_unaligned_access status.
|
||
|
||
2018-04-20 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/riscv/elf.h (LINK_SPEC): Pass --no-relax if
|
||
-mno-relax is present.
|
||
* config/riscv/linux.h (LINK_SPEC): Ditto.
|
||
|
||
2018-04-20 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR c/85365
|
||
* gimple-fold.c (gimple_fold_builtin_strcpy): Suppress -Wrestrict
|
||
for null pointers.
|
||
(gimple_fold_builtin_stxcpy_chk): Same.
|
||
* gimple-ssa-warn-restrict.c (check_bounds_or_overlap): Same.
|
||
|
||
2018-04-20 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
PR target/85456
|
||
* config/rs6000/rs6000.c (init_float128_ieee): Add support to call
|
||
__powikf2 when long double is IEEE 128-bit.
|
||
|
||
2018-04-20 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/riscv/riscv.c (riscv_first_stack_step): Round up min
|
||
step to make sure stack always aligned.
|
||
|
||
2018-04-20 Carl Love <cel@us.ibm.com>
|
||
|
||
PR target/83402
|
||
* config/rs6000/rs6000-c.c (rs6000_gimple_fold_builtin): Add
|
||
size check for arg0.
|
||
|
||
2018-04-20 Nathan Sidwell <nathan@codesourcery.com>
|
||
Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/85445
|
||
* config/nvptx/nvptx.c (nvptx_emit_forking, nvptx_emit_joining):
|
||
Emit insns for calls too.
|
||
(nvptx_find_par): Always look for worker-level predecessor insn.
|
||
(nvptx_propagate): Add is_call parm, return bool. Copy frame for
|
||
calls.
|
||
(nvptx_vpropagate, nvptx_wpropagate): Adjust.
|
||
(nvptx_process_pars): Propagate frames for calls.
|
||
|
||
2018-04-20 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85469
|
||
* common/config/i386/i386-common.c (OPTION_MASK_ISA_IBT_SET):
|
||
Removed.
|
||
(OPTION_MASK_ISA_IBT_UNSET): Likewise.
|
||
(ix86_handle_option): Don't handle OPT_mibt.
|
||
* config/i386/cet.h: Check __CET__ instead of __IBT__ and
|
||
__SHSTK__.
|
||
* config/i386/driver-i386.c (host_detect_local_cpu): Remove
|
||
has_ibt and ibt.
|
||
* config/i386/i386-c.c (ix86_target_macros_internal): Don't
|
||
check OPTION_MASK_ISA_IBT nor flag_cf_protection.
|
||
(ix86_target_macros): Define __CET__ with flag_cf_protection
|
||
for -fcf-protection.
|
||
* config/i386/i386.c (isa2_opts): Remove -mibt.
|
||
* config/i386/i386.h (TARGET_IBT): Removed.
|
||
(TARGET_IBT_P): Likewise.
|
||
(ix86_valid_target_attribute_inner_p): Don't check OPT_mibt.
|
||
* config/i386/i386.md (nop_endbr): Don't check TARGET_IBT.
|
||
* config/i386/i386.opt (mcet): Update help message.
|
||
(mshstk): Likewise.
|
||
(mibt): Removed.
|
||
* doc/invoke.texi: Remove -mibt. Document __CET__. Document
|
||
-mcet as an alias for -mshstk.
|
||
|
||
2018-04-20 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/85475
|
||
* match.pd ((X * CST) * Y -> (X * Y) * CST): Avoid exponential
|
||
complexity by forcing a single use of the multiply operand.
|
||
|
||
2018-04-20 Martin Jambor <mjambor@suse.cz>
|
||
|
||
ipa/85449
|
||
* ipa-cp.c (cgraph_edge_brings_value_p): Move check for self-feeding
|
||
recursion dependency to only apply to non-clones.
|
||
|
||
2018-04-20 Martin Jambor <mjambor@suse.cz>
|
||
|
||
ipa/85447
|
||
* ipa-cp.c (create_specialized_node): Check that clones of
|
||
self-recursive edges exist during IPA-CP.
|
||
|
||
2018-04-19 Toon Moene <toon@moene.org>
|
||
|
||
* doc/invoke.texi: Add -floop-unroll-and-jam to options enabled
|
||
by -O3.
|
||
|
||
2018-04-19 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/85467
|
||
* fold-const.c (fold_ternary_loc) <case BIT_FIELD_REF>: Use
|
||
VECTOR_TYPE_P macro. If type is vector type, VIEW_CONVERT_EXPR the
|
||
VECTOR_CST element to type.
|
||
|
||
2018-04-19 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85397
|
||
* config/i386/i386.h (STACK_SAVEAREA_MODE): New.
|
||
* config/i386/i386.md (builtin_setjmp_setup): Removed.
|
||
(builtin_longjmp): Likewise.
|
||
(save_stack_nonlocal): New pattern.
|
||
(restore_stack_nonlocal): Likewise.
|
||
|
||
2018-04-19 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85404
|
||
* config/i386/cet.c (file_end_indicate_exec_stack_and_cet):
|
||
Replace ASM_OUTPUT_LABEL with fprintf.
|
||
|
||
2018-04-19 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85417
|
||
* config/i386/cet.c (file_end_indicate_exec_stack_and_cet):
|
||
Check flag_cf_protection instead of TARGET_IBT and TARGET_SHSTK.
|
||
* config/i386/i386-c.c (ix86_target_macros_internal): Also
|
||
define __IBT__ and __SHSTK__ for -fcf-protection.
|
||
* config/i386/i386.c (pass_insert_endbranch::gate): Don't check
|
||
TARGET_IBT.
|
||
(ix86_trampoline_init): Likewise.
|
||
(x86_output_mi_thunk): Likewise.
|
||
(ix86_notrack_prefixed_insn_p): Likewise.
|
||
(ix86_option_override_internal): Don't disallow -fcf-protection.
|
||
* config/i386/i386.md (rdssp<mode>): Also enable for
|
||
-fcf-protection.
|
||
(incssp<mode>): Likewise.
|
||
(nop_endbr): Likewise.
|
||
* config/i386/i386.opt (mcet): Change help message to built-in
|
||
functions only.
|
||
(mibt): Likewise.
|
||
(mshstk): Likewise.
|
||
* doc/invoke.texi: Remove -mcet, -mibt and -mshstk condition
|
||
on -fcf-protection. Change -mcet, -mibt and -mshstk to only
|
||
enable CET built-in functions.
|
||
|
||
2018-04-19 Sebastian Peryt <sebastian.peryt@intel.com>
|
||
|
||
* common/config/i386/i386-common.c
|
||
(OPTION_MASK_ISA_MOVDIRI_SET, OPTION_MASK_ISA_MOVDIR64B_SET,
|
||
OPTION_MASK_ISA_MOVDIRI_UNSET,
|
||
OPTION_MASK_ISA_MOVDIR64B_UNSET): New defines.
|
||
(ix86_handle_option): Handle -mmovdiri and -mmovdir64b.
|
||
* config.gcc (movdirintrin.h): New header.
|
||
* config/i386/cpuid.h (bit_MOVDIRI,
|
||
bit_MOVDIR64B): New bits.
|
||
* config/i386/driver-i386.c (host_detect_local_cpu): Detect -mmovdiri
|
||
and -mmvodir64b.
|
||
* config/i386/i386-builtin-types.def ((VOID, PUNSIGNED, UNSIGNED),
|
||
(VOID, PVOID, PCVOID)): New function types.
|
||
* config/i386/i386-builtin.def (__builtin_ia32_directstoreu_u32,
|
||
__builtin_ia32_directstoreu_u64,
|
||
__builtin_ia32_movdir64b): New builtins.
|
||
* config/i386/i386-c.c (__MOVDIRI__, __MOVDIR64B__): New.
|
||
* config/i386/i386.c (ix86_target_string): Added -mmovdir64b
|
||
and -mmovdiri.
|
||
(ix86_valid_target_attribute_inner_p): Ditto.
|
||
(ix86_expand_special_args_builtin): Added VOID_FTYPE_PUNSIGNED_UNSIGNED
|
||
and VOID_FTYPE_PUNSIGNED_UNSIGNED.
|
||
(ix86_expand_builtin): Expand IX86_BUILTIN_MOVDIR64B.
|
||
* config/i386/i386.h (TARGET_MOVDIRI, TARGET_MOVDIRI_P,
|
||
TARGET_MOVDIR64B, TARGET_MOVDIR64B_P): New.
|
||
* config/i386/i386.md (UNSPECV_MOVDIRI, UNSPECV_MOVDIR64B): New.
|
||
(movdiri<mode>, movdir64b_<mode>): New.
|
||
* config/i386/i386.opt: Add -mmovdiri and -mmovdir64b.
|
||
* config/i386/immintrin.h: Include movdirintrin.h.
|
||
* config/i386/movdirintrin.h: New file.
|
||
* doc/invoke.texi: Added -mmovdiri and -mmovdir64b.
|
||
|
||
2018-04-19 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/85455
|
||
* cfg.c (clear_bb_flags): When loop state says we have
|
||
marked irreducible regions also preserve BB_IRREDUCIBLE_LOOP.
|
||
|
||
2018-04-19 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84737
|
||
* tree-vect-data-refs.c (vect_copy_ref_info): New function
|
||
copying restrict info.
|
||
(vect_setup_realignment): Use it.
|
||
* tree-vectorizer.h (vect_copy_ref_info): Declare.
|
||
* tree-vect-stmts.c (vectorizable_store): Copy ref info from
|
||
the first DR to all generated stores.
|
||
(vectorizable_load): Likewise for loads.
|
||
|
||
2018-04-19 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/85446
|
||
* match.pd ((intptr_t) x eq/ne CST to x eq/ne (typeof x) cst): Require
|
||
the integral and pointer types to have the same precision.
|
||
|
||
* doc/install.texi: Document --disable-cet being the default and
|
||
--enable-cet=auto.
|
||
|
||
2018-04-18 Martin Liska <mliska@suse.cz>
|
||
|
||
* ipa-devirt.c (odr_subtypes_equivalent_p): Fix GNU coding
|
||
style.
|
||
|
||
2018-04-18 Martin Liska <mliska@suse.cz>
|
||
|
||
Revert
|
||
2018-03-02 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR ipa/83983
|
||
* ipa-devirt.c (odr_subtypes_equivalent_p): Get the ODR type of both
|
||
arguments if they are comparable.
|
||
|
||
2018-04-18 Martin Liska <mliska@suse.cz>
|
||
|
||
Revert
|
||
2018-03-13 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR lto/84805
|
||
* ipa-devirt.c (odr_subtypes_equivalent_p): Do not get the ODR type of
|
||
incomplete types.
|
||
|
||
2018-04-18 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85388
|
||
* config/i386/i386.c (ix86_expand_split_stack_prologue): Insert
|
||
ENDBR after calling __morestack.
|
||
|
||
2018-04-18 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR jit/85384
|
||
* configure.ac (gcc-driver-name.h): Honor --with-gcc-major-version
|
||
by using gcc_base_ver to generate a gcc_driver_version, and use
|
||
it when generating GCC_DRIVER_NAME.
|
||
* configure: Regenerate.
|
||
|
||
2018-04-18 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/81084
|
||
* config.gcc: Obsolete powerpc*-*-*spe*.
|
||
|
||
2018-04-17 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/84637
|
||
* dbxout.c (dbxout_int): Perform negation in unsigned int type.
|
||
(stabstr_D): Change type of unum from unsigned int to
|
||
unsigned HOST_WIDE_INT. Perform negation in unsigned HOST_WIDE_INT
|
||
type.
|
||
|
||
2018-04-17 Jim Wilson <jimw@sifive.com>
|
||
|
||
PR 84856
|
||
* config/riscv/riscv.c (riscv_compute_frame_info): Add calls to
|
||
RISCV_STACK_ALIGN when using outgoing_args_size and pretend_args_size.
|
||
Set arg_pointer_offset after using pretend_args_size.
|
||
|
||
2018-04-17 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/85431
|
||
* dse.c (record_store): Ignore zero width stores.
|
||
|
||
PR sanitizer/85230
|
||
* asan.c (handle_builtin_stack_restore): Adjust comment. Emit
|
||
__asan_allocas_unpoison call and last_alloca_addr = new_sp before
|
||
__builtin_stack_restore rather than after it.
|
||
* builtins.c (expand_asan_emit_allocas_unpoison): Pass
|
||
arg1 + (virtual_dynamic_stack_rtx - stack_pointer_rtx) as second
|
||
argument instead of virtual_dynamic_stack_rtx.
|
||
|
||
2018-04-17 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||
|
||
* config/rs6000/rs6000-protos.h (rs6000_builtin_is_supported_p):
|
||
New prototype.
|
||
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
|
||
Add note to error message to explain internal mapping of overloaded
|
||
built-in function name to non-overloaded built-in function name.
|
||
* config/rs6000/rs6000.c (rs6000_builtin_is_supported_p): New
|
||
function.
|
||
|
||
2018-04-17 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
PR target/85424
|
||
* config/rs6000/rs6000.md (pack<mode>): Do not try handle a pack
|
||
where the inputs overlap with the output.
|
||
|
||
2018-04-17 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Add
|
||
(=v, v) alternative and explicit "memory" attribute.
|
||
(vec_extract_lo_<mode><mask_name>): Likewise. Also add
|
||
"type", "prefix", "prefix_extra", "length_immediate" and "mode"
|
||
attributes.
|
||
(vec_extract_lo_<mode><mask_name>): Add (=v, v) alternative and use
|
||
"sselog1" type instead of "sselog".
|
||
(vec_extract_hi_<mode><mask_name>): Use "sselog1" type instead of
|
||
"sselog". Remove explicit "memory" attribute.
|
||
(vec_extract_lo_v32hi): Add (=v, v) alternative and explicit "memory",
|
||
"type", "prefix", "prefix_extra", "length_immediate" and "mode"
|
||
attributes.
|
||
(vec_extract_hi_v32hi): Merge all alternatives into one, use
|
||
"sselog1" type instead of "sselog". Remove explicit "memory"
|
||
attribute.
|
||
(vec_extract_hi_v16hi): Merge each pair of alternatives into one,
|
||
use "sselog1" type instead of "sselog". Remove explicit "memory"
|
||
attribute.
|
||
(vec_extract_lo_v64qi): Add (=v, v) alternative and explicit "memory",
|
||
"type", "prefix", "prefix_extra", "length_immediate" and "mode"
|
||
attributes.
|
||
(vec_extract_hi_v64qi): Merge all alternatives into one, use
|
||
"sselog1" type instead of "sselog". Remove explicit "memory"
|
||
attribute.
|
||
(vec_extract_hi_v32qi): Merge each pair of alternatives into one,
|
||
use "sselog1" type instead of "sselog". Remove explicit "memory"
|
||
attribute.
|
||
|
||
PR target/85430
|
||
* config/i386/i386.md (*ashlqi3_1_slp): Use alu1 type instead of alu.
|
||
|
||
PR middle-end/85414
|
||
* rtlhooks.c (gen_lowpart_if_possible): Don't call gen_lowpart_SUBREG
|
||
on a SUBREG.
|
||
|
||
2018-04-17 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR ipa/85421
|
||
* ipa-cp.c (create_specialized_node): Call
|
||
expand_all_artificial_thunks if necessary.
|
||
|
||
2018-04-17 Martin Liska <mliska@suse.cz>
|
||
|
||
PR lto/85405
|
||
* ipa-devirt.c (odr_types_equivalent_p): Remove trailing
|
||
in message, remote space in between '_G' and '('.
|
||
|
||
2018-04-17 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/85281
|
||
* config/i386/sse.md (reduces<mode><mask_scalar_name>,
|
||
avx512f_vmcmp<mode>3<round_saeonly_name>,
|
||
avx512f_vmcmp<mode>3_mask<round_saeonly_name>,
|
||
avx512f_sgetexp<mode><mask_scalar_name><round_saeonly_scalar_name>,
|
||
avx512f_rndscale<mode><round_saeonly_name>,
|
||
avx512dq_ranges<mode><mask_scalar_name><round_saeonly_scalar_name>,
|
||
avx512f_vgetmant<mode><mask_scalar_name><round_saeonly_scalar_name>):
|
||
Use %<iptr>2 instead of %2 for -masm=intel.
|
||
(avx512f_vcvtss2usi<round_name>, avx512f_vcvtss2usiq<round_name>,
|
||
avx512f_vcvttss2usi<round_saeonly_name>,
|
||
avx512f_vcvttss2usiq<round_saeonly_name>): Use %k1 instead of %1 for
|
||
-masm=intel.
|
||
(avx512f_vcvtsd2usi<round_name>, avx512f_vcvtsd2usiq<round_name>,
|
||
avx512f_vcvttsd2usi<round_saeonly_name>,
|
||
avx512f_vcvttsd2usiq<round_saeonly_name>, ufloatv2siv2df2<mask_name>):
|
||
Use %q1 instead of %1 for -masm=intel.
|
||
(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>,
|
||
avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Use %<iptr>3 instead
|
||
of %3 for -masm=intel.
|
||
(sse2_shufpd_v2df_mask): Fix a typo, change %{6%} to %{%6%} for
|
||
-masm=intel.
|
||
(*avx512vl_<code>v2div2qi2_store): Use %w0 instead of %0 for
|
||
-masm=intel.
|
||
(*avx512vl_<code><mode>v4qi2_store): Use %k0 instead of %0 for
|
||
-masm=intel.
|
||
(avx512vl_<code><mode>v4qi2_mask_store): Use a single pattern with
|
||
%k0 and %1 for -masm=intel rather than two patterns, one with %0 and
|
||
%g1.
|
||
(*avx512vl_<code><mode>v8qi2_store): Use %q0 instead of %0 for
|
||
-masm=intel.
|
||
(avx512vl_<code><mode>v8qi2_mask_store): Use a single pattern with
|
||
%q0 and %1 for -masm=intel rather than two patterns, one with %0 and
|
||
%g1 and one with %0 and %1.
|
||
(avx512er_vmrcp28<mode><round_saeonly_name>,
|
||
avx512er_vmrsqrt28<mode><round_saeonly_name>): Use %<iptr>1 instead of
|
||
%1 for -masm=intel.
|
||
(avx5124fmaddps_4fmaddps_mask, avx5124fmaddps_4fmaddss_mask,
|
||
avx5124fmaddps_4fnmaddps_mask, avx5124fmaddps_4fnmaddss_mask,
|
||
avx5124vnniw_vp4dpwssd_mask, avx5124vnniw_vp4dpwssds_mask): Swap order
|
||
of %0 and %{%4%} for -masm=intel.
|
||
(avx5124fmaddps_4fmaddps_maskz, avx5124fmaddps_4fmaddss_maskz,
|
||
avx5124fmaddps_4fnmaddps_maskz, avx5124fmaddps_4fnmaddss_maskz,
|
||
avx5124vnniw_vp4dpwssd_maskz, avx5124vnniw_vp4dpwssds_maskz): Swap
|
||
order of %0 and %{%5%}%{z%} for -masm=intel.
|
||
|
||
2018-04-17 Jan Hubicka <jh@suse.cz>
|
||
|
||
PR lto/85405
|
||
* ipa-devirt.c (odr_types_equivalent_p): Handle bit fields.
|
||
|
||
2018-04-17 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/85329
|
||
* multiple_target.c (create_dispatcher_calls): Set apostrophes
|
||
for target_clone error message. Make default implementation
|
||
clone to be a local declaration.
|
||
(separate_attrs): Add new argument and check for an empty
|
||
string.
|
||
(expand_target_clones): Handle it.
|
||
(ipa_target_clone): Make redirection just for target_clones
|
||
functions.
|
||
|
||
2018-04-16 Cesar Philippidis <cesar@codesourcery.com>
|
||
Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR middle-end/84955
|
||
* omp-expand.c (expand_oacc_for): Add dummy false branch for
|
||
tiled basic blocks without omp continue statements.
|
||
|
||
2018-04-16 Aaron Sawdey <acsawdey@linux.ibm.com>
|
||
|
||
PR target/83660
|
||
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Mark
|
||
vec_extract expression as having side effects to make sure it gets
|
||
a cleanup point.
|
||
|
||
2018-04-16 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85403
|
||
* config/i386/i386.c (get_builtin_code_for_version): Check
|
||
error_mark_node.
|
||
|
||
2018-04-16 Olga Makhotina <olga.makhotina@intel.com>
|
||
|
||
PR target/84331
|
||
* gcc/config.gcc: Support "skylake".
|
||
* gcc/config/i386/i386-c.c (ix86_target_macros_internal): Handle
|
||
PROCESSOR_SKYLAKE.
|
||
* gcc/config/i386/i386.c (m_SKYLAKE): Define.
|
||
(processor_target_table): Add "skylake".
|
||
(ix86_option_override_internal): Add "skylake".
|
||
(get_builtin_code_for_version): Handle PROCESSOR_SKYLAKE,
|
||
PROCESSOR_CANNONLAKE.
|
||
(get_builtin_code_for_version): Fix priority for
|
||
PROCESSOR_ICELAKE_CLIENT, PROCESSOR_ICELAKE_SERVER,
|
||
PROCESSOR_SKYLAKE-AVX512.
|
||
* gcc/config/i386/i386.h (processor_costs): Define TARGET_SKYLAKE.
|
||
(processor_type): Add PROCESSOR_SKYLAKE.
|
||
|
||
2018-04-16 Paolo Carlini <paolo.carlini@oracle.com>
|
||
Jason Merrill <jason@redhat.com>
|
||
|
||
PR c++/85112
|
||
* convert.c (convert_to_integer_1): Use direct recursion for
|
||
enumeral types and types with a precision less than the number
|
||
of bits in their mode.
|
||
|
||
2018-04-16 Julia Koval <julia.koval@intel.com>
|
||
|
||
PR target/84413
|
||
* config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL,
|
||
X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Add m_SKYLAKE_AVX512
|
||
|
||
2018-04-14 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR target/85293
|
||
* config/rs6000/rs6000.opt (mdirect-move): Make deprecated.
|
||
* doc/invoke.texi (RS/6000 and PowerPC Options): Remove -mdirect-move
|
||
and -mno-direct-move.
|
||
|
||
2018-04-13 Paul A. Clarke <pc@us.ibm.com>
|
||
|
||
PR target/83402
|
||
* config/rs6000/emmintrin.h (_mm_slli_epi{16,32,64}):
|
||
Ensure that vec_splat_s32 is only called with 0 <= shift < 16.
|
||
Ensure negative shifts result in {0}.
|
||
|
||
2018-04-13 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/79916
|
||
* config/rs6000/rs6000.c (rs6000_emit_move): Use assigned hard
|
||
regs (if any) to define how to gnerate SD moves when LRA is in
|
||
progress.
|
||
|
||
2018-04-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/85393
|
||
* except.h (expand_dw2_landing_pad_for_region): Remove declaration.
|
||
* except.c (expand_dw2_landing_pad_for_region): Make static.
|
||
* bb-reorder.c (fix_up_crossing_landing_pad): In new_bb emit just
|
||
a label and unconditional jump to old_bb, rather than
|
||
expand_dw2_landing_pad_for_region insn(s) and jump to single_succ
|
||
basic block.
|
||
|
||
PR rtl-optimization/85376
|
||
* simplify-rtx.c (simplify_const_unary_operation): For CLZ and CTZ and
|
||
zero op0, if C?Z_DEFINED_VALUE_AT_ZERO is false, return NULL_RTX
|
||
instead of a specific value.
|
||
|
||
2018-04-13 Jan Hubicka <hubicka@ucw.cz>
|
||
Bin Cheng <bin.cheng@arm.com>
|
||
|
||
PR tree-optimization/82965
|
||
PR tree-optimization/83991
|
||
* cfgloopanal.c (expected_loop_iterations_unbounded): Add
|
||
by_profile_only parameter.
|
||
* cfgloopmanip.c (scale_loop_profile): Further scale loop's profile
|
||
information if the loop was predicted to iterate too many times.
|
||
* cfgloop.h (expected_loop_iterations_unbounded): Update prototype
|
||
|
||
2018-04-13 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR lto/71991
|
||
* config/i386/i386.c (ix86_can_inline_p): Allow safe transitions for
|
||
always inline.
|
||
|
||
2018-04-13 Martin Liska <mliska@suse.cz>
|
||
Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/81657
|
||
* expr.h (enum block_op_methods): Add BLOCK_OP_NO_LIBCALL_RET.
|
||
* expr.c (emit_block_move_hints): Handle BLOCK_OP_NO_LIBCALL_RET.
|
||
* builtins.c (expand_builtin_memory_copy_args): Use
|
||
BLOCK_OP_NO_LIBCALL_RET method for mempcpy with non-ignored target,
|
||
handle dest_addr == pc_rtx.
|
||
|
||
2018-04-12 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR target/85291
|
||
* config/rs6000/rs6000.md (fix_trunc<mode>si2): Use legacy code if
|
||
asked to not generate direct moves.
|
||
(fix_trunc<mode>si2_stfiwx): Similar.
|
||
(fix_trunc<mode>si2_internal): Similar.
|
||
|
||
2018-04-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/83157
|
||
* var-tracking.c (add_stores): Handle STRICT_LOW_PART SET_DEST.
|
||
* cselib.c (cselib_record_sets): For STRICT_LOW_PART dest,
|
||
lookup if dest in some wider mode is known to be const0_rtx and
|
||
if so, record permanent equivalence for it to be ZERO_EXTEND of
|
||
the narrower mode destination.
|
||
|
||
2018-04-12 Cesar Philippidis <cesar@codesourcery.com>
|
||
|
||
* lto-streamer-out.c (output_function): Revert 259346.
|
||
* omp-expand.c (expand_oacc_for): Likewise.
|
||
|
||
2018-04-12 Alexander Monakov <amonakov@ispras.ru>
|
||
|
||
PR rtl-optimization/85354
|
||
* sel-sched-ir.c (sel_init_pipelining): Move cfg_cleanup call...
|
||
* sel-sched.c (sel_global_init): ... here.
|
||
|
||
2018-04-12 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR target/85238
|
||
* lto-wrapper.c (debug_objcopy): Open the files in binary mode.
|
||
* dwarf2out.c (dwarf2out_early_finish): Do not generate assembly in LTO
|
||
mode for PE-COFF targets.
|
||
* config/i386/i386-protos.h (i386_pe_asm_lto_start): Declare.
|
||
(i386_pe_asm_lto_end): Likewise.
|
||
* config/i386/cygming.h (TARGET_ASM_LTO_START): Define.
|
||
(TARGET_ASM_LTO_END): Likewise.
|
||
* config/i386/winnt.c (saved_debug_info_level): New static variable.
|
||
(i386_pe_asm_lto_start): New function.
|
||
(i386_pe_asm_lto_end): Likewise.
|
||
|
||
2018-04-12 Cesar Philippidis <cesar@codesourcery.com>
|
||
Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/84955
|
||
* lto-streamer-out.c (output_function): Fix CFG loop state before
|
||
streaming out.
|
||
* omp-expand.c (expand_oacc_for): Handle calls to internal
|
||
functions like regular functions.
|
||
|
||
2018-04-12 Richard Biener <rguenther@suse.de>
|
||
|
||
PR lto/85371
|
||
* dwarf2out.c (init_sections_and_labels): Use debug_line_section[_label]
|
||
for the early LTO debug to properly generate references to it
|
||
during DIE emission. Do not re-use that for the skeleton for
|
||
split-dwarf.
|
||
(dwarf2out_early_finish): Likewise.
|
||
|
||
2018-04-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/85328
|
||
* config/i386/sse.md
|
||
(<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name> split,
|
||
<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name> split,
|
||
vec_extract_lo_<mode><mask_name> split, vec_extract_lo_v32hi,
|
||
vec_extract_lo_v64qi): For non-AVX512VL if input is xmm16+ reg
|
||
and output is a reg, avoid creating invalid lowpart subreg, but
|
||
instead split into a 512-bit move. Don't split if not AVX512VL,
|
||
input is xmm16+ reg and output is a mem.
|
||
(vec_extract_lo_<mode><mask_name>, vec_extract_lo_v32hi,
|
||
vec_extract_lo_v64qi): Don't require split if not AVX512VL, input is
|
||
xmm16+ reg and output is a mem.
|
||
|
||
2018-04-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
||
|
||
* config/s390/s390.c (s390_output_indirect_thunk_function): Check
|
||
also for flag_dwarf2_cfi_asm.
|
||
|
||
2018-04-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/85342
|
||
* regcprop.c (copyprop_hardreg_forward_1): Remove replaced array, use
|
||
a bool scalar var inside of the loop instead. Don't try to update
|
||
recog_data.operand after failed apply_change_group.
|
||
|
||
2018-04-12 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/85296
|
||
* config/nvptx/nvptx.c (flexible_array_member_type_p): New function.
|
||
(nvptx_assemble_decl_begin): Add undefined param. Declare undefined
|
||
array with flexible array member as array without given dimension.
|
||
(nvptx_assemble_undefined_decl): Set nvptx_assemble_decl_begin call
|
||
argument for undefined param to true.
|
||
|
||
2018-04-11 Aaron Sawdey <acsawdey@linux.ibm.com>
|
||
|
||
PR target/85321
|
||
* doc/invoke.texi (RS/6000 and PowerPC Options): Document options
|
||
-mcall- and -mtraceback=. Remove options -mabi=spe and -mabi=no-spe
|
||
from PowerPC section.
|
||
* config/rs6000/sysv4.opt (mcall-): Improve help text.
|
||
* config/rs6000/rs6000.opt (mblock-compare-inline-limit=): Trim
|
||
help text that is too long.
|
||
* config/rs6000/rs6000.opt (mblock-compare-inline-loop-limit=): Trim
|
||
help text that is too long.
|
||
* config/rs6000/rs6000.opt (mstring-compare-inline-limit=): Trim
|
||
help text that is too long.
|
||
|
||
2018-04-11 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/alpha/alpha.md (stack_probe_internal): Rename
|
||
from "probe_stack". Update all callers.
|
||
|
||
2018-04-11 Alexander Monakov <amonakov@ispras.ru>
|
||
|
||
PR rtl-optimization/84566
|
||
* sched-deps.c (sched_analyze_insn): Check deps->readonly when invoking
|
||
sched_macro_fuse_insns.
|
||
|
||
2018-04-11 Alexander Monakov <amonakov@ispras.ru>
|
||
|
||
PR target/84301
|
||
* sched-rgn.c (add_branch_dependences): Move sel_sched_p check here...
|
||
(compute_block_dependences): ... from here.
|
||
|
||
2018-04-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/85331
|
||
* vec-perm-indices.h (vec_perm_indices::clamp): Change input type
|
||
from int to HOST_WIDE_INT.
|
||
|
||
2018-04-11 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR ipa/84149
|
||
* ipa-cp.c (propagate_vals_across_pass_through): Expand comment.
|
||
(cgraph_edge_brings_value_p): New parameter dest_val, check if it is
|
||
not the same as the source val.
|
||
(cgraph_edge_brings_value_p): New parameter.
|
||
(gather_edges_for_value): Pass destination value to
|
||
cgraph_edge_brings_value_p.
|
||
(perhaps_add_new_callers): Likewise.
|
||
(get_info_about_necessary_edges): Likewise and exclude values brought
|
||
only by self-recursive edges.
|
||
(create_specialized_node): Redirect only clones of self-calling edges.
|
||
(+self_recursive_pass_through_p): New function.
|
||
(find_more_scalar_values_for_callers_subset): Use it.
|
||
(find_aggregate_values_for_callers_subset): Likewise.
|
||
(known_aggs_to_agg_replacement_list): Removed.
|
||
(decide_whether_version_node): Re-calculate known constants for all
|
||
remaining context clones.
|
||
|
||
2018-04-11 Richard Biener <rguenther@suse.de>
|
||
|
||
PR lto/85339
|
||
* dwarf2out.c (dwarf2out_finish): Remove DW_AT_stmt_list attribute
|
||
from early DWARF output.
|
||
(dwarf2out_early_finish): Output line info unconditionally into
|
||
early DWARF and add reference to it.
|
||
|
||
2018-04-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/85281
|
||
* config/i386/sse.md (iptr): Add V16SFmode and V8DFmode cases.
|
||
(<avx512>_vec_dup<mode><mask_name>): Use a single pattern for modes
|
||
other than V2DFmode using iptr mode attribute.
|
||
(<avx512>_vec_dup<mode><mask_name>): Use iptr mode attribute.
|
||
|
||
2018-04-11 Alexander Monakov <amonakov@ispras.ru>
|
||
|
||
PR rtl-optimization/84659
|
||
* sel-sched-ir.c (sel_init_pipelining): Invoke cleanup_cfg.
|
||
|
||
2018-04-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/85302
|
||
* dwarf2out.c (skip_loc_list_entry): Don't call size_of_locs if
|
||
SIZEP is NULL.
|
||
(output_loc_list): Pass address of a dummy size variable even in the
|
||
locview handling loop.
|
||
(index_location_lists): Add comment on why skip_loc_list_entry can't
|
||
call size_of_locs.
|
||
|
||
2018-04-11 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
PR target/85261
|
||
* config/arm/arm-builtins.c (arm_expand_builtin): Force input operand
|
||
into register.
|
||
|
||
2018-04-10 Aaron Sawdey <acsawdey@linux.ibm.com>
|
||
|
||
PR target/85321
|
||
* doc/invoke.texi (RS/6000 and PowerPC Options): Document options
|
||
-mblock-compare-inline-limit, -mblock-compare-inline-loop-limit,
|
||
and -mstring-compare-inline-limit.
|
||
|
||
2018-04-10 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR target/85287
|
||
* gcc/config/rs6000/rs6000.md (allocate_stack): Put the residual size
|
||
for stack clash protection in a register whenever we need it to be in
|
||
a register.
|
||
|
||
2018-04-10 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* common/config/rs6000/rs6000-common.c (rs6000_option_init_struct):
|
||
Enable -fasynchronous-unwind-tables by default if OBJECT_FORMAT_ELF.
|
||
|
||
2018-04-10 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR target/85321
|
||
* config/rs6000/rs6000.opt (mtraceback=): Show the allowed values in
|
||
the help text.
|
||
(mlong-double-): Ditto.
|
||
* config/rs6000/sysv4.opt (msdata=): Ditto.
|
||
(mtls-size=): Ditto.
|
||
|
||
2018-04-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||
|
||
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Remove
|
||
erroneous entries for
|
||
"vector int vec_ldl (int, long int *)", and
|
||
"vector unsigned int vec_ldl (int, unsigned long int *)".
|
||
Add comments and entries for
|
||
"vector bool char vec_ldl (int, bool char *)",
|
||
"vector bool short vec_ldl (int, bool short *)",
|
||
"vector bool int vec_ldl (int, bool int *)",
|
||
"vector bool long long vec_ldl (int, bool long long *)",
|
||
"vector pixel vec_ldl (int, pixel *)",
|
||
"vector long long vec_ldl (int, long long *)",
|
||
"vector unsigned long long vec_ldl (int, unsigned long long *)".
|
||
* config/rs6000/rs6000.c (rs6000_init_builtins): Initialize new
|
||
type tree bool_long_long_type_node and correct definition of
|
||
bool_V2DI_type_node to make reference to this new type tree.
|
||
(rs6000_mangle_type): Replace erroneous reference to
|
||
bool_long_type_node with bool_long_long_type_node.
|
||
* config/rs6000/rs6000.h (enum rs6000_builtin_type_index): Add
|
||
comments to emphasize sign distinctions for char and int types and
|
||
replace RS6000_BTI_bool_long constant with
|
||
RS6000_BTI_bool_long_long constant. Also add comment to restrict
|
||
use of RS6000_BTI_pixel.
|
||
(bool_long_type_node): Remove this macro definition.
|
||
(bool_long_long_type_node): New macro definition
|
||
|
||
2018-04-10 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/85300
|
||
* combine.c (subst): Handle subst of CONST_SCALAR_INT_P new_rtx also
|
||
into FLOAT and UNSIGNED_FLOAT like ZERO_EXTEND, return a CLOBBER if
|
||
simplify_unary_operation fails.
|
||
|
||
2018-04-10 Martin Liska <mliska@suse.cz>
|
||
|
||
* gdbhooks.py: Add pretty-printers for varpool_node, symtab_node,
|
||
cgraph_edge and ipa_ref.
|
||
|
||
2018-04-10 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/85177
|
||
PR target/85255
|
||
* config/i386/sse.md
|
||
(<extract_type>_vinsert<shuffletype><extract_suf>_mask): Fix
|
||
computation of the VEC_MERGE selector from mask.
|
||
(<extract_type>_vinsert<shuffletype><extract_suf>_1<mask_name>):
|
||
Fix decoding of the VEC_MERGE selector into mask.
|
||
|
||
2018-04-10 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/85286
|
||
* tree-vect-data-refs.c (vect_get_smallest_scalar_type):
|
||
|
||
2018-04-10 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* final.c (final_1): Set insn_last_address as well as
|
||
insn_current_address.
|
||
|
||
2018-04-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
PR target/85173
|
||
* explow.c (emit_stack_probe): Call validize_mem on memory location
|
||
before passing it to gen_probe_stack. Create address operand and
|
||
legitimize it for the probe_stack_address case.
|
||
|
||
2018-04-09 Jan Hubicka <jh@suse.cz>
|
||
|
||
PR lto/85078
|
||
* ipa-devirt.c (rebuild_type_inheritance-hash): New.
|
||
* ipa-utils.h (rebuild_type_inheritance-hash): Declare.
|
||
* tree.c (free_lang_data_in_type): Fix handling of binfos;
|
||
walk basetypes.
|
||
(free_lang_data): Rebuild type inheritance graph.
|
||
|
||
2018-04-09 Martin Sebor <msebor@redhat.com>
|
||
|
||
* invoke.texi (-finline-small-functions): Mention other optimization
|
||
options.
|
||
(-findirect-inlining, -fpartial-inlining): Same.
|
||
(-finline-functions-called-once): Same.
|
||
(-freorder-blocks-and-partition): Same.
|
||
|
||
2018-04-09 Jan Hubicka <jh@suse.cz>
|
||
|
||
PR rtl/84058
|
||
* cfgcleanup.c (try_forward_edges): Do not give up on crossing
|
||
jumps; choose last target that matches the criteria (i.e.
|
||
no partition changes for non-crossing jumps).
|
||
* cfgrtl.c (cfg_layout_redirect_edge_and_branch): Add basic
|
||
support for redirecting crossing jumps to non-crossing.
|
||
|
||
2018-04-09 Alexey Brodkin <abrodkin@synopsys.com>
|
||
|
||
* config/arc/arc.c (arc_expand_prologue): Set stack usage info
|
||
also for naked functions.
|
||
|
||
2018-04-09 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.md (add_shift): New pattern.
|
||
(add_shift2): Likewise.
|
||
(sub_shift): Likewise.
|
||
(sub_shift_cmp0_noout): Likewise.
|
||
(compare_si_ashiftsi): Likewise.
|
||
(xbfu_cmp0_noout): New combine pattern.
|
||
(xbfu_cmp0"): Likewise.
|
||
(movsi_set_cc_insn): Place the predicable variant first.
|
||
(commutative_binary_cmp0_noout): Remove clobber.
|
||
(commutative_binary_cmp0): New pattern.
|
||
(noncommutative_binary_cmp0): Likewise.
|
||
(noncommutative_binary_cmp0_noout): Likewise.
|
||
(noncommutative_binary_comparison_result_used): Removed.
|
||
(rsub_cmp0): New pattern.
|
||
(rsub_cmp0_noout): Likewise.
|
||
(extzvsi): Changed, keep only meaningful variants.
|
||
(SQH, SEZ): New iterators.
|
||
(SQH_postfix): New mode attribute.
|
||
(SEZ_prefix): New code attribute.
|
||
(<SEZ_prefix>xt<SQH_postfix>_cmp0_noout): New instruction pattern.
|
||
(<SEZ_prefix>xt<SQH_postfix>_cmp0): Likewise.
|
||
* config/arc/predicates.md (cc_set_register): Use CC_REG instead
|
||
of numerical value.
|
||
(noncommutative_operator): Check the availability of barrel
|
||
shifter option.
|
||
|
||
2018-04-09 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/85284
|
||
* tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions):
|
||
Only use the niter constraining form of simple_iv when the exit
|
||
is always executed.
|
||
|
||
2018-04-09 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/84041
|
||
* config/nvptx/nvptx.md (define_c_enum "unspecv"): Add UNSPECV_MEMBAR.
|
||
(define_expand "*memory_barrier"): New define_expand.
|
||
(define_insn "memory_barrier"): New insn.
|
||
|
||
2018-04-09 Andrey Belevantsev <abel@ispras.ru>
|
||
|
||
PR rtl-optimization/80463
|
||
PR rtl-optimization/83972
|
||
PR rtl-optimization/83480
|
||
|
||
* sel-sched-ir.c (has_dependence_note_mem_dep): Take into account the
|
||
correct producer for the insn.
|
||
(tidy_control_flow): Fixup seqnos in case of debug insns.
|
||
|
||
2018-04-09 Andrey Belevantsev <abel@ispras.ru>
|
||
|
||
PR rtl-optimization/83913
|
||
|
||
* sel-sched-ir.c (merge_expr_data): Choose the middle between two
|
||
different sched-times when merging exprs.
|
||
|
||
2018-04-09 Andrey Belevantsev <abel@ispras.ru>
|
||
|
||
PR rtl-optimization/83962
|
||
|
||
* sel-sched-ir.c (tidy_control_flow): Correct the order in which we call
|
||
tidy_fallthru_edge and tidy_control_flow.
|
||
|
||
2018-04-09 Andrey Belevantsev <abel@ispras.ru>
|
||
|
||
PR rtl-optimization/83530
|
||
|
||
* sel-sched.c (force_next_insn): New global variable.
|
||
(remove_insn_for_debug): When force_next_insn is true, also leave only
|
||
next insn in the ready list.
|
||
(sel_sched_region): When the region wasn't scheduled, make another pass
|
||
over it with force_next_insn set to 1.
|
||
|
||
2018-04-08 Monk Chiang <sh.chiang04@gmail.com>
|
||
|
||
* config.gcc (nds32le-*-*, nds32be-*-*): Add nds32/nds32_intrinsic.h
|
||
into tm_file.
|
||
* config/nds32/constants.md (unspec_volatile_element): Add enum values
|
||
for interrupt control.
|
||
* config/nds32/nds32-intrinsic.c: Implementation of intrinsic
|
||
functions for interrupt control.
|
||
* config/nds32/nds32-intrinsic.md: Likewise.
|
||
* config/nds32/nds32_intrinsic.h: Likewise.
|
||
* config/nds32/nds32.h (nds32_builtins): Likewise.
|
||
|
||
2018-04-08 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_init_machine_status,
|
||
nds32_legitimate_index_p, nds32_legitimate_address_p): Consider
|
||
strict_aligned_p field.
|
||
(nds32_expand_to_rtl_hook): New function.
|
||
(TARGET_EXPAND_TO_RTL_HOOK): Define.
|
||
* config/nds32/nds32.h (machine_function): Add strict_aligned_p field.
|
||
|
||
2018-04-08 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config.gcc (nds32*-*-*): Check that n7 is valid to --with-cpu.
|
||
* config/nds32/nds32-n7.md: New file.
|
||
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N7.
|
||
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n7
|
||
pipeline.
|
||
* config/nds32/nds32-protos.h: More declarations for n7 pipeline.
|
||
* config/nds32/nds32.md (pipeline_model): Add n7.
|
||
* config/nds32/nds32.opt (mcpu): Support n7 pipeline cpus.
|
||
* config/nds32/pipelines.md: Include n7 settings.
|
||
|
||
2018-04-08 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config.gcc (nds32*-*-*): Check that e8 is valid to --with-cpu.
|
||
* config/nds32/nds32-e8.md: New file.
|
||
* config/nds32/nds32-opts.h (nds32-cpu_type): Add CPU_E8.
|
||
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for e8
|
||
pipeline.
|
||
* config/nds32/nds32-protos.h: More declarations for e8 pipeline.
|
||
* config/nds32/nds32.md (pipeline_model): Add e8.
|
||
* config/nds32/nds32.opt (mcpu): Support e8 pipeline cpus.
|
||
* config/nds32/pipelines.md: Include e8 settings.
|
||
|
||
2018-04-08 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config.gcc (nds32*-*-*): Check that n6/n8/s8 are valid to --with-cpu.
|
||
* config/nds32/nds32-n8.md: New file.
|
||
* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N6 and CPU_N8.
|
||
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n8
|
||
pipeline.
|
||
* config/nds32/nds32-protos.h: More declarations for n8 pipeline.
|
||
* config/nds32/nds32-utils.c: More implementations for n8 pipeline.
|
||
* config/nds32/nds32.md (pipeline_model): Add n8.
|
||
* config/nds32/nds32.opt (mcpu): Support n8 pipeline cpus.
|
||
* config/nds32/pipelines.md: Include n8 settings.
|
||
|
||
2018-04-08 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config.gcc (nds32*): Add nds32-utils.o into extra_objs.
|
||
* config/nds32/nds32-n9-2r1w.md: New file.
|
||
* config/nds32/nds32-n9-3r2w.md: New file.
|
||
* config/nds32/nds32-opts.h (nds32_cpu_type, nds32_mul_type,
|
||
nds32_register_ports): New or modify for cpu n9.
|
||
* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n9
|
||
pipeline.
|
||
* config/nds32/nds32-protos.h: More declarations for n9 pipeline.
|
||
* config/nds32/nds32-utils.c: New file.
|
||
* config/nds32/nds32.h (TARGET_PIPELINE_N9, TARGET_PIPELINE_SIMPLE,
|
||
TARGET_MUL_SLOW): Define.
|
||
* config/nds32/nds32.md (pipeline_model): New attribute.
|
||
* config/nds32/nds32.opt (mcpu, mconfig-mul, mconfig-register-ports):
|
||
New options that support cpu n9.
|
||
* config/nds32/pipelines.md: Include n9 settings.
|
||
* config/nds32/t-nds32 (nds32-utils.o): Add dependency.
|
||
|
||
2018-04-08 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-md-auxiliary.c (output_cond_branch): Output align
|
||
information if necessary.
|
||
(output_cond_branch_compare_zero): Likewise.
|
||
* config/nds32/nds32.c (nds32_adjust_insn_length): Consider align case.
|
||
(nds32_target_alignment): Refine for alignment.
|
||
* config/nds32/nds32.h (NDS32_ALIGN_P): Define.
|
||
(FUNCTION_BOUNDARY): Modify.
|
||
* config/nds32/nds32.md (call_internal, call_value_internal): Consider
|
||
align case.
|
||
* config/nds32/nds32.opt (malways-align, malign-functions): New.
|
||
|
||
2018-04-08 Monk Chiang <sh.chiang04@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_volatile_element): Add values for
|
||
TLB operation and data prefetch.
|
||
* config/nds32/nds32-intrinsic.c: Implementation of intrinsic
|
||
functions for TLB operation and data prefetch.
|
||
* config/nds32/nds32-intrinsic.md: Likewise.
|
||
* config/nds32/nds32_intrinsic.h: Likewise.
|
||
* config/nds32/nds32.c (nds32_dpref_names): Likewise.
|
||
(nds32_print_operand): Likewise.
|
||
* config/nds32/nds32.h (nds32_builtins): Likewise.
|
||
|
||
2018-04-07 Thomas Koenig <tkoenig@gcc.gnu.org>
|
||
Andrew Pinski <pinsika@gcc.gnu.org>
|
||
|
||
PR middle-end/82976
|
||
* match.pd: Use constant_boolean_node of correct type instead of
|
||
boolean_true_node or boolean_false_node for simplifying
|
||
pointer comparisons to zero.
|
||
|
||
2018-04-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/80021
|
||
* tree.c (verify_type_variant): Make error call in verify_variant_match
|
||
translatable and remove final full stop.
|
||
|
||
2018-04-07 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_volatile_element): Add
|
||
UNSPEC_VOLATILE_EH_RETURN.
|
||
* config/nds32/nds32-md-auxiliary.c (nds32_output_stack_push,
|
||
nds32_output_stack_pop): Support dwarf exception handling process.
|
||
* config/nds32/nds32-protos.h (nds32_dynamic_chain_address): Declare.
|
||
* config/nds32/nds32.c (nds32_init_machine_status): Support dwarf
|
||
exception handling process.
|
||
(nds32_compute_stack_frame): Likewise.
|
||
(nds32_return_addr_rtx): Likewise.
|
||
(nds32_initial_elimination_offset): Likewise.
|
||
(nds32_expand_prologue): Likewise.
|
||
(nds32_expand_epilogue): Likewise.
|
||
(nds32_dynamic_chain_address): New function.
|
||
* config/nds32/nds32.h (machine_function): Add fields for dwarf
|
||
exception handling.
|
||
(DYNAMIC_CHAIN_ADDRESS): Define.
|
||
(EH_RETURN_DATA_REGNO): Define.
|
||
(EH_RETURN_STACKADJ_RTX): Define.
|
||
* config/nds32/nds32.md (eh_return, nds32_eh_return): Implement
|
||
patterns for dwarf exception handling.
|
||
|
||
2018-04-07 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.h: Clean up obsolete macros.
|
||
|
||
2018-04-07 Monk Chiang <sh.chiang04@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_element, unspec_volatile_element):
|
||
Add enum values for particular instructions.
|
||
* config/nds32/nds32-intrinsic.c: Implementation of expanding
|
||
particular intrinsic functions.
|
||
* config/nds32/nds32-intrinsic.md: Likewise.
|
||
* config/nds32/nds32_intrinsic.h: Likewise.
|
||
* config/nds32/nds32.h (nds32_builtins): Likewise.
|
||
* config/nds32/nds32.md (type): Add pbsad and pbsada.
|
||
(btst, ave): New patterns for particular instructions.
|
||
|
||
2018-04-07 Monk Chiang <sh.chiang04@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_element, unspec_volatile_element):
|
||
Add enum values for atomic load/store and memory sync.
|
||
* config/nds32/nds32-intrinsic.c: Implementation for atomic load/store
|
||
and memory sync.
|
||
* config/nds32/nds32-intrinsic.md: Likewise.
|
||
* config/nds32/nds32_intrinsic.h: Likewise.
|
||
* config/nds32/nds32.h (nds32_builtins): Likewise.
|
||
|
||
2018-04-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/85257
|
||
* fold-const.c (native_encode_vector): If not all elts could fit
|
||
and off is -1, return 0 rather than offset.
|
||
* tree-ssa-sccvn.c (vn_reference_lookup_3): Pass
|
||
(offseti - offset2) / BITS_PER_UNIT as 4th argument to
|
||
native_encode_expr. Verify len * BITS_PER_UNIT >= maxsizei. Don't
|
||
adjust buffer in native_interpret_expr call.
|
||
|
||
2018-04-07 Monk Chiang <sh.chiang04@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_volatile_element): Add cache
|
||
control enum values.
|
||
* config/nds32/nds32-intrinsic.c: Add cache control expand functions.
|
||
* config/nds32/nds32-intrinsic.md: Add cache control patterns.
|
||
* config/nds32/nds32.c (nds32_cctl_names): New.
|
||
(nds32_print_operand): Handle cache control register names.
|
||
* config/nds32/nds32.h (nds32_builtins): New enum values.
|
||
* config/nds32/nds32_intrinsic.h: Add cache control enum types and
|
||
macros.
|
||
* config/nds32/nds32.md (type): Add mmu.
|
||
* config/nds32/pipelines.md (simple_insn): Add mmu.
|
||
|
||
2018-04-07 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (type): Remove call.
|
||
* config/nds32/pipelines.md (simple_insn): Likewise.
|
||
|
||
2018-04-07 Monk Chiang <sh.chiang04@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_volatile_element): Add
|
||
UNSPEC_VOLATILE_FMFCSR, UNSPEC_VOLATILE_FMTCSR and
|
||
UNSPEC_VOLATILE_FMFCFG.
|
||
* config/nds32/nds32-intrinsic.c (bdesc_noarg): New builtin
|
||
description for fmfcfg and fmfcsr.
|
||
(bdesc_1arg): Add fmtcsr.
|
||
(bdesc_2arg): Add fcpynss, fcpyss, fcpynsd and fcpysd.
|
||
(nds32_expand_builtin_impl): Deal with FPU intrinsic functions.
|
||
* config/nds32/nds32-intrinsic.md (unspec_fcpynsd, unspec_fcpysd,
|
||
unspec_fcpynss, unspec_fcpysd, unspec_fcpyss, unspec_fmfcsr,
|
||
unspec_fmfcfg): New patterns.
|
||
* config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FMFCFG,
|
||
NDS32_BUILTIN_FMFCSR, NDS32_BUILTIN_FMTCSR, NDS32_BUILTIN_FCPYNSS,
|
||
NDS32_BUILTIN_FCPYSS,NDS32_BUILTIN_FCPYNSD and NDS32_BUILTIN_FCPYSD.
|
||
* config/nds32/nds32_intrinsic.h (__nds32__fcpynsd, __nds32__fcpynss,
|
||
__nds32__fcpysd, __nds32__fcpyss, __nds32__fmfcsr, __nds32__fmtcsr,
|
||
__nds32__fmfcfg): Define.
|
||
|
||
2018-04-07 Monk Chiang <sh.chiang04@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_intrinsic_register_names): Add more
|
||
intrinsic register names.
|
||
* config/nds32/nds32_intrinsic.h (nds32_intrinsic_registers): Add more
|
||
intrinsic register enum values and macros.
|
||
|
||
2018-04-07 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_legitimate_index_p): Modify condition
|
||
for load/store addressing form.
|
||
(nds32_print_operand_address): Likewise.
|
||
|
||
2018-04-06 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR target/85196
|
||
* config/sparc/sparc.c (sparc_expand_move): Deal with symbolic operands
|
||
based on LABEL_REF. Remove useless assertion.
|
||
(pic_address_needs_scratch): Fix formatting.
|
||
(sparc_legitimize_pic_address): Minor tweaks.
|
||
(sparc_delegitimize_address): Adjust assertion accordingly.
|
||
* config/sparc/sparc.md (movsi_pic_label_ref): Change label_ref_operand
|
||
into symbolic_operand.
|
||
(movsi_high_pic_label_ref): Likewise.
|
||
(movsi_lo_sum_pic_label_ref): Likewise.
|
||
(movdi_pic_label_ref): Likewise.
|
||
(movdi_high_pic_label_ref): Likewise.
|
||
(movdi_lo_sum_pic_label_ref): Likewise.
|
||
|
||
2018-04-06 Amaan Cheval <amaan.cheval@gmail.com>
|
||
|
||
* config.gcc (x86_64-*-rtems*): Add rtems.h to tm_file for
|
||
custom LIB_SPEC setup.
|
||
|
||
2018-04-06 Ruslan Bukin <br@bsdpad.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config.gcc (riscv*-*-freebsd*): Add RISC-V FreeBSD support.
|
||
* config/riscv/freebsd.h: New.
|
||
|
||
2018-04-06 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_adjust_insn_length): Refine.
|
||
* config/nds32/nds32.h (ADJUST_INSN_LENGTH): Change the location in
|
||
file.
|
||
|
||
2018-04-06 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/nds32-md-auxiliary.c (nds32_output_return,
|
||
nds32_output_call, nds32_symbol_binds_local_p): New functions.
|
||
* config/nds32/nds32-protos.h (nds32_output_call,
|
||
nds32_output_return): Declare.
|
||
* config/nds32/nds32.md: Refine all the call and return patterns.
|
||
|
||
2018-04-06 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/85252
|
||
* dwarf2out.c (rtl_for_decl_init): For STRING_CST initializer only
|
||
build CONST_STRING if TYPE_MAX_VALUE is non-NULL and is INTEGER_CST.
|
||
|
||
PR rtl-optimization/84872
|
||
* cfgloopmanip.c (create_preheader): Use make_forwarder_block even if
|
||
nentry == 1 when CP_FALLTHRU_PREHEADERS and single_entry is
|
||
EDGE_CROSSING edge.
|
||
|
||
2018-04-06 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
* expr.c (copy_blkmode_to_reg): Revert 254862.
|
||
* doc/sourcebuild.texi (word_mode_no_slow_unalign): Likewise.
|
||
|
||
2018-04-06 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/85244
|
||
* tree-dfa.c (get_ref_base_and_extent): Reset seen_variable_array_ref
|
||
after seeing a component reference with an adjacent field. Treat
|
||
refs to arrays at struct end of external decls similar to
|
||
refs to unconstrained commons.
|
||
|
||
2018-04-06 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR sanitizer/85213
|
||
* fold-const.c (twoval_comparison_p): Remove SAVE_P argument and don't
|
||
look through SAVE_EXPRs with non-side-effects argument. Adjust
|
||
recursive calls.
|
||
(fold_comparison): Adjust twoval_comparison_p caller, don't handle
|
||
save_p here.
|
||
|
||
2018-04-06 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/85180
|
||
* alias.c (find_base_term): New wrapper around find_base_term
|
||
unwinding CSELIB_VAL_PTR changes.
|
||
(find_base_term): Do not restore CSELIB_VAL_PTR during the
|
||
recursion.
|
||
|
||
2018-04-06 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
||
|
||
* config/s390/s390.c (s390_z10_optimize_cmp): Expand dedicated NOP
|
||
instructions.
|
||
* config/s390/s390.md (UNSPECV_NOP_LR_0, UNSPECV_NOP_LR_1): New
|
||
constant definitions.
|
||
("nop"): lr 0,0 -> nopr r0
|
||
("nop_lr0", "nop_lr1"): New insn definitions.
|
||
|
||
2018-04-06 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (*stack_push, *stack_pop): Use
|
||
NDS32_V3PUSH_AVAILABLE_P macro.
|
||
|
||
2018-04-06 Monk Chiang <sh.chiang04@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config.gcc (nds32*-*-*): Add v2j v3f v3s checking.
|
||
(nds32*-*-*): Add float and fpu_config into supported_defaults.
|
||
* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
|
||
Include TARGET_DEFAULT_FPU_ISA and TARGET_DEFAULT_FPU_FMA.
|
||
* config/nds32/constants.md (unspec_element): Add UNSPEC_COPYSIGN,
|
||
UNSPEC_FCPYNSD, UNSPEC_FCPYNSS, UNSPEC_FCPYSD and UNSPEC_FCPYSS.
|
||
* config/nds32/constraints.md: New constraints and checking for hard
|
||
float configuration.
|
||
* config/nds32/iterators.md: New mode iterator and attribute for hard
|
||
float configuration.
|
||
* config/nds32/nds32-doubleword.md: Use hard float alternatives and
|
||
patterns.
|
||
* config/nds32/nds32-fpu.md: New file.
|
||
* config/nds32/nds32-md-auxiliary.c: New functions and checkings to
|
||
deal with hard float code generation.
|
||
* config/nds32/nds32-opts.h (nds32_arch_type): Add ARCH_V3F and
|
||
ARCH_V3S.
|
||
(abi_type, float_reg_number): New enum type.
|
||
* config/nds32/nds32-predicates.c: New predicates for hard float.
|
||
* config/nds32/nds32-protos.h: Declare functions for hard float.
|
||
* config/nds32/nds32.c: Implementation for hard float configuration.
|
||
* config/nds32/nds32.h: Definitions for hard float configuration.
|
||
* config/nds32/nds32.md: Include hard float machine description and
|
||
modify patterns for hard float configuration.
|
||
* config/nds32/nds32.opt: New options for hard float configuration.
|
||
* config/nds32/predicates.md: New predicates for hard float
|
||
configuration.
|
||
|
||
2018-04-06 Kuan-Lin Chen <kuanlinchentw@gmail.com>
|
||
|
||
* common/config/nds32/nds32-common.c
|
||
(nds32_option_optimization_table): Enable -mreleax-hint by default.
|
||
|
||
2018-04-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/85195
|
||
* match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Use view_convert around
|
||
CONSTRUCTOR_ELT (ctor, ...)->value.
|
||
|
||
2018-04-05 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/85193
|
||
* config/i386/i386.md (define_attr "memory"): Handle rotate1 type.
|
||
|
||
2018-04-05 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/85204
|
||
* config/nvptx/nvptx.c (nvptx_single): Fix neutering of bb with only
|
||
cond jump.
|
||
|
||
2018-04-05 Shiva Chen <shiva0217@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/constraints.md (U33): Fine-tune checking condition.
|
||
* config/nds32/nds32-md-auxiliary.c (nds32_mem_format): Ditto.
|
||
* config/nds32/nds32.h (nds32_16bit_address_type): Add
|
||
ADDRESS_POST_MODIFY_LO_REG_IMM3U.
|
||
|
||
2018-04-05 Shiva Chen <shiva0217@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/constraints.md (Ufe): New memory constraint.
|
||
* config/nds32/nds32-md-auxiliary.c (nds32_mem_format,
|
||
nds32_output_16bit_load): Consider r8 register for lwi45.fe format.
|
||
* config/nds32/nds32.c (nds32_print_operand): Output lwi45.fe
|
||
operands.
|
||
* config/nds32/nds32.h (nds32_16bit_address_type): Add ADDRESS_R8_IMM7U.
|
||
* config/nds32/nds32.md (*mov<mode>): Adjust pattern.
|
||
|
||
2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md: Use optimize_size in the condition for
|
||
alu-shift instructions.
|
||
|
||
2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (divsi4, udivsi4): New patterns.
|
||
|
||
2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (negsi2): Refine pattern.
|
||
|
||
2018-04-05 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/iterators.md (shift_rotate): New code iterator.
|
||
(shift): New code attribute.
|
||
* config/nds32/nds32-md-auxiliary.c (nds32_expand_constant): New.
|
||
* config/nds32/nds32-protos.h (nds32_expand_constant): Declare.
|
||
* config/nds32/nds32.c (nds32_print_operand): Deal with more cases.
|
||
* config/nds32/nds32.md (addsi3, *add_srli): Refine implementation for
|
||
bit-wise operations.
|
||
(andsi3, *andsi3): Ditto.
|
||
(iorsi3, *iorsi3, *or_slli, *or_srli): Ditto.
|
||
(xorsi3, *xorsi3, *xor_slli, *xor_srli): Ditto.
|
||
(<shift>si3, *ashlsi3, *ashrsi3, *lshrsi3, *rotrsi3): Ditto.
|
||
* config/nds32/predicates.md (nds32_rimm5u_operand, nds32_and_operand,
|
||
nds32_ior_operand, nds32_xor_operand): New predicates.
|
||
|
||
2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (add<mode>3, sub<mode>3): Rename to ...
|
||
(addsi3, subsi3): ... this.
|
||
|
||
2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (*sub_srli, *and_slli): Fine-tune predicator.
|
||
|
||
2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md: Adjust indention.
|
||
|
||
2018-04-05 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/nds32.md (feature): New attribute.
|
||
|
||
2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (subtype): New attribute.
|
||
|
||
2018-04-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
PR target/85203
|
||
* config/arm/arm-builtins.c (arm_expand_builtin): Change
|
||
expansion to perform a bitwise AND of the argument followed by a
|
||
boolean negation of the result.
|
||
|
||
2018-04-04 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR rtl-optimization/84878
|
||
* ddg.c (add_cross_iteration_register_deps): Use DF_REF_BB to determine
|
||
the basic block. Assert the use reference is not artificial and that
|
||
it has an associated insn.
|
||
|
||
2018-04-04 Michael Matz <matz@suse.de>
|
||
|
||
* builtins.c (compute_objsize): Pass correct operand
|
||
to array_at_struct_end_p.
|
||
|
||
2018-04-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR lto/85176
|
||
* dwarf2out.c (dwarf2out_register_external_die): Peel namespaces
|
||
from contexts for DINFO_LEVEL_TERSE and below.
|
||
|
||
2018-04-04 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/nds32-doubleword.md (move_<mode>): Require
|
||
resiter_operand condition.
|
||
* config/nds32/nds32.md (*move<mode>): Ditto.
|
||
|
||
2018-04-04 Kito Cheng <kito.cheng@gmail.com>
|
||
Monk Chiang <sh.chiang04@gmail.com>
|
||
|
||
* config/nds32/nds32.md (movmisalign<mode>): New pattern.
|
||
|
||
2018-04-04 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (movqi, movhi): Merge into mov<mode>.
|
||
|
||
2018-04-04 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/nds32-md-auxiliary.c (nds32_inverse_cond_code,
|
||
nds32_cond_code_str, output_cond_branch,
|
||
output_cond_branch_compare_zero, nds32_expand_cbranch,
|
||
nds32_expand_cstore, nds32_expand_movcc,
|
||
nds32_output_cbranchsi4_equality_zero,
|
||
nds32_output_cbranchsi4_equality_reg,
|
||
nds32_output_cbranchsi4_equality_reg_or_const_int,
|
||
nds32_output_cbranchsi4_greater_less_zero: New functions.
|
||
* config/nds32/nds32-protos.h (nds32_expand_cbranch,
|
||
nds32_expand_cstore, nds32_expand_movcc,
|
||
nds32_output_cbranchsi4_equality_zero,
|
||
nds32_output_cbranchsi4_equality_reg,
|
||
nds32_output_cbranchsi4_equality_reg_or_const_int,
|
||
nds32_output_cbranchsi4_greater_less_zero): Declare.
|
||
* config/nds32/predicates.md (nds32_movecc_comparison_operator,
|
||
nds32_rimm11s_operand): New predicates.
|
||
* config/nds32/nds32.h (nds32_expand_result_type): New enum type.
|
||
* config/nds32/nds32.md: Rewrite all the branch and conditional move
|
||
patterns.
|
||
|
||
2018-04-04 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/nds32-doubleword.md: Refine all the instruction type.
|
||
* config/nds32/nds32.md: Ditto.
|
||
* config/nds32/pipelines.md: Ditto.
|
||
|
||
2018-04-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/85168
|
||
* tree-ssa-sccvn.c (vn_reference_maybe_forwprop_address): Avoid
|
||
propagating abnormals.
|
||
|
||
2018-04-04 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (enabled): Use yes/no for this attribute.
|
||
|
||
2018-04-04 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/nds32-md-auxiliary.c (nds32_long_call_p): New function.
|
||
* config/nds32/nds32-protos.h (nds32_long_call_p): Declare.
|
||
* config/nds32/nds32.c (nds32_function_ok_for_sibcall): New function.
|
||
(TARGET_FUNCTION_OK_FOR_SIBCALL): Define.
|
||
* config/nds32/nds32.md (sibcall_internal): New.
|
||
(sibcall_register): Remove.
|
||
(sibcall_immediate): Remove.
|
||
(sibcall_value_internal): New.
|
||
(sibcall_value_register): Remove.
|
||
(sibcall_value_immediate): Remove.
|
||
* config/nds32/predicates.md (nds32_general_register_operand): New.
|
||
(nds32_call_address_operand): New.
|
||
|
||
2018-04-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/85167
|
||
* shrink-wrap.c (move_insn_for_shrink_wrap): Don't set bb_uses and
|
||
bb_defs if *split_p, instead preinitialize it to NULL.
|
||
|
||
PR tree-optimization/85156
|
||
* builtins.c (fold_builtin_expect): Use save_expr on arg1 to avoid
|
||
evaluating the argument multiple times.
|
||
|
||
2018-04-03 Bill Schmidt <wschmidt@linux.ibm.com>
|
||
|
||
* config/rs6000/emmintrin.h (_mm_cvtpd_epi32): Use __vector rather
|
||
than vector.
|
||
(_mm_cvtpd_ps): Likewise.
|
||
(_mm_cvttpd_epi32): Likewise.
|
||
* config/rs6000/mmintrin.h (_mm_unpacklo_pi8): Likewise.
|
||
* config/rs6000/xmmintrin.h: For strict-ANSI C++ or C11, undefine
|
||
vector, pixel, and bool following altivec.h include.
|
||
|
||
2018-04-03 Martin Sebor <msebor@redhat.com>
|
||
|
||
* doc/extend.texi (Common Function Attributes): Clarify.
|
||
(const attribute): Likewise.
|
||
(pure attribute): Likewise.
|
||
|
||
2018-04-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/85169
|
||
* config/i386/i386.c (ix86_expand_vector_set): Use
|
||
HOST_WIDE_INT_1U << elt instead of 1 << elt. Formatting fix.
|
||
|
||
2018-04-03 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.c (emit_i387_cw_initialization): Always use logic
|
||
instructions when changing rounding bits to preserve precision bits
|
||
in the x87 control word.
|
||
|
||
2018-04-03 Martin Liska <mliska@suse.cz>
|
||
|
||
PR tree-optimization/82491
|
||
* rtl.h (strip_offset_and_add): Replace += suboffset with
|
||
poly_uint64 () + suboffset.
|
||
|
||
2018-03-29 Martin Liska <mliska@suse.cz>
|
||
Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR ipa/84947
|
||
* ipa-cp.c (propagate_bits_across_jump_function): Bail out if
|
||
param_type is not an integral or pointer type.
|
||
|
||
2018-04-03 Richard Biener <rguenther@suse.de>
|
||
|
||
* sese.h (recompute_all_dominators): Remove.
|
||
|
||
2018-04-02 Martin Sebor <msebor@redhat.com>
|
||
|
||
* doc/invoke.texi (-Wrestrict): Fix typos.
|
||
|
||
2018-04-02 Jim Wilson <jimw@sifive.com>
|
||
|
||
* config/riscv/riscv.h (SHIFT_COUNT_TRUNCATED): Set to zero.
|
||
* config/riscv/riscv.md (<optab>si3): Use QImode shift count.
|
||
(<optab>di3, <optab>si3_extend): Likewise.
|
||
(<optab>si3_mask, <optab>si3_mask_1): New.
|
||
(<optab>di3_mask, <optab>di3_mask_1): New.
|
||
(<optab>si3_extend_mask, <optab>si3_extend_mask_1): New.
|
||
(lshrsi3_zero_extend_1): Use VOIDmode shift count.
|
||
* config/riscv/sync.md (atomic_test_and_set): Emit QImode shift count.
|
||
|
||
2018-04-02 Gerald Pfeifer <gerald@pfeifer.com>
|
||
|
||
* doc/cpp.texi (Variadic Macros): Fix line continuation in an
|
||
example.
|
||
|
||
2018-04-02 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (TARGET_CANONICALIZE_COMPARISON): Define.
|
||
(nds32_canonicalize_comparison): New function.
|
||
|
||
2018-04-01 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
Kuan-Lin Chen <kuanlinchentw@gmail.com>
|
||
|
||
* config.gcc (nds32): Add nds32-relax-opt.o into extra_objs.
|
||
* config/nds32/constants.md (unspec_volatile_element): Add
|
||
UNSPEC_VOLATILE_RELAX_GROUP.
|
||
* config/nds32/nds32-relax-opt.c: New file.
|
||
* config/nds32/nds32-predicates.c
|
||
(nds32_symbol_load_store_p): New function.
|
||
* config/nds32/nds32-protos.h
|
||
(nds32_symbol_load_store_p): Declare function.
|
||
(make_pass_nds32_relax_opt): Declare new rtl pass function.
|
||
* config/nds32/nds32.c
|
||
(nds32_register_pass): New function to register pass.
|
||
(nds32_register_passes): New function to register passes.
|
||
* config/nds32/nds32.md (relax_group): New pattern.
|
||
* config/nds32/nds32.opt (mrelax-hint): New option.
|
||
* config/nds32/t-nds32 (nds32-relax-opt.o): New dependency.
|
||
|
||
2018-04-01 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/t-nds32: Modify files dependency.
|
||
|
||
2018-04-01 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.h (FUNCTION_PROFILER): Output newline character.
|
||
(PROFILE_HOOK): Define its implementation.
|
||
|
||
2018-04-01 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.h (WCHAR_TYPE, WCHAR_TYPE_SIZE): Use unsigned int
|
||
type and 32-bit size.
|
||
|
||
2018-04-01 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/85090
|
||
* config/i386/sse.md (V): Add V64QI and V32HI for TARGET_AVX512F.
|
||
(V_128_256): New mode iterator.
|
||
(*avx512dq_vextract<shuffletype>64x2_1 splitter): New define_split.
|
||
(*avx512f_vextract<shuffletype>32x4_1 splitter): Likewise.
|
||
(xop_pcmov_<mode><avxsizesuffix>): Use V_128_256 mode iterator instead
|
||
of V.
|
||
* config/i386/i386.c (ix86_expand_vector_set): Improve V32HImode and
|
||
V64QImode expansion for !TARGET_AVX512BW && TARGET_AVX512F.
|
||
|
||
2018-03-31 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR target/83315
|
||
* config/rs6000/xmmintrin.h (_mm_set_ps, _mm_max_ps): Handle (quiet)
|
||
NaN inputs correctly.
|
||
|
||
2018-03-30 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/80546
|
||
* config/rs6000/vsx.md (??r): New mode attribute.
|
||
(*vsx_mov<mode>_64bit): Use it.
|
||
(*vsx_mov<mode>_32bit): Likewise.
|
||
|
||
2018-03-30 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/84818
|
||
* builtins.c (check_access): Use warning_n.
|
||
|
||
2018-03-30 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
|
||
|
||
PR target/83822
|
||
* config/rs6000/rs6000-string.c (expand_compare_loop): Fix redundant
|
||
condition.
|
||
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Fix redundant
|
||
condition.
|
||
|
||
2018-03-30 Julia Koval <julia.koval@intel.com>
|
||
|
||
PR target/84413
|
||
* x86-tune.def (movx, partial_reg_dependency): Enable for
|
||
m_SKYLAKE_AVX512.
|
||
|
||
2018-03-29 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR inline-asm/84985
|
||
* lra-constraints.c (process_alt_operands): Move setting
|
||
this_alternative_matches below.
|
||
|
||
2018-03-29 Martin Liska <mliska@suse.cz>
|
||
|
||
PR lto/84995.
|
||
* doc/invoke.texi: Document how LTO works with debug info.
|
||
Describe auto-load support of binutils. Mention 'x86-64'
|
||
as valid option value of -march option.
|
||
|
||
2018-03-29 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* config/i386/sse.md (<avx512>_blendm<mode>): Use <sseintprefix>.
|
||
|
||
PR c/85094
|
||
* fold-const.c (operand_equal_p): Handle DEBUG_BEGIN_STMT.
|
||
For STATEMENT_LIST, pass down OEP_LEXICOGRAPHIC and maybe
|
||
OEP_NO_HASH_CHECK for recursive call, to avoid exponential
|
||
checking.
|
||
|
||
2018-03-28 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/84912
|
||
* config/rs6000/rs6000.h (RS6000_BTM_POWERPC64): New define.
|
||
(RS6000_BTM_COMMON): Add RS6000_BTM_POWERPC64.
|
||
* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add support
|
||
for RS6000_BTM_POWERPC64.
|
||
(rs6000_invalid_builtin): Add handling for RS6000_BTM_POWERPC64
|
||
(rs6000_builtin_mask_names): Add RS6000_BTM_POWERPC64.
|
||
* config/rs6000/rs6000-builtin.def (BU_P7_POWERPC64_MISC_2): New macro
|
||
definition.
|
||
(DIVDE): Use it.
|
||
(DIVDEU): Likewise.
|
||
|
||
2018-03-28 Carl Love <cel@us.ibm.com>
|
||
|
||
Revert
|
||
2017-09-27 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/rs6000-builtin.def (BU_FP_1MISC_1): Add define macro.
|
||
(FCTID, FCTIW): Add BU_FP_MISC_1 macro expansion for builtins.
|
||
* config/rs6000/rs6000.md (lrintsfsi2): Add define_insn for the
|
||
fctiw instruction.
|
||
|
||
2018-03-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/xmmintrin.h (_mm_max_pi16): Use __vector __bool
|
||
instead of __vector bool.
|
||
(_mm_max_pu8): Likewise.
|
||
(_mm_min_pi16): Likewise.
|
||
|
||
2018-03-28 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/84912
|
||
* config/rs6000/rs6000-builtin.def (DIVWEO): Delete macro expansion.
|
||
(DIVWEUO): Likewise.
|
||
(DIVDEO): Likewise.
|
||
(DIVDEUO): Likewise.
|
||
* config/rs6000/rs6000.c (builtin_function_type): Remove support for
|
||
DIVWEUO and DIVDEUO.
|
||
* config/rs6000/rs6000.md (UNSPEC_DIVEO, UNSPEC_DIVEUO): Delete unspecs.
|
||
(UNSPEC_DIV_EXTEND): Remove deleted unspecs.
|
||
(div_extend): Likewise.
|
||
* doc/extend.texi (__builtin_divweo): Remove documentation for deleted
|
||
builtin function.
|
||
(__builtin_divweuo): Likewise.
|
||
(__builtin_divdeo): Likewise.
|
||
(__builtin_divdeuo): Likewise.
|
||
|
||
2018-03-28 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/85095
|
||
* config/i386/i386.md (*add<mode>3_carry_0, *addsi3_carry_zext_0,
|
||
*sub<mode>3_carry_0, *subsi3_carry_zext_0): New patterns.
|
||
|
||
PR tree-optimization/82004
|
||
* gimple-match-head.c (optimize_pow_to_exp): New function.
|
||
* match.pd (pow(C,x) -> exp(log(C)*x)): Wrap with #if GIMPLE.
|
||
Don't fold to exp if optimize_pow_to_exp is false.
|
||
|
||
2018-03-28 Martin Liska <mliska@suse.cz>
|
||
|
||
PR other/84819
|
||
* calls.c (initialize_argument_information): Fix trailing space.
|
||
* common.opt: Fix typo and provide better explanation for
|
||
-fsanitize-coverage option.
|
||
* config/i386/i386.opt: Fix typo.
|
||
|
||
2018-03-28 Jakub Jelinek <jakub@redhat.com>
|
||
Martin Liska <mliska@suse.cz>
|
||
|
||
PR sanitizer/85081
|
||
* gimplify.c (asan_poison_variable): Don't do the check for
|
||
gimplify_omp_ctxp here.
|
||
(gimplify_decl_expr): Do it here.
|
||
(gimplify_target_expr): Likewise.
|
||
|
||
2018-03-28 Martin Liska <mliska@suse.cz>
|
||
|
||
PR target/84988
|
||
* config/i386/i386.c (ix86_function_arg_advance): Do not call
|
||
chkp_type_bounds_count if MPX is not enabled.
|
||
|
||
2018-03-27 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.h (BRANCH_COST): Adjust cost.
|
||
|
||
2018-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
PR target/84914
|
||
* config/rs6000/rs6000.c (create_complex_muldiv): New helper
|
||
function to create the function decl for complex long double
|
||
multiply and divide for -mabi=ieeelongdouble.
|
||
(init_float128_ieee): Call it.
|
||
|
||
2018-03-27 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85044
|
||
* config/i386/i386.c (ix86_trampoline_init): Insert ENDBR for
|
||
-fcf-protection=branch -mibt.
|
||
* config/i386/i386.h (TRAMPOLINE_SIZE): Increased by 4 bytes.
|
||
|
||
2018-03-27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
||
|
||
PR target/81863
|
||
* config/arm/arm.c (arm_valid_symbolic_address): Handle arm_word_relocations
|
||
|
||
2018-03-27 Cesar Philippidis <cesar@codesourcery.com>
|
||
|
||
PR target/85056
|
||
* config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Add '[]' to
|
||
extern array declarations.
|
||
|
||
2018-03-27 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/84067
|
||
* match.pd ((A * C) +- (B * C) -> (A+-B) * C): Guard with
|
||
explicit single_use checks.
|
||
|
||
2018-03-27 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/85082
|
||
* tree-ssa-sccvn.c (vn_reference_lookup_or_insert_for_pieces):
|
||
Valueize the VUSE.
|
||
|
||
2018-03-27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
||
|
||
* config.gcc (aarch64*-*-linux*): New TARGET_DEFAULT_ASYNC_UNWIND_TABLES
|
||
* common/config/aarch64/aarch64-common.c (aarch64_optimization_table[]):
|
||
Turn on fasynchronous-unwind-tables and funwind-tables.
|
||
|
||
2018-03-26 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/85073
|
||
* config/i386/i386.md (*bmi_blsr_<mode>_cmp): New insn pattern.
|
||
(*bmi_blsr_<mode>_ccz): Ditto.
|
||
|
||
2018-03-26 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR tree-optimization/85063
|
||
* omp-general.c (offloading_function_p): New function. Factor out
|
||
of ...
|
||
* omp-offload.c (pass_omp_target_link::gate): ... here.
|
||
* omp-general.h (offloading_function_p): Declare.
|
||
* tree-switch-conversion.c (build_one_array): Mark CSWTCH.x variable
|
||
with attribute omp declare target for offloading functions.
|
||
|
||
2018-03-24 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/84005
|
||
* tree-data-ref.h (get_base_for_alignment): Declare.
|
||
* tree-data-ref.c (get_base_for_alignment_1): New function.
|
||
(get_base_for_alignment): Likewise.
|
||
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
|
||
get_base_for_alignment to find a suitable base object, instead
|
||
of always using drb->base_address.
|
||
|
||
2018-03-23 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR inline-asm/85022
|
||
* emit-rtl.c (init_emit_regs): Indicate that VOIDmode MEMs don't have
|
||
known size by default.
|
||
|
||
2018-03-23 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR inline-asm/85030
|
||
* lra-constraints.c (process_alt_operands): Don't match BLKmode
|
||
and non BLKmode operands.
|
||
|
||
2018-03-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
PR target/85026
|
||
* config/arm/arm.md (unaligned_loadhis): Remove first alternative.
|
||
Clean up attributes.
|
||
|
||
2018-03-23 Richard Biener <rguenther@suse.de>
|
||
|
||
PR debug/85020
|
||
* dwarf2out.c (rtl_for_decl_location): Do not generate RTL early when
|
||
we are going to emit early debug for LTO.
|
||
|
||
2018-03-23 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR inline-asm/85034
|
||
* function.c (match_asm_constraints_1): Don't optimize if input
|
||
doesn't satisfy general_operand predicate for output's mode.
|
||
|
||
PR inline-asm/85022
|
||
* alias.c (write_dependence_p): Don't require for x_canonicalized
|
||
non-VOIDmode if x has VOIDmode.
|
||
|
||
PR sanitizer/85029
|
||
* sanopt.c (maybe_optimize_ubsan_ptr_ifn): If DECL_REGISTER (base),
|
||
just don't try to optimize it rather than assert it never happens.
|
||
|
||
2018-03-22 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||
|
||
* config/rs6000/rs6000-builtin.def: Remove various BU_ALTIVEC_X
|
||
macro expansions for definition of ST_INTERNAL_<mode> and
|
||
LD_INTERNAL_<mode> builtins.
|
||
* config/rs6000/rs6000-protos.h (rs6000_address_for_altivec):
|
||
Remove prototype.
|
||
* config/rs6000/rs6000.c (altivec_expand_ld_builtin): Delete this
|
||
function.
|
||
(altivec_expand_st_builtin): Likewise.
|
||
(altivec_expand_builtin): Remove calls to deleted functions.
|
||
(rs6000_address_for_altivec): Delete this function.
|
||
* config/rs6000/vector.md: Remove expands for
|
||
vector_altivec_load_<mode> and vector_altivec_store_<mode>.
|
||
|
||
2018-03-22 Sudakshina Das <sudi.das@arm.com>
|
||
|
||
PR target/84826
|
||
* config/arm/arm.h (machine_function): Add static_chain_stack_bytes.
|
||
* config/arm/arm.c (arm_compute_static_chain_stack_bytes): Avoid
|
||
re-computing once computed.
|
||
(arm_expand_prologue): Compute machine->static_chain_stack_bytes.
|
||
(arm_init_machine_status): Initialize
|
||
machine->static_chain_stack_bytes.
|
||
|
||
2018-03-22 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||
|
||
PR target/84760
|
||
* doc/extend.texi: Add four new prototypes for vec_ld.
|
||
* config/rs6000/rs6000-builtin.def (LVX_V1TI): Reorder symbol
|
||
definitions for more logical presentation.
|
||
* config/rs6000/rs6000-c.c: (altivec_overloaded_builtins): Add
|
||
entries for V1TI variants of __builtin_altivec_ld builtin.
|
||
* config/rs6000/rs6000.c: (altivec_expand_lv_builtin): Add test and
|
||
handling of V1TI variant of LVX icode pattern.
|
||
(altivec_expand_builtin): Add case for ALTIVEC_BUILTIN_LVX_V1TI.
|
||
(rs6000_gimple_fold_builtin): Likewise.
|
||
(altivec_init_builtins): Add code to define
|
||
__builtin_altivec_lvx_v1ti function.
|
||
|
||
2018-03-22 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR inline-asm/84941
|
||
* function.c (match_asm_constraints_1): Don't do the optimization
|
||
if input isn't a REG, SUBREG, MEM or constant.
|
||
|
||
2018-03-22 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR tree-optimization/84956
|
||
* tree-ssa-tail-merge.c (find_clusters_1): Skip bbs with
|
||
bb_has_abnormal_pred.
|
||
|
||
2018-03-22 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR sanitizer/85018
|
||
* dwarf2asm.c (dw2_output_indirect_constant_1): Set
|
||
DECL_INITIAL (decl) to decl at the end.
|
||
* varasm.c (use_blocks_for_decl_p): Revert the 2018-03-20 change,
|
||
adjust the comment.
|
||
|
||
2018-03-21 Joseph Myers <joseph@codesourcery.com>
|
||
|
||
* doc/extend.texi (__builtin_tgmath): Document when complex
|
||
integer types are treated as _Complex _Float64.
|
||
|
||
2018-03-21 Tom de Vries <tom@codesourcery.com>
|
||
|
||
* doc/extend.texi (__builtin_extend_pointer): Remove pasto.
|
||
|
||
2018-03-21 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/84960
|
||
* tree-cfg.c (remove_bb): Don't move forced labels into bb->prev_bb
|
||
if it is ENTRY block, move them into single succ of ENTRY in that case.
|
||
|
||
2018-03-21 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/84811
|
||
* poly-int.h (poly_span_traits): Remove the T3 parameter and
|
||
promote HOST_WIDE_INT T2 - T1 results to unsigned HOST_WIDE_INT.
|
||
(maybe_in_range_p, known_in_range_p, ranges_known_overlap_p):
|
||
(known_subrange_p): Update accordingly. Cast each value involved
|
||
in the size comparison, rather than casting the result of the
|
||
subtraction.
|
||
|
||
2018-03-21 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/84982
|
||
* gimple-ssa-store-merging.c (invert_op): Handle boolean inversion
|
||
by flipping the least significant bit rather than all bits from
|
||
bitpos to bitpos + bitsize - 1.
|
||
|
||
2018-03-21 Nathan Sidwell <nathan@acm.org>
|
||
|
||
* doc/extend.texi (Deprecated Features): Remove mention of
|
||
long-deleted deprecations.
|
||
|
||
2018-03-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
|
||
|
||
PR jit/84288
|
||
* configure.ac (gcc_cv_ld_soname) <*-*-solaris2*>: Set.
|
||
* configure: Regenerate.
|
||
|
||
2018-03-21 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR tree-optimization/83126
|
||
* tree-parloops.c (num_phis): New function.
|
||
(gen_parallel_loop): Detect and handle canonicalize_loop_ivs failure.
|
||
|
||
2018-03-21 Nathan Sidwell <nathan@acm.org>
|
||
|
||
* doc/extend.texi (Deprecated Features): Update deprecated flags,
|
||
mention anon-struct/union members and trailing attributes.
|
||
|
||
2018-03-21 Bin Cheng <bin.cheng@arm.com>
|
||
|
||
PR tree-optimization/84969
|
||
* tree-loop-distribution.c (fuse_memset_builtins): Don't reorder
|
||
builtin memset partitions if they set different rhs values.
|
||
|
||
2018-03-21 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/84989
|
||
* simplify-rtx.c (simplify_unary_operation_1): Don't try to simplify
|
||
VEC_DUPLICATE with scalar result mode.
|
||
|
||
2018-03-21 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/84963
|
||
* ipa-icf.c (sem_item_optimizer::fixup_points_to_sets): Remove
|
||
not intended return statement.
|
||
|
||
2018-03-21 Martin Liska <mliska@suse.cz>
|
||
|
||
PR target/84988
|
||
* tree-chkp.c (CHKP_ARRAY_MAX_CHECK_STEPS): Define a new macro.
|
||
(chkp_find_bound_slots_1): Limit number of iterations.
|
||
|
||
2018-03-20 David H. Gutteridge <dhgutteridge@sympatico.ca>
|
||
|
||
PR target/84838
|
||
* Minor grammar fixes for x86 options.
|
||
|
||
2018-03-20 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/84875
|
||
* dce.c (delete_unmarked_insns): Don't remove frame related noop moves
|
||
holding REG_CFA_RESTORE notes, instead turn them into a USE.
|
||
|
||
2018-03-20 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/83789
|
||
* config/rs6000/altivec.md (altivec_lvx_<mode>_2op): Delete define_insn.
|
||
(altivec_lvx_<mode>_1op): Likewise.
|
||
(altivec_stvx_<mode>_2op): Likewise.
|
||
(altivec_stvx_<mode>_1op): Likewise.
|
||
(altivec_lvx_<VM2:mode>): New define_expand.
|
||
(altivec_stvx_<VM2:mode>): Likewise.
|
||
(altivec_lvx_<VM2:mode>_2op_<P:mptrsize>): New define_insn.
|
||
(altivec_lvx_<VM2:mode>_1op_<P:mptrsize>): Likewise.
|
||
(altivec_stvx_<VM2:mode>_2op_<P:mptrsize>): Likewise.
|
||
(altivec_stvx_<VM2:mode>_1op_<P:mptrsize>): Likewise.
|
||
* config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Use new expanders.
|
||
(rs6000_gen_lvx): Likewise.
|
||
* config/rs6000/rs6000.c (altivec_expand_lv_builtin): Likewise.
|
||
(altivec_expand_stv_builtin): Likewise.
|
||
(altivec_expand_builtin): Likewise.
|
||
* config/rs6000/vector.md: Likewise.
|
||
|
||
2018-03-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
PR target/82518
|
||
* config/arm/arm.c (arm_array_mode_supported_p): Return false for
|
||
BYTES_BIG_ENDIAN.
|
||
|
||
2018-03-20 Richard Biener <rguenther@suse.de>
|
||
|
||
PR target/84986
|
||
* config/i386/i386.c (ix86_add_stmt_cost): Only cost
|
||
sign-conversions as zero, fall back to standard scalar_stmt
|
||
cost for the rest.
|
||
|
||
2018-03-20 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/84825
|
||
* predict.c (rebuild_frequencies): Handle case when we have
|
||
PROFILE_ABSENT, but flag_guess_branch_prob is false.
|
||
|
||
2018-03-20 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84990
|
||
* dwarf2asm.c (dw2_output_indirect_constant_1): Temporarily turn off
|
||
flag_section_anchors.
|
||
* varasm.c (use_blocks_for_decl_p): Remove hack for
|
||
dw2_force_const_mem.
|
||
|
||
PR target/84845
|
||
* config/aarch64/aarch64.md (*aarch64_reg_<mode>3_neg_mask2): Rename
|
||
to ...
|
||
(*aarch64_<optab>_reg_<mode>3_neg_mask2): ... this. If pseudos can't
|
||
be created, use lowpart_subreg of operands[0] rather than operands[0]
|
||
itself.
|
||
(*aarch64_reg_<mode>3_minus_mask): Rename to ...
|
||
(*aarch64_ashl_reg_<mode>3_minus_mask): ... this.
|
||
(*aarch64_<optab>_reg_di3_mask2): Use const_int_operand predicate
|
||
and n constraint instead of aarch64_shift_imm_di and Usd.
|
||
(*aarch64_reg_<optab>_minus<mode>3): Rename to ...
|
||
(*aarch64_<optab>_reg_minus<mode>3): ... this.
|
||
|
||
2018-03-20 Sudakshina Das <sudi.das@arm.com>
|
||
|
||
PR target/82989
|
||
* config/arm/neon.md (ashldi3_neon): Update ?s for constraints
|
||
to favor GPR over NEON registers.
|
||
(<shift>di3_neon): Likewise.
|
||
|
||
2018-03-20 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/84952
|
||
* config/nvptx/nvptx.c (nvptx_single): Don't neuter bar.sync.
|
||
(nvptx_process_pars): Emit bar.sync asap and alap.
|
||
|
||
2018-03-20 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/84954
|
||
* config/nvptx/nvptx.c (prevent_branch_around_nothing): Also update
|
||
seen_label if seen_label is already set.
|
||
|
||
2018-03-20 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84945
|
||
* config/i386/i386.c (fold_builtin_cpu): For features above 31
|
||
use __cpu_features2 variable instead of __cpu_model.__cpu_features[0].
|
||
Use 1U instead of 1. Formatting fixes.
|
||
|
||
PR c/84953
|
||
* builtins.c (fold_builtin_strpbrk): For strpbrk(x, "") use type
|
||
instead of TREE_TYPE (s1) for the return value.
|
||
|
||
2018-03-19 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/84946
|
||
* gimple-ssa-store-merging.c (mem_valid_for_store_merging): Compute
|
||
bitsize + bitsize in poly_uint64 rather than poly_int64.
|
||
|
||
PR sanitizer/78651
|
||
* dwarf2asm.c: Include fold-const.c.
|
||
(dw2_output_indirect_constant_1): Set DECL_INITIAL (decl) to ADDR_EXPR
|
||
of decl rather than decl itself.
|
||
|
||
PR rtl-optimization/84643
|
||
* memmodel.h (enum memmodel): Add MEMMODEL_MAX enumerator.
|
||
|
||
2018-03-19 Maxim Ostapenko <m.ostapenko@samsung.com>
|
||
|
||
PR sanitizer/78651
|
||
* dwarf2asm.c (dw2_output_indirect_constant_1): Disable ASan before
|
||
calling assemble_variable.
|
||
|
||
2018-03-19 Sudakshina Das <sudi.das@arm.com>
|
||
|
||
PR target/81647
|
||
* config/aarch64/aarch64-simd.md (vec_cmp<mode><v_int_equiv>): Modify
|
||
instructions for UNLT, UNLE, UNGT, UNGE, UNEQ, UNORDERED and ORDERED.
|
||
|
||
2018-03-19 Jim Wilson <jimw@sifive.com>
|
||
|
||
PR bootstrap/84856
|
||
* config/riscv/riscv.c (riscv_function_arg_boundary): Use
|
||
PREFERRED_STACK_BOUNDARY instead of STACK_BOUNDARY.
|
||
(riscv_first_stack_step): Likewise.
|
||
(riscv_option_override): Use STACK_BOUNDARY instead of
|
||
MIN_STACK_BOUNDARY.
|
||
* config/riscv/riscv.h (STACK_BOUNDARY): Renamed from
|
||
MIN_STACK_BOUNDARY.
|
||
(BIGGEST_ALIGNMENT): Set to 128.
|
||
(PREFERRED_STACK_BOUNDARY): Renamed from STACK_BOUNDARY.
|
||
(RISCV_STACK_ALIGN): Use PREFERRED_STACK_BOUNDARY instead of
|
||
STACK_BOUNDARY.
|
||
|
||
2018-03-19 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84933
|
||
* tree-vrp.c (set_and_canonicalize_value_range): Treat out-of-bound
|
||
values as -INF/INF when canonicalizing an ANTI_RANGE to a RANGE.
|
||
|
||
2018-03-19 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84859
|
||
* tree-ssa-phiopt.c (single_trailing_store_in_bb): New function.
|
||
(cond_if_else_store_replacement): Perform sinking operation on
|
||
single-store BBs regardless of MAX_STORES_TO_SINK setting.
|
||
Generalize what a BB with a single eligible store is.
|
||
|
||
2018-03-19 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84929
|
||
* tree-data-ref.c (analyze_siv_subscript_cst_affine): Guard
|
||
chrec_is_positive against non-chrec arg.
|
||
|
||
2018-03-19 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR target/84711
|
||
* config/arm/arm.c (arm_can_change_mode_class): revert r258554.
|
||
|
||
2018-03-18 Martin Liska <mliska@suse.cz>
|
||
|
||
PR rtl-optimization/84635
|
||
* regrename.c (build_def_use): Use matches_mode only when
|
||
matches >= 0.
|
||
|
||
2018-03-18 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/84913
|
||
* tree-vect-loop.c (vectorizable_reduction): Don't try to
|
||
vectorize chains of COND_EXPRs.
|
||
|
||
2018-03-18 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.h (MAX_REGS_PER_ADDRESS): Fix the value.
|
||
|
||
2018-03-18 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define.
|
||
|
||
2018-03-18 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
|
||
|
||
2018-03-17 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/nds32-protos.h (nds32_adjust_reg_alloc_order): Declare.
|
||
* config/nds32/nds32.c (nds32_reg_alloc_order_for_speed): New array.
|
||
(nds32_adjust_reg_alloc_order): New function.
|
||
* config/nds32/nds32.h (ADJUST_REG_ALLOC_ORDER): Define.
|
||
|
||
2018-03-17 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_asm_output_mi_thunk,
|
||
nds32_print_operand, nds32_print_operand_address): Use
|
||
HOST_WIDE_INT_PRINT_DEC instead.
|
||
|
||
2018-03-17 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_register_priority): Modify cost.
|
||
|
||
2018-03-17 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84902
|
||
* config/i386/i386.c (initial_ix86_tune_features,
|
||
initial_ix86_arch_features): Use unsigned HOST_WIDE_INT rather than
|
||
unsigned long long.
|
||
(set_ix86_tune_features): Change ix86_tune_mask from unsigned int
|
||
to unsigned HOST_WIDE_INT, initialize to HOST_WIDE_INT_1U << ix86_tune
|
||
rather than 1u << ix86_tune. Formatting fix.
|
||
(ix86_option_override_internal): Change ix86_arch_mask from
|
||
unsigned int to unsigned HOST_WIDE_INT, initialize to
|
||
HOST_WIDE_INT_1U << ix86_arch rather than 1u << ix86_arch.
|
||
(ix86_function_specific_restore): Likewise.
|
||
|
||
2018-03-16 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84899
|
||
* postreload.c (reload_combine_recognize_pattern): Perform
|
||
INTVAL addition in unsigned HOST_WIDE_INT type to avoid UB and
|
||
truncate_int_for_mode the result for the destination's mode.
|
||
|
||
PR c/84909
|
||
* hsa-gen.c (mem_type_for_type): Fix comment typo.
|
||
* tree-vect-loop-manip.c (vect_create_cond_for_niters_checks):
|
||
Likewise.
|
||
* gimple-ssa-warn-restrict.c (builtin_memref::set_base_and_offset):
|
||
Likewise.
|
||
|
||
2018-03-16 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/84876
|
||
* lra-assigns.c (lra_split_hard_reg_for): Don't use
|
||
regno_allocno_class_array and sorted_pseudos.
|
||
* lra-constraints.c (spill_hard_reg_in_range): Ignore hard regs in
|
||
insns where regno is used.
|
||
|
||
2018-03-16 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/84833
|
||
* multiple_target.c (create_dispatcher_calls): Redirect
|
||
reference in the symbol table.
|
||
|
||
2018-03-16 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/84722
|
||
* multiple_target.c (create_dispatcher_calls): Redirect also
|
||
an alias.
|
||
|
||
2018-03-16 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c++/79937
|
||
PR c++/82410
|
||
* tree.h (TARGET_EXPR_NO_ELIDE): Define.
|
||
* gimplify.c (gimplify_modify_expr_rhs): Don't elide TARGET_EXPRs with
|
||
TARGET_EXPR_NO_ELIDE flag set unless *expr_p is INIT_EXPR.
|
||
|
||
2018-03-16 Julia Koval <julia.koval@intel.com>
|
||
|
||
* doc/invoke.texi (Skylake Server): Add CLWB.
|
||
Cannonlake): Remove CLWB.
|
||
|
||
2018-03-16 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/84841
|
||
* tree-ssa-reassoc.c (INTEGER_CONST_TYPE): Change to 1 << 4 from
|
||
1 << 3.
|
||
(FLOAT_ONE_CONST_TYPE): Define.
|
||
(constant_type): Return FLOAT_ONE_CONST_TYPE for -1.0 and 1.0.
|
||
(sort_by_operand_rank): Put entries with higher constant_type last
|
||
rather than first to match comments.
|
||
|
||
2018-03-15 Sandra Loosemore <sandra@codesourcery.com>
|
||
|
||
* config/nios2/nios2.md (movsi_internal): Fix thinko in
|
||
split predicate.
|
||
|
||
2018-03-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c++/79085
|
||
* calls.c (expand_call): For TREE_ADDRESSABLE rettype ignore alignment
|
||
check and use address of target always.
|
||
|
||
2018-03-15 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/84574
|
||
* config/i386/i386.c (indirect_thunk_needed): Update comments.
|
||
(indirect_thunk_bnd_needed): Likewise.
|
||
(indirect_thunks_used): Likewise.
|
||
(indirect_thunks_bnd_used): Likewise.
|
||
(indirect_return_needed): New.
|
||
(indirect_return_bnd_needed): Likewise.
|
||
(output_indirect_thunk_function): Add a bool argument for
|
||
function return.
|
||
(output_indirect_thunk_function): Don't generate alias for
|
||
function return thunk.
|
||
(ix86_code_end): Call output_indirect_thunk_function to generate
|
||
function return thunks.
|
||
(ix86_output_function_return): Set indirect_return_bnd_needed
|
||
and indirect_return_needed instead of indirect_thunk_bnd_needed
|
||
and indirect_thunk_needed.
|
||
|
||
2018-03-15 Olga Makhotina <olga.makhotina@intel.com>
|
||
|
||
* config/i386/sgxintrin.h (_enclv_u32): New intrinsic.
|
||
(__enclv_bc, __enclv_cd, __enclv_generic): New definitions.
|
||
(ERDINFO, ETRACKC, ELDBC, ELDUC): New leaves.
|
||
|
||
2018-03-15 David Malcolm <dmalcolm@redhat.com>
|
||
Paul Hua <paul.hua.gm@gmail.com>
|
||
|
||
PR c/84852
|
||
* gcc.dg/fixits-pr84852-1.c: Fix filename in dg-regexp.
|
||
|
||
2018-03-15 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.c (abi_v4_pass_in_fpr): Add back the
|
||
TARGET_DOUBLE_FLOAT and TARGET_SINGLE_FLOAT conditions on the DFmode
|
||
resp. SFmode cases.
|
||
|
||
2018-03-15 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR target/84711
|
||
* config/arm/arm.c (arm_can_change_mode_class): Use GET_MODE_UNIT_SIZE
|
||
instead of GET_MODE_SIZE when comparing Units.
|
||
|
||
2018-03-15 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
|
||
|
||
PR target/68256
|
||
* varasm.c (hash_section): Return an unchangeble hash value
|
||
* config/aarch64/aarch64.c (aarch64_use_blocks_for_constant_p):
|
||
Return !aarch64_can_use_per_function_literal_pools_p ().
|
||
|
||
2018-03-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84860
|
||
* optabs.c (emit_conditional_move): Pass address of cmode's copy
|
||
rather than address of cmode as last argument to prepare_cmp_insn.
|
||
|
||
2018-03-15 Julia Koval <julia.koval@intel.com>
|
||
|
||
* config/i386/i386.c (F_AVX512VBMI2, F_GFNI, F_VPCLMULQDQ,
|
||
F_AVX512VNNI, F_AVX512BITALG): New.
|
||
|
||
2018-03-14 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
PR target/83451
|
||
* config/pa/pa.c (pa_emit_move_sequence): Always emit secondary reload
|
||
insn for floating-point loads and stores.
|
||
|
||
2018-03-14 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/rs6000-c.c: Add macro definitions for
|
||
ALTIVEC_BUILTIN_VEC_PERMXOR.
|
||
* config/rs6000/rs6000.h: Add #define for vec_permxor builtin.
|
||
* config/rs6000/rs6000-builtin.def: Add macro expansions for VPERMXOR.
|
||
* config/rs6000/altivec.md (altivec_vpermxor): New define expand.
|
||
* config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Add case
|
||
UNSPEC_VPERMXOR.
|
||
* config/doc/extend.texi: Add prototypes for vec_permxor.
|
||
|
||
2018-03-14 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR c/84852
|
||
* diagnostic-show-locus.c (class layout_point): Convert m_line
|
||
from int to linenum_type.
|
||
(line_span::comparator): Use linenum "compare" function when
|
||
comparing line numbers.
|
||
(test_line_span): New function.
|
||
(layout_range::contains_point): Convert param "row" from int to
|
||
linenum_type.
|
||
(layout_range::intersects_line_p): Likewise.
|
||
(layout::will_show_line_p): Likewise.
|
||
(layout::print_source_line): Likewise.
|
||
(layout::should_print_annotation_line_p): Likewise.
|
||
(layout::print_annotation_line): Likewise.
|
||
(layout::print_leading_fixits): Likewise.
|
||
(layout::annotation_line_showed_range_p): Likewise.
|
||
(struct line_corrections): Likewise for field m_row.
|
||
(line_corrections::line_corrections): Likewise for param "row".
|
||
(layout::print_trailing_fixits): Likewise.
|
||
(layout::get_state_at_point): Likewise.
|
||
(layout::get_x_bound_for_row): Likewise.
|
||
(layout::print_line): Likewise.
|
||
(diagnostic_show_locus): Likewise for locals "last_line" and
|
||
"row".
|
||
(selftest::diagnostic_show_locus_c_tests): Call test_line_span.
|
||
* input.c (selftest::test_linenum_comparisons): New function.
|
||
(selftest::input_c_tests): Call it.
|
||
* selftest.c (selftest::test_assertions): Test ASSERT_GT,
|
||
ASSERT_GT_AT, ASSERT_LT, and ASSERT_LT_AT.
|
||
* selftest.h (ASSERT_GT): New macro.
|
||
(ASSERT_GT_AT): New macro.
|
||
(ASSERT_LT): New macro.
|
||
(ASSERT_LT_AT): New macro.
|
||
|
||
2018-03-14 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR rtl-optimization/84780
|
||
* combine.c (distribute_links): Don't make a link based on pc_rtx.
|
||
|
||
2018-03-14 Martin Liska <mliska@suse.cz>
|
||
|
||
* tree.c (record_node_allocation_statistics): Use
|
||
get_stats_node_kind.
|
||
(get_stats_node_kind): New function extracted from
|
||
record_node_allocation_statistics.
|
||
(free_node): Use get_stats_node_kind.
|
||
|
||
2018-03-14 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-ssa-pre.c (compute_antic_aux): Remove code that asserts
|
||
that the value-set of ANTIC_IN doesn't grow.
|
||
|
||
Revert
|
||
* tree-ssa-pre.c (struct bb_bitmap_sets): Add visited_with_visited_succs
|
||
member.
|
||
(BB_VISITED_WITH_VISITED_SUCCS): New define.
|
||
(compute_antic): Initialize BB_VISITED_WITH_VISITED_SUCCS.
|
||
|
||
2018-03-14 Julia Koval <julia.koval@intel.com>
|
||
|
||
* config.gcc (icelake-client, icelake-server): New.
|
||
(icelake): Remove.
|
||
* config/i386/i386.c (initial_ix86_tune_features): Extend to 64 bit.
|
||
(initial_ix86_arch_features): Ditto.
|
||
(PTA_SKYLAKE): Add SGX.
|
||
(PTA_ICELAKE): Remove.
|
||
(PTA_ICELAKE_CLIENT): New.
|
||
(PTA_ICELAKE_SERVER): New.
|
||
(ix86_option_override_internal): Split up icelake on icelake client and
|
||
icelake server.
|
||
(get_builtin_code_for_version): Ditto.
|
||
(fold_builtin_cpu): Ditto.
|
||
* config/i386/driver-i386.c (config/i386/driver-i386.c): Ditto.
|
||
* config/i386/i386-c.c (ix86_target_macros_internal): Ditto
|
||
* config/i386/i386.h (processor_type): Ditto.
|
||
* doc/invoke.texi: Ditto.
|
||
|
||
2018-03-14 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR sanitizer/83392
|
||
* sanopt.c (maybe_optimize_ubsan_ptr_ifn): Handle also
|
||
INTEGER_CST offset, add it together with bitpos / 8 and
|
||
sign extend based on POINTER_SIZE.
|
||
|
||
PR target/84844
|
||
Revert
|
||
2017-04-20 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/78090
|
||
* config/i386/constraints.md (Yc): New register constraint.
|
||
* config/i386/i386.md (*float<SWI48:mode><MODEF:mode>2_mixed):
|
||
Use Yc constraint for alternative 2 of operand 0. Remove
|
||
preferred_for_speed attribute.
|
||
|
||
2018-03-14 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84830
|
||
* tree-ssa-pre.c (compute_antic_aux): Intersect the new ANTIC_IN
|
||
with the old one to avoid oscillations.
|
||
|
||
2018-03-13 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/83712
|
||
* lra-assigns.c (find_all_spills_for): Ignore uninteresting
|
||
pseudos.
|
||
(assign_by_spills): Return a flag of reload assignment failure.
|
||
Do not process the reload assignment failures. Do not spill other
|
||
reload pseudos if they has the same reg class. Update n if
|
||
necessary.
|
||
(lra_assign): Add a return arg. Set up from the result of
|
||
assign_by_spills call.
|
||
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
|
||
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
|
||
usage_insns if it is not NULL.
|
||
(spill_hard_reg_in_range): New function.
|
||
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
|
||
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
|
||
function prototypes.
|
||
(lra_assign): Change prototype.
|
||
* lra.c (lra): Add code to deal with fails by splitting hard reg
|
||
live ranges.
|
||
|
||
2018-03-01 Palmer Dabbelt <palmer@sifive.com>
|
||
|
||
* config/riscv/riscv.opt (mrelax): New option.
|
||
* config/riscv/riscv.c (riscv_file_start): Emit ".option
|
||
"norelax" when riscv_mrelax is disabled.
|
||
* doc/invoke.texi (RISC-V): Document "-mrelax" and "-mno-relax".
|
||
|
||
2018-03-13 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
|
||
|
||
PR target/84743
|
||
* config/rs6000/rs6000.c (rs6000_reassociation_width): Disable parallel
|
||
reassociation for int modes.
|
||
|
||
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks):
|
||
Reverse the choice between VEC_UNPACK_LO_EXPR and VEC_UNPACK_HI_EXPR
|
||
for big-endian.
|
||
* config/aarch64/iterators.md (hi_lanes_optab): New int attribute.
|
||
* config/aarch64/aarch64-sve.md
|
||
(*aarch64_sve_<perm_insn><perm_hilo><mode>): Rename to...
|
||
(aarch64_sve_<perm_insn><perm_hilo><mode>): ...this.
|
||
(*extend<mode><Vwide>2): Rename to...
|
||
(aarch64_sve_extend<mode><Vwide>2): ...this.
|
||
(vec_unpack<su>_<perm_hilo>_<mode>): Turn into a define_expand,
|
||
renaming the old pattern to...
|
||
(aarch64_sve_punpk<perm_hilo>_<mode>): ...this. Only define
|
||
unsigned packs.
|
||
(vec_unpack<su>_<perm_hilo>_<SVE_BHSI:mode>): Turn into a
|
||
define_expand, renaming the old pattern to...
|
||
(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): ...this.
|
||
(*vec_unpacku_<perm_hilo>_<mode>_no_convert): Delete.
|
||
(vec_unpacks_<perm_hilo>_<mode>): Take BYTES_BIG_ENDIAN into
|
||
account when deciding which SVE instruction the optab should use.
|
||
(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Likewise.
|
||
|
||
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64.md (V4_REGNUM, V8_REGNUM, V12_REGNUM)
|
||
(V20_REGNUM, V24_REGNUM, V28_REGNUM, P1_REGNUM, P2_REGNUM, P3_REGNUM)
|
||
(P4_REGNUM, P5_REGNUM, P6_REGNUM, P8_REGNUM, P9_REGNUM, P10_REGNUM)
|
||
(P11_REGNUM, P12_REGNUM, P13_REGNUM, P14_REGNUM): New define_constants.
|
||
(tlsdesc_small_<mode>): Turn a define_expand and use
|
||
tlsdesc_small_sve_<mode> for SVE. Rename original define_insn to...
|
||
(tlsdesc_small_advsimd_<mode>): ...this.
|
||
(tlsdesc_small_sve_<mode>): New pattern.
|
||
|
||
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/iterators.md (UNSPEC_SMUL_HIGHPART)
|
||
(UNSPEC_UMUL_HIGHPART): New constants.
|
||
(MUL_HIGHPART): New int iteraor.
|
||
(su): Handle UNSPEC_SMUL_HIGHPART and UNSPEC_UMUL_HIGHPART.
|
||
* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart): New
|
||
define_expand.
|
||
(*<su>mul<mode>3_highpart): New define_insn.
|
||
|
||
2018-03-13 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR lto/84805
|
||
* ipa-devirt.c (odr_subtypes_equivalent_p): Do not get the ODR type of
|
||
incomplete types.
|
||
|
||
2018-03-13 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/84658.
|
||
* (sem_item_optimizer::sem_item_optimizer): Initialize new
|
||
vector.
|
||
(sem_item_optimizer::~sem_item_optimizer): Release it.
|
||
(sem_item_optimizer::merge_classes): Register variable aliases.
|
||
(sem_item_optimizer::fixup_pt_set): New function.
|
||
(sem_item_optimizer::fixup_points_to_sets): Likewise.
|
||
* ipa-icf.h: Declare new variables and functions.
|
||
|
||
2018-03-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/84834
|
||
* match.pd ((A & C) != 0 ? D : 0): Use INTEGER_CST@2 instead of
|
||
integer_pow2p@2 and test integer_pow2p in condition.
|
||
(A < 0 ? C : 0): Similarly for @1.
|
||
|
||
PR middle-end/84831
|
||
* stmt.c (parse_output_constraint): If the CONSTRAINT_LEN (*p, p)
|
||
characters starting at p contain '\0' character, don't look beyond
|
||
that.
|
||
|
||
PR target/84827
|
||
* config/i386/i386.md (round<mode>2): For 387 fancy math, disable
|
||
pattern if -ftrapping-math -fno-fp-int-builtin-inexact.
|
||
|
||
PR target/84828
|
||
* reg-stack.c (change_stack): Change update_end var from int to
|
||
rtx_insn *, if non-NULL don't update just BB_END (current_block), but
|
||
also call set_block_for_insn on the newly added insns and rescan.
|
||
|
||
PR target/84786
|
||
* config/i386/sse.md (sse2_loadhpd): Use Yv constraint rather than v
|
||
on the last operand.
|
||
|
||
PR c++/84704
|
||
* tree.c (stabilize_reference_1): Return save_expr (e) for
|
||
STATEMENT_LIST even if it doesn't have side-effects.
|
||
|
||
2018-03-12 Jonathan Wakely <jwakely@redhat.com>
|
||
|
||
* doc/invoke.texi (-mclflushopt): Fix spelling of option.
|
||
|
||
2018-03-12 Renlin Li <renlin.li@arm.com>
|
||
|
||
* config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
|
||
aarch64_output_scalar_simd_mov_immediate.
|
||
|
||
2018-03-12 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83456
|
||
* gimple-fold.c (gimple_fold_builtin_memory_op): Avoid warning
|
||
for perfectly overlapping calls to memcpy.
|
||
(gimple_fold_builtin_memory_chk): Same.
|
||
(gimple_fold_builtin_strcpy): Handle no-warning.
|
||
(gimple_fold_builtin_stxcpy_chk): Same.
|
||
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Handle no-warning.
|
||
|
||
2018-03-12 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.c (abi_v4_pass_in_fpr): Add bool "named"
|
||
parameter. Use it for SFmode.
|
||
(rs6000_function_arg_advance_1): Adjust.
|
||
(rs6000_function_arg): Adjust.
|
||
(rs6000_gimplify_va_arg): Pass false for that new parameter.
|
||
|
||
2018-03-12 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR rtl-optimization/84169
|
||
PR rtl-optimization/84780
|
||
* combine.c (can_combine_p): Check for a 2-insn combination whether
|
||
the destination register is used between the two insns, too.
|
||
|
||
2018-03-12 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84803
|
||
* tree-if-conv.c (ifcvt_memrefs_wont_trap): Don't do anything
|
||
for refs DR analysis didn't process.
|
||
|
||
2018-03-12 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84777
|
||
* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): For
|
||
force-vectorize loops ignore whether we are optimizing for size.
|
||
|
||
2018-03-12 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_md_asm_adjust): New function.
|
||
(TARGET_MD_ASM_ADJUST): Define.
|
||
|
||
2018-03-12 Monk Chiang <sh.chiang04@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_compute_stack_frame,
|
||
nds32_emit_stack_push_multiple, nds32_emit_stack_pop_multiple,
|
||
nds32_emit_stack_v3push, nds32_emit_stack_v3pop,
|
||
nds32_emit_adjust_frame, nds32_expand_prologue, nds32_expand_epilogue,
|
||
nds32_expand_prologue_v3push, nds32_expand_epilogue_v3pop): Refine.
|
||
* config/nds32/nds32.h (NDS32_FIRST_CALLEE_SAVE_GPR_REGNUM,
|
||
NDS32_LAST_CALLEE_SAVE_GPR_REGNUM, NDS32_V3PUSH_AVAILABLE_P): New.
|
||
* config/nds32/nds32.md (prologue, epilogue): Use macro
|
||
NDS32_V3PUSH_AVAILABLE_P to do checking.
|
||
|
||
2018-03-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/58150
|
||
* dwarf2out.c (gen_enumeration_type_die): Don't guard adding
|
||
DW_AT_declaration for ENUM_IS_OPAQUE on -gdwarf-4 or -gno-strict-dwarf,
|
||
but on TYPE_SIZE. Don't do anything for ENUM_IS_OPAQUE if not creating
|
||
a new die. Don't set TREE_ASM_WRITTEN if ENUM_IS_OPAQUE. Guard
|
||
addition of most attributes on !orig_type_die or the attribute not
|
||
being present already. Assert TYPE_VALUES is NULL for ENUM_IS_OPAQUE.
|
||
|
||
2018-03-11 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.c (nds32_cpu_cpp_builtins): Modify to define
|
||
__NDS32_VH__ macro.
|
||
* config/nds32/nds32.opt (mvh): New option.
|
||
|
||
2018-03-11 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-protos.h (nds32_cpu_cpp_builtins): Declare
|
||
function.
|
||
* config/nds32/nds32.c (nds32_cpu_cpp_builtins): New function.
|
||
* config/nds32/nds32.h (TARGET_CPU_CPP_BUILTINS): Modify its
|
||
definition.
|
||
|
||
2018-03-11 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-memory-manipulation.c (nds32_expand_strlen): New
|
||
function.
|
||
* config/nds32/nds32-multiple.md (strlensi): New pattern.
|
||
* config/nds32/nds32-protos.h (nds32_expand_strlen): Declare function.
|
||
|
||
2018-03-11 Monk Chiang <sh.chiang04@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_element): Add UNSPEC_FFB,
|
||
UNSPEC_FFMISM and UNSPEC_FLMISM.
|
||
* config/nds32/nds32-intrinsic.c (bdesc_2arg): Add builtin description
|
||
for ffb, ffmism and flmism.
|
||
* config/nds32/nds32-intrinsic.md (unspec_ffb): Define new pattern.
|
||
(unspec_ffmism): Ditto.
|
||
(unspec_flmism): Ditto.
|
||
(nds32_expand_builtin_impl): Check if string extension is available.
|
||
* config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FFB,
|
||
NDS32_BUILTIN_FFMISM and NDS32_BUILTIN_FLMISM.
|
||
|
||
2018-03-10 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
Reverting patch:
|
||
2018-03-09 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/83712
|
||
* lra-assigns.c (assign_by_spills): Return a flag of reload
|
||
assignment failure. Do not process the reload assignment
|
||
failures. Do not spill other reload pseudos if they has the same
|
||
reg class.
|
||
(lra_assign): Add a return arg. Set up from the result of
|
||
assign_by_spills call.
|
||
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
|
||
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
|
||
usage_insns if it is not NULL.
|
||
(spill_hard_reg_in_range): New function.
|
||
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
|
||
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
|
||
function prototypes.
|
||
(lra_assign): Change prototype.
|
||
* lra.c (lra): Add code to deal with fails by splitting hard reg
|
||
live ranges.
|
||
|
||
2018-03-10 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/84807
|
||
* config/i386/i386.opt: Replace Enforcment with Enforcement.
|
||
|
||
2018-03-10 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
PR debug/84620
|
||
* dwarf2out.h (dw_val_class): Add dw_val_class_symview.
|
||
(dw_val_node): Add val_symbolic_view.
|
||
* dwarf2out.c (dw_line_info_table): Add symviews_since_reset.
|
||
(symview_upper_bound): New.
|
||
(new_line_info_table): Initialize symviews_since_reset.
|
||
(dwarf2out_source_line): Count symviews_since_reset and set
|
||
symview_upper_bound.
|
||
(dw_val_equal_p): Handle symview.
|
||
(add_AT_symview): New.
|
||
(print_dw_val): Handle symview.
|
||
(attr_checksum, attr_checksum_ordered): Likewise.
|
||
(same_dw_val_p, size_of_die): Likewise.
|
||
(value_format, output_die): Likewise.
|
||
(add_high_low_attributes): Use add_AT_symview for entry_view.
|
||
(dwarf2out_finish): Reset symview_upper_bound, clear
|
||
zero_view_p.
|
||
|
||
2018-03-09 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/83969
|
||
* config/rs6000/rs6000.c (rs6000_offsettable_memref_p): New prototype.
|
||
Add strict argument and use it.
|
||
(rs6000_split_multireg_move): Update for new strict argument.
|
||
(mem_operand_gpr): Disallow all non-offsettable addresses.
|
||
* config/rs6000/rs6000.md (*movdi_internal64): Use YZ constraint.
|
||
|
||
2018-03-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84772
|
||
* config/rs6000/rs6000.c (rs6000_gimplify_va_arg): Mark va_arg_tmp
|
||
temporary TREE_ADDRESSABLE before gimplification of BUILT_IN_MEMCPY.
|
||
* config/powerpcspe/powerpcspe.c (rs6000_gimplify_va_arg): Likewise.
|
||
|
||
PR c++/84767
|
||
* tree-inline.c (copy_tree_body_r): For INDIRECT_REF of a remapped
|
||
decl, use remap_type if we want to use the type.
|
||
|
||
2018-03-09 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/84526
|
||
* gimple-ssa-warn-restrict.c (builtin_memref::set_base_and_offset):
|
||
Remove dead code.
|
||
(builtin_access::generic_overlap): Be prepared to handle non-array
|
||
base objects.
|
||
|
||
2018-03-09 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
PR rtl-optimization/84682
|
||
* lra-constraints.c (process_address_1): Check is_address flag
|
||
for address constraints.
|
||
(process_alt_operands): Likewise.
|
||
* lra.c (lra_set_insn_recog_data): Pass asm operand locs to
|
||
preprocess_constraints.
|
||
* recog.h (preprocess_constraints): Add oploc parameter.
|
||
Adjust callers.
|
||
* recog.c (preprocess_constraints): Test address_operand for
|
||
CT_ADDRESS constraints.
|
||
|
||
2018-03-09 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/83712
|
||
* lra-assigns.c (assign_by_spills): Return a flag of reload
|
||
assignment failure. Do not process the reload assignment
|
||
failures. Do not spill other reload pseudos if they has the same
|
||
reg class.
|
||
(lra_assign): Add a return arg. Set up from the result of
|
||
assign_by_spills call.
|
||
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
|
||
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
|
||
usage_insns if it is not NULL.
|
||
(spill_hard_reg_in_range): New function.
|
||
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
|
||
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
|
||
function prototypes.
|
||
(lra_assign): Change prototype.
|
||
* lra.c (lra): Add code to deal with fails by splitting hard reg
|
||
live ranges.
|
||
|
||
2018-03-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
PR target/83193
|
||
* common/config/arm/arm-common.c (arm_parse_arch_option_name):
|
||
Accept complain bool parameter. Only emit errors if it is true.
|
||
(arm_parse_cpu_option_name): Likewise.
|
||
(arm_target_thumb_only): Adjust callers of the above.
|
||
* config/arm/arm-protos.h (arm_parse_cpu_option_name): Adjust
|
||
prototype to take a default true bool parameter.
|
||
(arm_parse_arch_option_name): Likewise.
|
||
|
||
2018-03-09 David Malcolm <dmalcolm@redhat.com>
|
||
Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
|
||
|
||
PR jit/64089
|
||
PR jit/84288
|
||
* Makefile.in (LD_VERSION_SCRIPT_OPTION, LD_SONAME_OPTION): New.
|
||
* configure: Regenerate.
|
||
* configure.ac ("linker --version-script option"): New.
|
||
("linker soname option"): New.
|
||
|
||
2018-03-09 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84775
|
||
* tree-if-conv.c (add_bb_predicate_gimplified_stmts): Delink
|
||
immediate uses of predicate stmts and mark them modified.
|
||
|
||
Revert
|
||
PR tree-optimization/84178
|
||
* tree-if-conv.c (combine_blocks): Move insert_gimplified_predicates
|
||
to caller.
|
||
(version_loop_for_if_conversion): Delay update_ssa call.
|
||
(tree_if_conversion): Delay update_ssa until after predicate
|
||
insertion.
|
||
|
||
2018-03-09 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR target/84763
|
||
* config/i386/winnt.c (i386_pe_seh_cold_init): Use small pre-allocation
|
||
when the function accesses prior frames.
|
||
|
||
2018-03-08 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/84456
|
||
* dwarf2out.c (dw_loc_list): If list && loc_list->first->next, call
|
||
gen_llsym, otherwise call maybe_gen_llsym.
|
||
|
||
PR inline-asm/84742
|
||
* recog.c (asm_operand_ok): Return 0 if multi-character constraint
|
||
has ',' character inside of it.
|
||
|
||
2018-03-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
PR target/84748
|
||
* config/aarch64/aarch64.md (*compare_cstore<mode>_insn): Mark pattern
|
||
as clobbering CC_REGNUM.
|
||
|
||
2018-03-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/84552
|
||
* tree-scalar-evolution.c: Include tree-into-ssa.h.
|
||
(follow_copies_to_constant): Do not follow SSA names registered
|
||
for update.
|
||
|
||
2018-03-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84178
|
||
* tree-if-conv.c (combine_blocks): Move insert_gimplified_predicates
|
||
to caller.
|
||
(version_loop_for_if_conversion): Delay update_ssa call.
|
||
(tree_if_conversion): Delay update_ssa until after predicate
|
||
insertion.
|
||
|
||
2018-03-08 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR tree-optimization/84178
|
||
* tree-if-conv.c (release_bb_predicate): Remove the
|
||
the assertion that the stmts have NULL use_ops.
|
||
Discard the statements, asserting that they haven't
|
||
yet been added to a BB.
|
||
|
||
2018-03-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84746
|
||
* tree-ssa-pre.c (find_leader_in_sets): Deal with SET1 being NULL.
|
||
(phi_translate): Pass in destination ANTIC_OUT set.
|
||
(phi_translate_1): Likewise. For a simplified result lookup
|
||
a leader in ANTIC_OUT and AVAIL_OUT, not the ANTIC_IN sets.
|
||
(phi_translate_set): Adjust.
|
||
(do_pre_regular_insertion): Likewise.
|
||
(do_pre_partial_partial_insertion): Likewise.
|
||
|
||
2018-03-08 Martin Liska <mliska@suse.cz>
|
||
|
||
PR gcov-profile/84735
|
||
* doc/gcov.texi: Document usage of profile files.
|
||
* gcov-io.h: Document changes in the format.
|
||
|
||
2018-03-08 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
PR debug/84404
|
||
PR debug/84408
|
||
* dwarf2out.c (struct dw_line_info_table): Update comments for
|
||
view == -1.
|
||
(FORCE_RESET_NEXT_VIEW): New.
|
||
(FORCE_RESETTING_VIEW_P): New.
|
||
(RESETTING_VIEW_P): Check for -1 too.
|
||
(ZERO_VIEW_P): Likewise.
|
||
(new_line_info_table): Force-reset next view.
|
||
(dwarf2out_begin_function): Likewise.
|
||
(dwarf2out_source_line): Simplify zero_view_p initialization.
|
||
Test FORCE_RESETTING_VIEW_P and RESETTING_VIEW_P instead of
|
||
view directly. Omit view when omitting .loc at line 0.
|
||
|
||
2018-03-08 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/84740
|
||
* tree-switch-conversion.c (process_switch): Call build_constructors
|
||
only if info.phi_count is non-zero.
|
||
|
||
PR tree-optimization/84739
|
||
* tree-tailcall.c (find_tail_calls): Check call arguments against
|
||
DECL_ARGUMENTS (current_function_decl) rather than
|
||
DECL_ARGUMENTS (func) when checking for tail recursion.
|
||
|
||
2018-03-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* doc/contrib.texi: Add entries for Martin Liska, David Malcolm,
|
||
Marek Polacek, extend Vladimir Makarov's, Jonathan Wakely's and
|
||
Volker Reichelt's entry and add entries for people that perform
|
||
GCC fuzzy testing and report numerous bugs.
|
||
|
||
2018-03-07 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR target/82411
|
||
* config/rs6000/rs6000.c (rs6000_elf_in_small_data_p): Don't put
|
||
readonly data in sdata, if that is disabled.
|
||
* config/rs6000/sysv4.opt (mreadonly-in-sdata): New option.
|
||
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
|
||
-mreadonly-in-sdata option.
|
||
|
||
2018-03-07 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/84468
|
||
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Consider successor
|
||
basic block when looking for nul assignment.
|
||
|
||
2018-03-07 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR target/84277
|
||
* except.h (output_function_exception_table): Adjust prototype.
|
||
* except.c (output_function_exception_table): Remove FNNAME parameter
|
||
and add SECTION parameter. Ouput one part of the table at a time.
|
||
* final.c (final_scan_insn_1) <NOTE_INSN_SWITCH_TEXT_SECTIONS>: Output
|
||
the first part of the exception table and emit unwind directives.
|
||
* config/i386/i386-protos.h (i386_pe_end_cold_function): Declare.
|
||
(i386_pe_seh_cold_init): Likewise.
|
||
* config/i386/cygming.h (ASM_DECLARE_COLD_FUNCTION_NAME): New macro.
|
||
(ASM_DECLARE_COLD_FUNCTION_SIZE): Likewise.
|
||
* config/i386/i386.c (x86_expand_epilogue): Fix wording in comment.
|
||
(ix86_output_call_insn): Emit a nop in one more case for SEH.
|
||
* config/i386/winnt.c: Include except.h.
|
||
(struct seh_frame_state): Add reg_offset, after_prologue and
|
||
in_cold_section fields.
|
||
(i386_pe_seh_end_prologue): Set seh->after_prologue.
|
||
(i386_pe_seh_cold_init): New function.
|
||
(i386_pe_seh_fini): Add COLD parameter and bail out if it is not equal
|
||
to seh->in_cold_section.
|
||
(seh_emit_push): Record the offset of the push.
|
||
(seh_emit_save): Record the offet of the save.
|
||
(i386_pe_seh_unwind_emit): Deal with NOTE_INSN_SWITCH_TEXT_SECTIONS.
|
||
Test seh->after_prologue to disregard the epilogue.
|
||
(i386_pe_end_function): Pass FALSE to i386_pe_seh_fini.
|
||
(i386_pe_end_cold_function): New function.
|
||
|
||
2018-03-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR fortran/84565
|
||
* config/aarch64/predicates.md (aarch64_simd_reg_or_zero): Use
|
||
aarch64_simd_or_scalar_imm_zero rather than aarch64_simd_imm_zero.
|
||
|
||
PR c++/84704
|
||
* gimple-expr.c (create_tmp_var_raw): Set DECL_NAMELESS flag
|
||
on tmp_var.
|
||
* tree-pretty-print.c (dump_decl_name): For TDF_COMPARE_DEBUG,
|
||
don't print names of DECL_NAMELESS DECL_IGNORED_P decls.
|
||
|
||
PR middle-end/84723
|
||
* multiple_target.c: Include tree-inline.h and intl.h.
|
||
(expand_target_clones): Diagnose and fail if node->definition and
|
||
!tree_versionable_function_p (node->decl).
|
||
|
||
2018-03-06 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
* config/pa/pa.h (ASM_GENERATE_INTERNAL_LABEL): Revise to use
|
||
sprint_ul.
|
||
(ASM_OUTPUT_ADDR_VEC_ELT): Revise for above change.
|
||
(ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
|
||
* config/pa/pa64-hpux.h (ASM_GENERATE_INTERNAL_LABEL): Revise as above.
|
||
|
||
2018-03-06 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84710
|
||
* combine.c (try_combine): Use reg_or_subregno instead of handling
|
||
just paradoxical SUBREGs and REGs.
|
||
|
||
2018-03-06 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (arc_finalize_pic): Remove function.
|
||
(arc_must_save_register): We use single base PIC register, remove
|
||
checks to save/restore the PIC register.
|
||
(arc_expand_prologue): Likewise.
|
||
* config/arc/arc-protos.h (arc_set_default_type_attributes):
|
||
Remove.
|
||
(arc_verify_short): Likewise.
|
||
(arc_attr_type): Likewise.
|
||
* config/arc/arc.c (arc_set_default_type_attributes): Remove.
|
||
(walk_stores): Likewise.
|
||
(arc_address_cost): Make it static.
|
||
(arc_verify_short): Likewise.
|
||
(branch_dest): Likewise.
|
||
(arc_attr_type): Likewise.
|
||
* config/arc/arc.c (TARGET_ADJUST_INSN_LENGTH): Remove.
|
||
(TARGET_INSN_LENGTH_PARAMETERS): Likewise.
|
||
(arc_final_prescan_insn): Remove inserting the nops due to
|
||
hardware hazards. It is done in reorg step.
|
||
(insn_length_variant_t): Remove.
|
||
(insn_length_parameters_t): Likewise.
|
||
(arc_insn_length_parameters): Likewise.
|
||
(arc_get_insn_variants): Likewise.
|
||
* config/arc/arc.h (TARGET_UPSIZE_DBR): Remove.
|
||
|
||
2018-03-06 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR inline-asm/84683
|
||
* reg-stack.c (move_for_stack_reg): If any_malformed_asm, avoid
|
||
assertion failure.
|
||
|
||
PR tree-optimization/84687
|
||
* omp-simd-clone.c (simd_clone_create): Clear DECL_BUILT_IN_CLASS
|
||
on new_node->decl.
|
||
* match.pd (pow(C,x)*expN(y) -> expN(logN(C)*x+y)): New optimization.
|
||
|
||
2018-03-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000-builtin.def (rs6000_speculation_barrier):
|
||
Rename to ppc_speculation_barrier.
|
||
* config/rs6000/rs6000.c (rs6000_init_builtins): Rename builtin to
|
||
__builtin_ppc_speculation_barrier.
|
||
|
||
2018-03-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84700
|
||
* combine.c (combine_simplify_rtx): Don't try to simplify if
|
||
if_then_else_cond returned non-NULL, but either true_rtx or false_rtx
|
||
are equal to x.
|
||
|
||
2018-03-05 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_loop_align): Don't align tiny loops
|
||
to 32 bytes when compiling for POWER9.
|
||
|
||
2018-03-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84564
|
||
* config/i386/i386.c (ix86_function_ok_for_sibcall): Check for
|
||
regparm >= 3 with no arg reg available also for calls with
|
||
flag_force_indirect_call. Pass decl to ix86_function_regparm.
|
||
|
||
PR target/84524
|
||
* config/i386/sse.md (*<code><mode>3): Replace <mask_prefix3> with
|
||
orig,vex.
|
||
(*<plusminus_insn><mode>3): Likewise. Remove <mask_operand3> uses.
|
||
|
||
2018-03-05 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/84264
|
||
* config/rs6000/vector.md (mov<mode>): Disallow altivec memory operands.
|
||
|
||
2018-03-05 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84486
|
||
* tree-ssa-pre.c (create_expression_by_pieces): Remove dead code.
|
||
When inserting a __builtin_assume_aligned call set the LHS
|
||
SSA name alignment info accordingly.
|
||
|
||
2018-03-05 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
PR tree-optimization/84114
|
||
* config/aarch64/aarch64.c (aarch64_reassociation_width)
|
||
Avoid reassociation of FLOAT_MODE addition.
|
||
|
||
2018-03-05 Olga Makhotina <olga.makhotina@intel.com>
|
||
|
||
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PCONFIG_SET,
|
||
OPTION_MASK_ISA_PCONFIG_UNSET, OPTION_MASK_ISA_WBNOINVD_SET,
|
||
OPTION_MASK_ISA_WBNOINVD_UNSET): New definitions.
|
||
(ix86_handle_option): Handle -mpconfig and -mwbnoinvd.
|
||
* config.gcc (pconfigintrin.h, wbnoinvdintrin.h) : Add headers.
|
||
* config/i386/cpuid.h (bit_PCONFIG, bit_WBNOINVD): New.
|
||
* config/i386/driver-i386.c (host_detect_local_cpu): Detect -mpconfig
|
||
and -mwbnoinvd.
|
||
* config/i386/i386-builtin.def (__builtin_ia32_wbnoinvd,
|
||
__builtin_ia32_wbinvd): New builtins.
|
||
(SPECIAL_ARGS2): New.
|
||
* config/i386/i386-c.c (__WBNOINVD__, __PCONFIG__): New.
|
||
(SPECIAL_ARGS2): New.
|
||
* config/i386/i386.c (ix86_target_string): Add -mpconfig and -mwbnoinvd.
|
||
(ix86_valid_target_attribute_inner_p): Ditto.
|
||
(ix86_init_mmx_sse_builtins): Add special_args2.
|
||
* config/i386/i386.h (TARGET_PCONFIG, TARGET_PCONFIG_P, TARGET_WBNOINVD,
|
||
TARGET_WBNOINVD_P): New.
|
||
* config/i386/i386.md (UNSPECV_WBINVD, UNSPECV_WBNOINVD): New.
|
||
(define_insn "wbinvd", define_insn "wbnoinvd"): New.
|
||
* config/i386/i386.opt: Add -mpconfig and -mwbnoinvd.
|
||
* config/i386/immintrin.h (_wbinvd): New intrinsic.
|
||
* config/i386/pconfigintrin.h: New file.
|
||
* config/i386/wbnoinvdintrin.h: Ditto.
|
||
* config/i386/x86intrin.h: Add headers pconfigintrin.h and wbnoinvdintrin.h.
|
||
* doc/invoke.texi (-mpconfig, -mwbnoinvd): New.
|
||
|
||
2018-03-05 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84670
|
||
* tree-ssa-pre.c (struct bb_bitmap_sets): Add visited_with_visited_succs
|
||
member.
|
||
(BB_VISITED_WITH_VISITED_SUCCS): New define.
|
||
(compute_antic): Initialize BB_VISITED_WITH_VISITED_SUCCS.
|
||
(compute_antic_aux): Only assert the number of values in ANTIC_IN
|
||
doesn't grow if all successors (recursively) were visited at least
|
||
once.
|
||
|
||
2018-03-05 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84650
|
||
* tree-ssa-loop-im.c (pass_lim::execute): Reset the SCEV cache
|
||
if executed in the loop pipeline.
|
||
|
||
2018-03-05 Sandra Loosemore <sandra@codesourcery.com>
|
||
|
||
* doc/configfiles.texi (Configuration Files): Move info about
|
||
conditionalizing $target-protos.h to...
|
||
* doc/sourcebuild.texi (Back End): Here. Explain how $target.h
|
||
differs from $target-protos.h.
|
||
|
||
2018-03-05 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-protos.h (nds32_expand_setmem): Declare.
|
||
* config/nds32/nds32-multiple.md (setmemsi): Define.
|
||
* config/nds32/nds32-memory-manipulation.c
|
||
(nds32_gen_dup_4_byte_to_word_value): New.
|
||
(emit_setmem_word_loop): New.
|
||
(emit_setmem_byte_loop): New.
|
||
(nds32_expand_setmem_loop): New.
|
||
(nds32_expand_setmem_loop_v3m): New.
|
||
(nds32_expand_setmem_unroll): New.
|
||
(nds32_expand_setmem): New.
|
||
|
||
2018-03-04 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-memory-manipulation.c
|
||
(nds32_emit_load_store): New.
|
||
(nds32_emit_post_inc_load_store): New.
|
||
(nds32_emit_mem_move): New.
|
||
(nds32_emit_mem_move_block): New.
|
||
(nds32_expand_movmemsi_loop_unknown_size): New.
|
||
(nds32_expand_movmemsi_loop_known_size): New.
|
||
(nds32_expand_movmemsi_loop): New.
|
||
(nds32_expand_movmemsi_unroll): New.
|
||
(nds32_expand_movmemqi): Rename ...
|
||
(nds32_expand_movmemsi): ... to this.
|
||
* config/nds32/nds32-multiple.md (movmemqi): Rename ...
|
||
(movmemsi): ... to this.
|
||
* config/nds32/nds32-protos.h (nds32_expand_movmemqi): Rename ...
|
||
(nds32_expand_movmemsi): ... to this.
|
||
|
||
2018-03-04 Kito Cheng <kito.cheng@gmail.com>
|
||
Monk Chiang <sh.chiang04@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-protos.h
|
||
(nds32_expand_load_multiple): New arguments.
|
||
(nds32_expand_store_multiple): Ditto.
|
||
(nds32_valid_multiple_load_store): Rename ...
|
||
(nds32_valid_multiple_load_store_p): ... to this.
|
||
* config/nds32/nds32-memory-manipulation.c
|
||
(nds32_expand_load_multiple): Refine implementation.
|
||
(nds32_expand_store_multiple): Ditto.
|
||
* config/nds32/nds32-multiple.md
|
||
(load_multiple): Update nds32_expand_load_multiple interface.
|
||
(store_multiple): Update nds32_expand_store_multiple interface.
|
||
* config/nds32/nds32-predicates.c
|
||
(nds32_valid_multiple_load_store): Rename ...
|
||
(nds32_valid_multiple_load_store_p): ... to this and refine
|
||
implementation.
|
||
* config/nds32/predicates.md
|
||
(nds32_load_multiple_and_update_address_operation): New predicate.
|
||
(nds32_store_multiple_and_update_address_operation): New predicate.
|
||
|
||
2018-03-04 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.md (type): Add load_multiple and store_multiple.
|
||
(combo): New attribute.
|
||
* config/nds32/nds32-multiple.md: Refine patterns with new attributes.
|
||
|
||
2018-03-03 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32.opt: Change -mcmodel= default value.
|
||
|
||
2018-03-03 Kito Cheng <kito.cheng@gmail.com>
|
||
Monk Chiang <sh.chiang04@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/constants.md (unspec_element): New enum.
|
||
* config/nds32/constraints.md (Umw): New constraint.
|
||
* config/nds32/nds32-intrinsic.c: Add more builtin functions.
|
||
* config/nds32/nds32-intrinsic.md: Likewise.
|
||
* config/nds32/nds32-md-auxiliary.c (nds32_regno_to_enable4): New.
|
||
(nds32_valid_smw_lwm_base_p): New.
|
||
(nds32_output_smw_single_word): New.
|
||
(nds32_output_lmw_single_word): New.
|
||
(nds32_expand_unaligned_load): New.
|
||
(nds32_expand_unaligned_store): New.
|
||
* config/nds32/nds32-protos.h (nds32_valid_smw_lwm_base_p): Declare.
|
||
(nds32_output_smw_single_word): Declare.
|
||
(nds32_output_lmw_single_word): Declare.
|
||
(nds32_expand_unaligned_load): Declare.
|
||
(nds32_expand_unaligned_store): Declare.
|
||
* config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_UALOAD_HW,
|
||
NDS32_BUILTIN_UALOAD_W, NDS32_BUILTIN_UALOAD_DW,
|
||
NDS32_BUILTIN_UASTORE_HW, NDS32_BUILTIN_UASTORE_W,
|
||
NDS32_BUILTIN_UASTORE_DW.
|
||
* config/nds32/predicates.md (nds32_lmw_smw_base_operand): New
|
||
predicate.
|
||
|
||
2018-03-03 Monk Chiang <sh.chiang04@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-intrinsic.c
|
||
(nds32_expand_builtin_null_ftype_reg): Delete.
|
||
(nds32_expand_builtin_reg_ftype_imm): Ditto.
|
||
(nds32_expand_builtin_null_ftype_reg_imm): Ditto.
|
||
(nds32_read_argument): New.
|
||
(nds32_legitimize_target): Ditto.
|
||
(nds32_legitimize_argument): Ditto.
|
||
(nds32_check_constant_argument): Ditto.
|
||
(nds32_expand_unop_builtin): Ditto.
|
||
(nds32_expand_unopimm_builtin): Ditto.
|
||
(nds32_expand_binop_builtin): Ditto.
|
||
(nds32_builtin_decl_impl): Ditto.
|
||
(builtin_description): Ditto.
|
||
(nds32_expand_builtin_impl): Rewrite with new infrastructure.
|
||
(nds32_init_builtins_impl): Ditto.
|
||
* config/nds32/nds32.c (TARGET_BUILTIN_DECL): Define.
|
||
(nds32_builtin_decl): New.
|
||
* config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_COUNT.
|
||
* config/nds32/nds32-protos.h (nds32_builtin_decl_impl): Declare.
|
||
|
||
2018-03-02 Jeff Law <law@redhat.com>
|
||
|
||
* reorg.c (stop_search_p): Handle DEBUG_INSN.
|
||
(redundant_insn, fill_simple_delay_slots): Likewise.
|
||
(fill_slots_from_thread): Likewise.
|
||
* resource.c (mark_referenced_resources): Likewise.
|
||
(mark_set_resources, find_dead_or_set_registers): Likewise.
|
||
|
||
2018-03-02 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* substring-locations.h (format_warning_va): Formatting fix for
|
||
ATTRIBUTE_GCC_DIAG.
|
||
(format_warning_at_substring): Fix up ATTRIBUTE_GCC_DIAG second
|
||
argument.
|
||
(format_warning_n_va, format_warning_at_substring_n): New prototypes.
|
||
* substring-locations.c: Include intl.h.
|
||
(format_warning_va): Turned into small wrapper around
|
||
format_warning_n_va, renamed to ...
|
||
(format_warning_n_va): ... this, add N and PLURAL_GMSGID arguments,
|
||
rename GMSGID to SINGULAR_GMSGID, if SINGULAR_GMSGID != PLURAL_GMSGID,
|
||
use ngettext.
|
||
(format_warning_at_substring_n): New function.
|
||
* gimple-ssa-sprintf.c: Remove GCC diagnostic ignored pragma.
|
||
(fmtwarn): Add ATTRIBUTE_GCC_DIAG. Turn into a copy of
|
||
format_warning_at_substring with just a shorter name instead of
|
||
const function pointer.
|
||
(fmtwarn_n): New function.
|
||
(maybe_warn, format_directive, parse_directive): Use fmtwarn_n where
|
||
appropriate, get rid of all the fmtstr temporaries, move conditionals
|
||
with G_() wrapped string literals directly into fmtwarn arguments,
|
||
cast dir.len to (int), formatting fixes.
|
||
|
||
2018-03-02 Thomas Schwinge <thomas@codesourcery.com>
|
||
|
||
* doc/invoke.texi: Remove "Cilk Plus" references.
|
||
|
||
2018-03-02 Jakub Jelinek <jakub@redhat.com>
|
||
Richard Biener <rguenther@suse.de>
|
||
|
||
PR ipa/84628
|
||
* expr.c (expand_expr_real_1) <case CALL_EXPR>: Don't emit diagnostics
|
||
for error or warning attributes if CALL_FROM_THUNK_P is set.
|
||
Formatting fixes.
|
||
|
||
2018-03-02 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/56540
|
||
* config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Predefine
|
||
__SIZEOF_128__ macro if HPUX_LONG_DOUBLE_LIBRARY.
|
||
|
||
PR target/56540
|
||
* config/ia64/ia64.h (TARGET_CPU_CPP_BUILTINS): Predefine
|
||
__SIZEOF_{FPREG,FLOAT{80,128}}__ macros.
|
||
|
||
* predict.c (test_prediction_value_range): Use PROB_UNINITIALIZED
|
||
instead of -1U in last predictors element's probability member.
|
||
|
||
2018-03-02 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR ipa/83983
|
||
* ipa-devirt.c (odr_subtypes_equivalent_p): Get the ODR type of both
|
||
arguments if they are comparable.
|
||
|
||
2018-03-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/84634
|
||
* tree-vect-stmts.c (vectorizable_store, vectorizable_load): Replace
|
||
masks and masked_loop_p with a single loop_masks, making sure it's
|
||
null for bb vectorization.
|
||
|
||
2018-03-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-data-refs.c (vect_analyze_data_ref_dependence)
|
||
(vect_analyze_data_ref_access): Use loop->safe_len rather than
|
||
loop->force_vectorize to check whether there is no alias.
|
||
|
||
2018-03-02 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84614
|
||
* rtl.h (prev_real_nondebug_insn, next_real_nondebug_insn): New
|
||
prototypes.
|
||
* emit-rtl.c (next_real_insn, prev_real_insn): Fix up function
|
||
comments.
|
||
(next_real_nondebug_insn, prev_real_nondebug_insn): New functions.
|
||
* cfgcleanup.c (try_head_merge_bb): Use prev_real_nondebug_insn
|
||
instead of a loop around prev_real_insn.
|
||
* combine.c (move_deaths): Use prev_real_nondebug_insn instead of
|
||
prev_real_insn.
|
||
|
||
PR inline-asm/84625
|
||
* config/i386/i386.c (ix86_print_operand): Use conditional
|
||
output_operand_lossage instead of gcc_assert if CONST_VECTOR is not
|
||
zero vector.
|
||
|
||
2018-03-02 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84427
|
||
* tree-ssa-pre.c (bitmap_remove_expr_from_set): Remove.
|
||
(bitmap_set_subtract_values): Rewrite to handle multiple
|
||
exprs per value.
|
||
(clean): Likewise.
|
||
(prune_clobbered_mems): Likewise.
|
||
(phi_translate): Take edge instead of pred/phiblock.
|
||
(phi_translate_1): Likewise.
|
||
(phi_translate_set): Likewise. Insert all translated
|
||
exprs for a value into the set, keeping possibly multiple
|
||
expressions per value.
|
||
(compute_antic_aux): Adjust for phi_translate changes.
|
||
When intersecting union the expressions and prune those
|
||
not in the final value set, keeping possibly multiple
|
||
expressions per value. Do not use value-insertion
|
||
for unioning ANTIC_OUT U EXP_GEN - TMP_GEN but merge
|
||
all expressions. Add verification that the value-sets
|
||
only shrink during iteration.
|
||
(compute_partial_antic_aux): Adjust for the phi_translate changes.
|
||
(do_pre_regular_insertion): Likewise.
|
||
(do_pre_partial_partial_insertion): Likewise.
|
||
|
||
2018-03-02 Richard Biener <rguenther@suse.de>
|
||
|
||
PR target/82005
|
||
* config/darwin.c (saved_debug_info_level): New static global.
|
||
(darwin_asm_lto_start): Disable debug info generation for LTO out.
|
||
(darwin_asm_lto_end): Restore debug info generation settings.
|
||
|
||
2018-03-01 Martin Liska <mliska@suse.cz>
|
||
|
||
PR sanitizer/82484
|
||
* sanopt.c (sanitize_rewrite_addressable_params): Do not handle
|
||
volatile arguments.
|
||
|
||
2018-03-01 Richard Biener <rguenther@suse.de>
|
||
|
||
PR debug/84645
|
||
* dwarf2out.c (gen_variable_die): Properly handle late VLA
|
||
type annotation with LTO when debug was disabled at compile-time.
|
||
|
||
2018-03-01 Matthew Fortune <mfortune@gmail.com>
|
||
|
||
* config/mips/mips.c (mips_final_prescan_insn): Fix incorrect
|
||
XINT with INTVAL.
|
||
(mips_final_postscan_insn): Likewise.
|
||
|
||
2018-03-01 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR rtl-optimization/84528
|
||
* alias.c (init_alias_target): Add commentary.
|
||
(init_alias_analysis): Only give HARD_FRAME_POINTER_REGNUM
|
||
a unique base value if the frame pointer is not eliminated
|
||
to the stack pointer.
|
||
|
||
2018-03-01 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR rtl-optimization/83327
|
||
* lra-int.h (hard_regs_spilled_into): Declare.
|
||
* lra.c (hard_regs_spilled_into): Define.
|
||
(init_reg_info): Init hard_regs_spilled_into.
|
||
* lra-spills.c (assign_spill_hard_regs): Update hard_regs_spilled_into.
|
||
* lra-lives.c (make_hard_regno_born, make_hard_regno_dead)
|
||
(process_bb_lives): Handle hard_regs_spilled_into.
|
||
(lra_create_live_ranges_1): Before doing liveness propagation, clear
|
||
regs in all_hard_regs_bitmap if set in hard_regs_spilled_into.
|
||
|
||
2018-02-28 David Edelsohn <dje.gcc@gmail.com>
|
||
|
||
* config.gcc (powerpc-ibm-aix7.1.*): New stanza.
|
||
(powerpc-ibm-aix[789]*): Default to AIX 7.2.
|
||
* config/rs6000/aix71.h (TARGET_DEFAULT): Revert to Power4 ISA.
|
||
* config/rs6000/aix72.h: New file.
|
||
|
||
2018-02-28 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* gimple-ssa-warn-restrict.c (maybe_diag_overlap): Use warning_n
|
||
instead of warning_at with conditional singular and plural messages
|
||
where possible.
|
||
|
||
PR target/52991
|
||
* stor-layout.c (update_alignment_for_field): For
|
||
targetm.ms_bitfield_layout_p (rli->t), if !is_bitfield
|
||
&& !DECL_PACKED (field), do the alignment update, just use
|
||
only desired_align instead of MAX (type_align, desired_align)
|
||
as the alignment.
|
||
(place_field): Don't do known_align < desired_align handling
|
||
early if targetm.ms_bitfield_layout_p (rli->t) and rli->prev_field
|
||
is non-NULL, instead do it after rli->prev_field handling and
|
||
only if not within a bitfield word. For DECL_PACKED (field)
|
||
use type_align of BITS_PER_UNIT.
|
||
|
||
2018-02-28 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_emit_probe_stack_range): Remove
|
||
superfluous parentheses and trailing spaces.
|
||
|
||
2018-02-28 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84584
|
||
* graphite-scop-detection.c (scop_detection::add_scop): Discard
|
||
SCoPs with fake exit edge.
|
||
|
||
2018-02-28 Martin Liska <mliska@suse.cz>
|
||
|
||
PR testsuite/84597
|
||
* timevar.c (timer::print): Fix format to properly print 100%
|
||
values.
|
||
|
||
2018-02-28 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/84607
|
||
* genmatch.c (capture_info::walk_match): Do not mark
|
||
captured expressions without operands as expr_p given
|
||
they act more like predicates and should be subject to
|
||
"lost tail" side-effect preserving.
|
||
|
||
2018-02-28 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
PR rtl-optimization/81611
|
||
* auto-inc-dec.c (attempt_change): Move dead note from
|
||
mem_insn if it's the next use of regno
|
||
(find_address): Take address use of reg holding
|
||
non-incremented value. Add parm to limit search to the named
|
||
reg only.
|
||
(merge_in_block): Attempt to use a mem insn that is the next
|
||
use of the original regno.
|
||
|
||
2018-02-27 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR c++/83871
|
||
* gcc/doc/invoke.texi (-Wmissing-attributes): New option.
|
||
* gcc/print-tree.c (print_node): Handle DECL_UNINLINABLE.
|
||
|
||
2018-02-27 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR translation/84207
|
||
* diagnostic-core.h (warning_n, error_n, inform_n): Change
|
||
n argument to unsigned HOST_WIDE_INT.
|
||
* diagnostic.c (warning_n, error_n, inform_n): Ditto.
|
||
(diagnostic_n_impl): Ditto. Handle arguments in excess of LONG_MAX.
|
||
* gimple-ssa-sprintf.c (format_directive): Simplify inform_n call.
|
||
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Use warning_n.
|
||
|
||
2018-02-27 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84512
|
||
* tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
|
||
Do not use the estimate returned from record_stmt_cost for
|
||
the scalar iteration cost but sum properly using add_stmt_cost.
|
||
|
||
2018-02-27 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84466
|
||
* graphite-scop-detection.c (scop_detection::stmt_simple_for_scop_p):
|
||
Adjust last change to less strictly validate use operands.
|
||
|
||
2018-02-27 Martin Liska <mliska@suse.cz>
|
||
|
||
PR gcov-profile/84548
|
||
* gcov.c (process_file): Allow partial overlap and consider it
|
||
also as group functions.
|
||
(output_lines): Properly calculate range of lines for a group.
|
||
|
||
2018-02-27 Martin Liska <mliska@suse.cz>
|
||
|
||
* timevar.c (timer::print_row): Remove 'usr', 'sys', 'wall' and
|
||
'ggc' suffixes. Change first column width.
|
||
(timer::print): Fix formatting of the column.
|
||
|
||
2018-02-27 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
* tree-ssa-live.c (remove_unused_scope_block_p): Do not
|
||
preserve inline entry blocks for the sake of debug inline
|
||
entry point markers alone.
|
||
(remove_unused_locals): Suggest in comments a better place to
|
||
force the preservation of inline entry blocks that are
|
||
otherwise unused, but do not preserve them.
|
||
|
||
2018-02-26 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/i386.c (ix86_output_indirect_jmp): Update comments.
|
||
|
||
2018-02-26 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/84039
|
||
* config/i386/constraints.md (Bs): Replace
|
||
ix86_indirect_branch_register with
|
||
TARGET_INDIRECT_BRANCH_REGISTER.
|
||
(Bw): Likewise.
|
||
* config/i386/i386.md (indirect_jump): Likewise.
|
||
(tablejump): Likewise.
|
||
(*sibcall_memory): Likewise.
|
||
(*sibcall_value_memory): Likewise.
|
||
Peepholes of indirect call and jump via memory: Likewise.
|
||
(*sibcall_GOT_32): Disallowed for TARGET_INDIRECT_BRANCH_REGISTER.
|
||
(*sibcall_value_GOT_32): Likewise.
|
||
* config/i386/predicates.md (indirect_branch_operand): Likewise.
|
||
(GOT_memory_operand): Likewise.
|
||
(call_insn_operand): Likewise.
|
||
(sibcall_insn_operand): Likewise.
|
||
(GOT32_symbol_operand): Likewise.
|
||
* config/i386/i386.h (TARGET_INDIRECT_BRANCH_REGISTER): New.
|
||
|
||
2018-02-26 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR rtl-optimization/83496
|
||
* reorg.c (steal_delay_list_from_target): Change REDUNDANT array from
|
||
booleans to RTXes. Call fix_reg_dead_note on every non-null element.
|
||
(steal_delay_list_from_fallthrough): Call fix_reg_dead_note on a
|
||
redundant insn, if any.
|
||
(relax_delay_slots): Likewise.
|
||
(update_reg_unused_notes): Rename REDUNDANT_INSN to OTHER_INSN.
|
||
|
||
2018-02-26 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83965
|
||
* tree-vect-patterns.c (vect_reassociating_reduction_p): Assume
|
||
that grouped statements are part of a reduction chain. Return
|
||
true if the statement is not marked as a reduction itself but
|
||
is part of a group.
|
||
(vect_recog_dot_prod_pattern): Don't check whether the statement
|
||
is part of a group here.
|
||
(vect_recog_sad_pattern): Likewise.
|
||
(vect_recog_widen_sum_pattern): Likewise.
|
||
|
||
2018-02-26 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR debug/84545
|
||
* final.c (rest_of_clean_state): Also look for calls inside sequences.
|
||
|
||
2018-02-26 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/84530
|
||
* config/i386/i386-protos.h (ix86_output_indirect_jmp): Remove
|
||
the bool argument.
|
||
(ix86_output_indirect_function_return): New prototype.
|
||
(ix86_split_simple_return_pop_internal): Likewise.
|
||
* config/i386/i386.c (indirect_return_via_cx): New.
|
||
(indirect_return_via_cx_bnd): Likewise.
|
||
(indirect_thunk_name): Handle return va CX_REG.
|
||
(output_indirect_thunk_function): Create alias for
|
||
__x86_return_thunk_[re]cx and __x86_return_thunk_[re]cx_bnd.
|
||
(ix86_output_indirect_jmp): Remove the bool argument.
|
||
(ix86_output_indirect_function_return): New function.
|
||
(ix86_split_simple_return_pop_internal): Likewise.
|
||
* config/i386/i386.md (*indirect_jump): Don't pass false
|
||
to ix86_output_indirect_jmp.
|
||
(*tablejump_1): Likewise.
|
||
(simple_return_pop_internal): Change it to define_insn_and_split.
|
||
Call ix86_split_simple_return_pop_internal to split it for
|
||
-mfunction-return=.
|
||
(simple_return_indirect_internal): Call
|
||
ix86_output_indirect_function_return instead of
|
||
ix86_output_indirect_jmp.
|
||
|
||
2018-02-26 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR bootstrap/84405
|
||
* vec.h (vec_default_construct): For BROKEN_VALUE_INITIALIZATION use
|
||
memset and value initialization afterwards.
|
||
|
||
2018-02-26 Christophe Lyon <christophe.lyon@linaro.org>
|
||
|
||
* Makefile.in (lto-wrapper): Use ALL_LINKERFLAGS.
|
||
|
||
2018-02-26 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
||
|
||
PR target/84521
|
||
* common/config/aarch64/aarch64-common.c
|
||
(aarch_option_optimization_table[]): Switch
|
||
off fomit-frame-pointer
|
||
|
||
2018-02-26 Kito Cheng <kito.cheng@gmail.com>
|
||
Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* config/nds32/nds32-multiple.md (load_multiple): Disallow
|
||
volatile memory.
|
||
(store_multiple): Ditto.
|
||
|
||
2018-02-26 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config.gcc: Add --with-cpu support for nds32 target.
|
||
* config/nds32/nds32-opts.h (nds32_cpu_type): New.
|
||
* config/nds32/nds32.opt: Add -mcpu= option.
|
||
|
||
2018-02-25 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.opt (mvrsave=no, mvrsave=yes, isel=no,
|
||
isel=yes): Warn for these deprecated options.
|
||
|
||
2018-02-23 David Edelsohn <dje.gcc@gmail.com>
|
||
|
||
* config/rs6000/aix71.h (TARGET_DEFAULT): Change to
|
||
ISA_2_5_MASKS_EMBEDDED.
|
||
|
||
2018-02-23 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* ipa-prop.c (ipa_vr_ggc_hash_traits::hash): Hash p->min and
|
||
p->max as pointers rather than using iterative_hash_expr.
|
||
|
||
2018-02-23 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/rs6000-builtin.def: Change VSIGNED2 and VUNSIGNED2
|
||
macro expansions from BU_VSX_2 to BU_P8V_VSX_2 and BU_VSX_OVERLOAD_2 to
|
||
BU_P8V_OVERLOAD_2.
|
||
* config/rs6000/rs6000-c.c: Change VSX_BUILTIN_VEC_VSIGNED2 to
|
||
P8V_BUILTIN_VEC_VSIGNED2. Change VSX_BUILTIN_VEC_VUNSIGNED2 to
|
||
P8V_BUILTIN_VEC_VUNSIGNED2.
|
||
|
||
2018-02-22 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/81572
|
||
* lra-int.h (LRA_UNKNOWN_ALT, LRA_NON_CLOBBERED_ALT): New macros.
|
||
* lra.c (lra_set_insn_recog_data, lra_update_insn_recog_data): Use
|
||
LRA_UNKNOWN_ALT.
|
||
* lra-constraints.c (curr_insn_transform): Set up
|
||
LRA_NON_CLOBBERED_ALT for moves processed on the fast path. Use
|
||
LRA_UNKNOWN_ALT.
|
||
(remove_inheritance_pseudos): Use LRA_UNKNOWN_ALT.
|
||
* lra-eliminations.c (spill_pseudos): Ditto.
|
||
(process_insn_for_elimination): Ditto.
|
||
* lra-lives.c (reg_early_clobber_p): Use the new macros.
|
||
* lra-spills.c (spill_pseudos): Use LRA_UNKNOWN_ALT and
|
||
LRA_NON_CLOBBERED_ALT.
|
||
|
||
2018-02-22 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/84480
|
||
* gimple-fold.c (gimple_fold_builtin_strcpy): Move warnings
|
||
to maybe_diag_stxncpy_trunc. Call it.
|
||
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Integrate warnings
|
||
from gimple_fold_builtin_strcpy. Print inlining stack.
|
||
(handle_builtin_stxncpy): Print inlining stack.
|
||
* tree-ssa-strlen.h (maybe_diag_stxncpy_trunc): Declare.
|
||
|
||
2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/84176
|
||
* config/i386/i386.c (ix86_set_indirect_branch_type): Issue an
|
||
error when -mindirect-branch=thunk-extern, -fcf-protection=branch
|
||
and -fcheck-pointer-bounds are used together.
|
||
(indirect_thunk_prefix): New enum.
|
||
(indirect_thunk_need_prefix): New function.
|
||
(indirect_thunk_name): Replace need_bnd_p with need_prefix. Use
|
||
"_nt" instead of "_bnd" for NOTRACK prefix.
|
||
(output_indirect_thunk): Replace need_bnd_p with need_prefix.
|
||
(output_indirect_thunk_function): Likewise.
|
||
(): Likewise.
|
||
(ix86_code_end): Update output_indirect_thunk_function calls.
|
||
(ix86_output_indirect_branch_via_reg): Replace
|
||
ix86_bnd_prefixed_insn_p with indirect_thunk_need_prefix.
|
||
(ix86_output_indirect_branch_via_push): Likewise.
|
||
(ix86_output_function_return): Likewise.
|
||
* doc/invoke.texi: Document -mindirect-branch=thunk-extern is
|
||
incompatible with -fcf-protection=branch and
|
||
-fcheck-pointer-bounds.
|
||
|
||
2018-02-22 Steve Ellcey <sellcey@cavium.com>
|
||
|
||
PR target/83335
|
||
* config/aarch64/aarch64.c (aarch64_print_address_internal):
|
||
Change gcc_assert call to output_operand_lossage.
|
||
|
||
2018-02-22 Steve Ellcey <sellcey@cavium.com>
|
||
|
||
* doc/extend.texi (__builtin_extend_pointer): Document builtin.
|
||
|
||
2018-02-22 DJ Delorie <dj@redhat.com>
|
||
Sebastian Perta <sebastian.perta@renesas.com>
|
||
Oleg Endo <olegendo@gcc.gnu.org>
|
||
|
||
* config/rx/rx.c (rx_rtx_costs): New function.
|
||
(TARGET_RTX_COSTS): Override to use rx_rtx_costs.
|
||
|
||
2018-02-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/t-multilib: Map Armv8-R to Armv7 multilibs.
|
||
|
||
2018-02-22 Martin Liska <mliska@suse.cz>
|
||
|
||
PR driver/83193
|
||
* common/config/arm/arm-common.c (arm_print_hint_for_cpu_option):
|
||
Add "native" as a possible value.
|
||
|
||
2018-02-22 Martin Liska <mliska@suse.cz>
|
||
|
||
PR driver/83193
|
||
* config/i386/i386.c (ix86_option_override_internal):
|
||
Add "native" as a possible value for -march and -mtune.
|
||
|
||
2018-02-22 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84502
|
||
* stor-layout.c (finalize_type_size): Propagate TYPE_EMPTY_P flag
|
||
to all type variants.
|
||
|
||
PR tree-optimization/84503
|
||
* gimple-ssa-store-merging.c (merged_store_group::merge_into): Compute
|
||
width as info->bitpos + info->bitsize - start.
|
||
(merged_store_group::merge_overlapping): Simplify width computation.
|
||
(check_no_overlap): New function.
|
||
(imm_store_chain_info::try_coalesce_bswap): Compute expected
|
||
start + width and last_order of the group, fail if check_no_overlap
|
||
fails.
|
||
(imm_store_chain_info::coalesce_immediate_stores): Don't merge info
|
||
to group if check_no_overlap fails.
|
||
|
||
2018-02-21 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/altivec.md: Delete contraint arguments to
|
||
define_expand, define_split, and define_peephole2, and in
|
||
define_insn_and_split if always unused.
|
||
* config/rs6000/darwin.md: Ditto.
|
||
* config/rs6000/dfp.md: Ditto.
|
||
* config/rs6000/rs6000.md: Ditto.
|
||
* config/rs6000/sync.md: Ditto.
|
||
* config/rs6000/vector.md: Ditto.
|
||
* config/rs6000/vsx.md: Ditto.
|
||
|
||
2018-02-21 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/altivec.md: Write output control strings as braced
|
||
blocks instead of double-quoted strings.
|
||
* config/rs6000/darwin.md: Ditto.
|
||
* config/rs6000/rs6000.md: Ditto.
|
||
* config/rs6000/vector.md: Ditto.
|
||
* config/rs6000/vsx.md: Ditto.
|
||
|
||
2018-02-21 Jason Merrill <jason@redhat.com>
|
||
|
||
PR c++/84314 - ICE with templates and fastcall attribute.
|
||
* attribs.c (build_type_attribute_qual_variant): Remove assert.
|
||
|
||
2018-02-21 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* ipa-cp.c (determine_versionability): Fix comment typos.
|
||
|
||
2018-02-21 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR c/84229
|
||
* ipa-cp.c (determine_versionability): Do not version functions caling
|
||
va_arg_pack.
|
||
|
||
2018-02-21 Martin Liska <mliska@suse.cz>
|
||
|
||
PR driver/83193
|
||
* config/aarch64/aarch64.c (aarch64_print_hint_for_core_or_arch):
|
||
Add "native" as a possible value.
|
||
* config/aarch64/aarch64.h (HAVE_LOCAL_CPU_DETECT): Define
|
||
the macro when native cpu detection is available.
|
||
|
||
2018-02-21 Martin Liska <mliska@suse.cz>
|
||
|
||
PR driver/83193
|
||
* common/config/arm/arm-common.c (arm_print_hint_for_arch_option):
|
||
Add "native" as a possible value.
|
||
* config/arm/arm.h (HAVE_LOCAL_CPU_DETECT): Define the macro
|
||
when native cpu detection is available.
|
||
|
||
2018-02-21 Jakub Jelinek <jakub@redhat.com>
|
||
Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/84478
|
||
* gimple-fold.h (get_range_strlen): Add a bool argument defaulted to
|
||
false.
|
||
* gimple-fold.c (get_range_strlen): Make minlen const and assume it
|
||
can't be NULL. Change FUZZY from bool to int, for 1 add PHI/COND_EXPR
|
||
support which is conservatively correct, for 2 only stay conservative
|
||
for maxlen. Formatting and comment capitalization fixes. Add STRICT
|
||
argument to the 2 argument get_range_strlen, adjust 6 arg
|
||
get_range_strlen caller and clear minmaxlen[0] and [1] if it returned
|
||
false.
|
||
(get_maxval_strlen): Adjust 6 arg get_range_strlen caller.
|
||
(gimple_fold_builtin_strlen): Pass true as last argument to
|
||
get_range_strlen.
|
||
|
||
2018-02-20 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR middle-end/84095
|
||
* gimple-ssa-warn-restrict.c (builtin_memref::extend_offset_range): New.
|
||
(builtin_memref::set_base_and_offset): Same. Handle inner references.
|
||
(builtin_memref::builtin_memref): Factor out parts into
|
||
set_base_and_offset and call it.
|
||
|
||
2018-02-20 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR middle-end/84406
|
||
* optabs-query.c (find_widening_optab_handler_and_mode): If from_mode
|
||
is a scalar_int_mode, assert that to_mode is a scalar_int_mode with
|
||
greater precision. If to_mode is a MODE_PARTIAL_INT, stop the
|
||
search at the associated MODE_INT.
|
||
|
||
2018-02-20 Jeff Law <law@redhat.com>
|
||
|
||
PR middle-end/82123
|
||
PR tree-optimization/81592
|
||
PR middle-end/79257
|
||
* gimple-ssa-sprintf.c (format_integer): Query EVRP range analyzer
|
||
for range data rather than using global data.
|
||
* gimple-ssa-sprintf.c (get_int_range): Query EVRP range analyzer for
|
||
range data rather than using global data.
|
||
* gimple-ssa-sprintf.c (get_int_range): Accept vr_values parameter
|
||
pass it to children as needed.
|
||
(struct directive::fmtresult): Similarly.
|
||
(struct directive::set_width): Similarly.
|
||
(struct directive::set_precision): Similarly.
|
||
(format_integer, format_directive, parse_directive): Similarly.
|
||
(format_none): Accept unnamed vr_values parameter.
|
||
(format_percent, format_floating, format_character): Similarly.
|
||
(format_string, format_plain): Similarly.
|
||
* gimple-ssa-sprintf.c (sprintf_dom_walker::handle_gimple_call): Query
|
||
the EVRP range analyzer for range data rather than using global data.
|
||
* gimple-ssa-sprintf.c: Include alloc-pool.h, vr-values.h and
|
||
gimple-ssa-evrp-analyze.h
|
||
(class sprintf_dom_walker): Add after_dom_children member function.
|
||
Add evrp_range_analyzer member.
|
||
(sprintf_dom_walker::before_dom_children): Call into the EVRP
|
||
range analyzer as needed.
|
||
(sprintf_dom_walker::after_dom_children): New member function.
|
||
* gimple-ssa-evrp-analyze.c (evrp_range_analyzer::enter): Do nothing
|
||
if not optimizing.
|
||
(evrp_range_analyzer::record_ranges_from_stmt): Likewise.
|
||
(evrp_range_analyzer::pop_to_marker): Likewise.
|
||
|
||
2018-02-20 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/84419
|
||
* internal-fn.c (expand_call_mem_ref): Create a TARGET_MEM_REF
|
||
with the required type if its current type is compatible but
|
||
different.
|
||
|
||
2018-02-20 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/82004
|
||
* match.pd (pow(C,x) -> exp(log(C)*x)): Delay all folding until
|
||
after vectorization.
|
||
|
||
2018-02-20 Martin Liska <mliska@suse.cz>
|
||
|
||
PR driver/83193
|
||
* config/aarch64/aarch64.c (aarch64_print_hint_for_core_or_arch): Print
|
||
possible values if we don't have a hint.
|
||
|
||
2018-02-20 Martin Liska <mliska@suse.cz>
|
||
|
||
PR c/84310
|
||
PR target/79747
|
||
* final.c (shorten_branches): Build align_tab array with one
|
||
more element.
|
||
* opts.c (finish_options): Add alignment option limit check.
|
||
(MAX_CODE_ALIGN): Likewise.
|
||
(MAX_CODE_ALIGN_VALUE): Likewise.
|
||
* doc/invoke.texi: Document maximum allowed option value for
|
||
all -falign-* options.
|
||
|
||
2018-02-19 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84146
|
||
* reg-notes.def (REG_CALL_ARG_LOCATION): New reg note.
|
||
* insn-notes.def (NOTE_INSN_CALL_ARG_LOCATION): Remove.
|
||
* var-tracking.c (emit_note_insn_var_location): Remove all references
|
||
to NOTE_INSN_CALL_ARG_LOCATION.
|
||
(emit_notes_in_bb): Emit arguments as REG_CALL_ARG_LOCATION note on
|
||
the CALL_INSN rather than separate NOTE_INSN_CALL_ARG_LOCATION note.
|
||
Use copy_rtx_if_shared.
|
||
* dwarf2out.c (gen_subprogram_die): Use XEXP with 0 instead of
|
||
NOTE_VAR_LOCATION on ca_loc->call_arg_loc_note.
|
||
(dwarf2out_var_location): Remove handling of
|
||
NOTE_INSN_CALL_ARG_LOCATION, instead handle REG_CALL_ARG_LOCATION note
|
||
on call_insn.
|
||
* final.c (final_scan_insn): Remove all references to
|
||
NOTE_INSN_CALL_ARG_LOCATION.
|
||
(rest_of_clean_state): Likewise. Remove REG_CALL_ARG_LOCATION notes
|
||
before dumping final insns.
|
||
* except.c (emit_note_eh_region_end): Remove all references to
|
||
NOTE_INSN_CALL_ARG_LOCATION.
|
||
* config/alpha/alpha.c (alpha_pad_function_end): Likewise.
|
||
* config/c6x/c6x.c (c6x_gen_bundles): Likewise.
|
||
* config/arc/arc.c (hwloop_optimize): Likewise.
|
||
* config/arm/arm.c (create_fix_barrier): Likewise.
|
||
* config/s390/s390.c (s390_chunkify_start): Likewise.
|
||
* config/sh/sh.c (find_barrier): Likewise.
|
||
* config/i386/i386.c (rest_of_insert_endbranch,
|
||
ix86_seh_fixup_eh_fallthru): Likewise.
|
||
* config/xtensa/xtensa.c (hwloop_optimize): Likewise.
|
||
* config/iq2000/iq2000.c (final_prescan_insn): Likewise.
|
||
* config/frv/frv.c (frv_function_prologue): Likewise.
|
||
* emit-rtl.c (try_split): Likewise. Copy over REG_CALL_ARG_LOCATION
|
||
reg note.
|
||
(note_outside_basic_block_p): Remove all references to
|
||
NOTE_INSN_CALL_ARG_LOCATION.
|
||
* gengtype.c (adjust_field_rtx_def): Likewise.
|
||
* print-rtl.c (rtx_writer::print_rtx_operand_code_0, print_insn):
|
||
Likewise.
|
||
* jump.c (cleanup_barriers, delete_related_insns): Likewise.
|
||
* cfgrtl.c (force_nonfallthru_and_redirect): Likewise.
|
||
|
||
PR c++/84444
|
||
* builtins.c (builtin_mathfn_code): Don't check if CALL_EXPR_FN (t)
|
||
is ADDR_EXPR.
|
||
|
||
PR tree-optimization/84452
|
||
* tree-vect-patterns.c (vect_recog_pow_pattern): Don't call
|
||
expand_simd_clones if targetm.simd_clone.compute_vecsize_and_simdlen
|
||
is NULL.
|
||
|
||
2018-02-19 Martin Liska <mliska@suse.cz>
|
||
|
||
PR sanitizer/82183
|
||
* passes.def: Put pass_sancov_O0 before pass_lower_switch with -O0.
|
||
|
||
2018-02-19 Martin Liska <mliska@suse.cz>
|
||
Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/82491
|
||
* gimple-fold.c (get_base_constructor): Make earlier bail out
|
||
to prevent ubsan.
|
||
|
||
2018-02-19 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/rs6000-builtin.def: Change NEG macro expansions from
|
||
BU_ALTIVEC_A to BU_P8V_AV_1 and BU_ALTIVEC_OVERLOAD_1 to
|
||
BU_P8V_OVERLOAD_1.
|
||
* config/rs6000/rs6000-c.c: Change ALTIVEC_BUILTIN_VEC_NEG to
|
||
P8V_BUILTIN_VEC_NEG.
|
||
|
||
2018-02-19 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.md (movdf): New define expand.
|
||
|
||
2018-02-19 Martin Liska <mliska@suse.cz>
|
||
|
||
PR other/80589
|
||
* doc/invoke.texi: Fix typo.
|
||
* params.def (PARAM_MAX_LOOP_HEADER_INSNS): Likewise.
|
||
|
||
2018-02-18 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_option_override_internal): Don't
|
||
handle rs6000_single_float and rs6000_double_float specially for
|
||
e500 family CPUs.
|
||
|
||
2018-02-16 Jeff Law <law@redhat.com>
|
||
|
||
* config/rx/rx.c (add_pop_cfi_notes): New function.;
|
||
(pop_regs): Use it.
|
||
|
||
2018-02-16 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR ipa/84425
|
||
* ipa-inline.c (inline_small_functions): Fix a typo.
|
||
|
||
2018-02-16 Nathan Sidwell <nathan@acm.org>
|
||
|
||
* doc/extend.texi (Backwards Compatibility): Americanize 'behaviour'.
|
||
|
||
2018-02-16 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/rs6000-builtin.def: Add BU_P8V_VSX_2 macro definition.
|
||
Change FLOAT2 expansions from BU_VSX_2 to BU_P8V_VSX_2 and
|
||
from BU_VSX_OVERLOAD_2 to BU_P8V_OVERLOAD_2.
|
||
* config/rs6000/rs6000-c.c: Changed macro VSX_BUILTIN_VEC_FLOAT2
|
||
expansion to P8V_BUILTIN_VEC_FLOAT2.
|
||
|
||
2018-02-16 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/70023
|
||
* lra-constraints.c (inherit_in_ebb): Take hard reg mode of
|
||
src_regno into account.
|
||
|
||
2018-02-16 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/altivec.h: Remove vec_vextract4b and vec_vinsert4b.
|
||
* config/rs6000/rs6000-builtin.def: Remove macro expansion for
|
||
VEXTRACT4B, VINSERT4B, VINSERT4B_DI and VEXTRACT4B.
|
||
* config/rs6000/rs6000.c: Remove case statements for
|
||
P9V_BUILTIN_VEXTRACT4B, P9V_BUILTIN_VEC_VEXTRACT4B,
|
||
P9V_BUILTIN_VINSERT4B, P9V_BUILTIN_VINSERT4B_DI,
|
||
and P9V_BUILTIN_VEC_VINSERT4B.
|
||
* config/rs6000/rs6000-c.c (altivec_expand_builtin): Remove entries for
|
||
P9V_BUILTIN_VEC_VEXTRACT4B and P9V_BUILTIN_VEC_VINSERT4B.
|
||
* config/rs6000/vsx.md:
|
||
* doc/extend.texi: Remove vec_vextract4b, non ABI definitions for
|
||
vec_insert4b.
|
||
|
||
2018-02-16 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/altivec.h: Add builtin names vec_extract4b
|
||
vec_insert4b.
|
||
* config/rs6000/rs6000-builtin.def: Add INSERT4B and EXTRACT4B
|
||
definitions.
|
||
* config/rs6000/rs6000-c.c: Add the definitions for
|
||
P9V_BUILTIN_VEC_EXTRACT4B and P9V_BUILTIN_VEC_INSERT4B.
|
||
* config/rs6000/rs6000.c (altivec_expand_builtin): Add
|
||
P9V_BUILTIN_EXTRACT4B and P9V_BUILTIN_INSERT4B case statements.
|
||
* config/rs6000/vsx.md: Add define_insn extract4b. Add define_expand
|
||
definition for insert4b and define insn *insert3b_internal.
|
||
* doc/extend.texi: Add documentation for vec_extract4b.
|
||
|
||
2018-02-16 Nathan Sidwell <nathan@acm.org>
|
||
|
||
* doc/extend.texi (Backwards Compatibility): Mention friend
|
||
injection. Note for-scope is deprecated.
|
||
* doc/invoke.texi (-ffriend-injection): Deprecate.
|
||
|
||
2018-02-16 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* combine.c (try_combine): When adjusting LOG_LINKS for the destination
|
||
that moved to I2, also allow destinations that are a paradoxical
|
||
subreg (instead of a normal reg).
|
||
|
||
2018-02-16 Oleg Endo <olegendo@gcc.gnu.org>
|
||
|
||
PR target/83831
|
||
* config/rx/rx.c (rx_fuse_in_memory_bitop): Convert shift operand
|
||
to QImode.
|
||
|
||
2018-02-16 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84037
|
||
PR tree-optimization/84016
|
||
PR target/82862
|
||
* config/i386/i386.c (ix86_builtin_vectorization_cost):
|
||
Adjust vec_construct for the fact we need additional higher latency
|
||
128bit inserts for AVX256 and AVX512 vector builds.
|
||
(ix86_add_stmt_cost): Scale vector construction cost for
|
||
elementwise loads.
|
||
|
||
2018-02-16 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84417
|
||
* tree-ssa.c (non_rewritable_mem_ref_base): Properly constrain
|
||
the MEM_REF offset when conversion to BIT_FIELD_REF is desired.
|
||
(non_rewritable_lvalue_p): Likewise, use poly-ints.
|
||
|
||
2018-02-16 Martin Liska <mliska@suse.cz>
|
||
|
||
PR sanitizer/84307
|
||
* internal-fn.def (ASAN_CHECK): Set proper flags.
|
||
(ASAN_MARK): Likewise.
|
||
|
||
2018-02-16 Julia Koval <julia.koval@intel.com>
|
||
|
||
* config/i386/i386.c (ix86_option_override_internal): Remove PTA_CLWB
|
||
from PTA_CANNONLAKE.
|
||
|
||
2018-02-16 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84272
|
||
* config/aarch64/cortex-a57-fma-steering.c (fma_forest::merge_forest):
|
||
Use ++iter rather than iter++ for std::list iterators.
|
||
(func_fma_steering::dfs): Likewise. Don't delete nodes right away,
|
||
defer deleting them until all nodes in the forest are processed. Do
|
||
free even leaf nodes. Change to_process into auto_vec.
|
||
|
||
PR bootstrap/84405
|
||
* system.h (BROKEN_VALUE_INITIALIZATION): Define for GCC < 4.3.
|
||
* vec.h (vec_default_construct): Use memset instead of placement new
|
||
if BROKEN_VALUE_INITIALIZATION is defined.
|
||
* hash-table.h (hash_table<Descriptor, Allocator>::empty_slow): Use
|
||
memset instead of value initialization if BROKEN_VALUE_INITIALIZATION
|
||
is defined.
|
||
|
||
PR rtl-optimization/83723
|
||
* lra-int.h (lra_substitute_pseudo): Add DEBUG_P argument.
|
||
* lra.c (lra_substitute_pseudo): Likewise. If true, use
|
||
gen_rtx_raw_SUBREG instead of gen_rtx_SUBREG. Pass DEBUG_P to
|
||
recursive calls.
|
||
(lra_substitute_pseudo_within_insn): Adjust lra_substitute_pseudo
|
||
callers.
|
||
* lra-constraints.c (inherit_reload_reg, split_reg): Likewise.
|
||
|
||
2018-02-16 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR rtl-optimization/81443
|
||
* rtlanal.c (num_sign_bit_copies1) <SUBREG>: Do not propagate results
|
||
from inner REGs to paradoxical SUBREGs.
|
||
|
||
2018-02-16 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84399
|
||
* graphite-scop-detection.c (scop_detection::stmt_simple_for_scop_p):
|
||
For operands we can analyze at their definition make sure we can
|
||
analyze them at each use as well.
|
||
|
||
2018-02-16 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84190
|
||
* tree-ssa.c (non_rewritable_mem_ref_base): Do not touch
|
||
volatile accesses if the decl isn't volatile.
|
||
|
||
2018-02-15 Jason Merrill <jason@redhat.com>
|
||
|
||
PR c++/84314 - ICE with templates and fastcall attribute.
|
||
* attribs.c (build_type_attribute_qual_variant): Don't clobber
|
||
TYPE_CANONICAL on an existing type.
|
||
|
||
2018-02-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/84383
|
||
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Don't look at
|
||
dstoff nor call operand_equal_p if dstbase is NULL.
|
||
|
||
PR tree-optimization/84334
|
||
* match.pd ((A +- CST1) +- CST2 -> A + CST3): If A is
|
||
also a CONSTANT_CLASS_P, punt.
|
||
|
||
2018-02-14 Jim Wilson <jimw@sifive.com>
|
||
|
||
* config/riscv/riscv.c (riscv_first_stack_step): Move locals after
|
||
first SMALL_OPERAND check. New local min_second_step. Move assert
|
||
to where locals are set. Add TARGET_RVC support.
|
||
* config/riscv/riscv.h (C_SxSP_BITS, SWSP_REACH, SDSP_REACH): New.
|
||
|
||
2018-02-14 Indu Bhagat <indu.bhagat@oracle.com>
|
||
|
||
* doc/invoke.texi: Correct -Wformat-overflow code sample.
|
||
|
||
2018-02-14 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83698
|
||
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For
|
||
arrays constrain the offset range to their bounds.
|
||
(builtin_access::strcat_overlap): Adjust the bounds of overlap offset.
|
||
(builtin_access::overlap): Avoid setting the size of overlap if it's
|
||
already been set.
|
||
(maybe_diag_overlap): Also consider arrays when deciding what values
|
||
of offsets to include in diagnostics.
|
||
|
||
2018-02-14 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR c/84108
|
||
* attribs.c (diag_attr_exclusions): Consider the exclusion(s)
|
||
that correspond to the kind of a declaration.
|
||
|
||
2018-02-14 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
PR target/83984
|
||
* config/pa/pa.md: Load address of PIC label using the linkage table
|
||
if the label is nonlocal.
|
||
|
||
2018-02-14 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_option_override_internal): Issue
|
||
warning message if user requests -maltivec=be.
|
||
* doc/invoke.texi: Document deprecation of -maltivec=be.
|
||
|
||
2018-02-14 Will Schmidt <will_schmidt@vnet.ibm.com>
|
||
|
||
PR target/84220
|
||
* config/rs6000/rs6000-c.c: Update definitions for
|
||
ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VEC_SLDW,
|
||
VEC_XXSLDWI and ALTIVEC_BUILTIN_VEC_XXPERMDI builtins.
|
||
|
||
2018-02-14 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
||
|
||
PR target/84239
|
||
* config/i386/cetintrin.h: Remove _rdssp[d|q] and
|
||
add _get_ssp intrinsics. Remove argument from
|
||
__builtin_ia32_rdssp[d|q].
|
||
* config/i386/i386-builtin-types.def: Add UINT_FTYPE_VOID.
|
||
* config/i386/i386-builtin.def: Remove argument from
|
||
__builtin_ia32_rdssp[d|q].
|
||
* config/i386/i386.c: Use UINT_FTYPE_VOID. Use
|
||
ix86_expand_special_args_builtin for _rdssp[d|q].
|
||
* config/i386/i386.md: Remove argument from rdssp[si|di] insn.
|
||
Clear register before usage.
|
||
* doc/extend.texi: Remove argument from __builtin_ia32_rdssp[d|q].
|
||
Add documentation for new _get_ssp and _inc_ssp intrinsics.
|
||
|
||
2018-02-14 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/84357
|
||
* tree-data-ref.c (object_address_invariant_in_loop_p): Check
|
||
operand 1 of an ARRAY_REF too.
|
||
|
||
2018-02-14 Oleg Endo <olegendo@gcc.gnu.org>
|
||
|
||
PR target/83831
|
||
* config/rx/rx-protos.h (rx_reg_dead_or_unused_after_insn,
|
||
rx_copy_reg_dead_or_unused_notes, rx_fuse_in_memory_bitop): New
|
||
declarations.
|
||
(set_of_reg): New struct.
|
||
(rx_find_set_of_reg, rx_find_use_of_reg): New functions.
|
||
* config/rx/rx.c (rx_reg_dead_or_unused_after_insn,
|
||
rx_copy_reg_dead_or_unused_notes, rx_fuse_in_memory_bitop): New
|
||
functions.
|
||
* config/rx/rx.md (andsi3, iorsi3, xorsi3): Convert to insn_and_split.
|
||
Split into bitclr, bitset, bitinvert patterns if appropriate.
|
||
(*bitset, *bitinvert, *bitclr): Convert to named insn_and_split and
|
||
use rx_fuse_in_memory_bitop.
|
||
(*bitset_in_memory, *bitinvert_in_memory, *bitclr_in_memory): Convert
|
||
to named insn, correct maximum insn length.
|
||
|
||
2018-02-14 Jozef Lawrynowicz <jozefl.gcc@gmail.com>
|
||
|
||
PR target/79242
|
||
* machmode.def: Define a complex mode for PARTIAL_INT.
|
||
* genmodes.c (complex_class): Return MODE_COMPLEX_INT for
|
||
MODE_PARTIAL_INT.
|
||
* doc/rtl.texi: Document CSPImode.
|
||
* config/msp430/msp430.c (msp430_hard_regno_nregs): Add CPSImode
|
||
handling.
|
||
(msp430_hard_regno_nregs_with_padding): Likewise.
|
||
|
||
2018-02-13 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/84279
|
||
* config/rs6000/rs6000.c (mem_operand_gpr): Disallow altivec addresses.
|
||
|
||
2018-02-13 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR rtl-optimization/84169
|
||
* combine.c (try_combine): New variable split_i2i3. Set it to true if
|
||
we generated a parallel as new i3 and we split that to new i2 and i3
|
||
instructions. Handle split_i2i3 similar to swap_i2i3: scan the
|
||
LOG_LINKs of i3 to see which of those need to link to i2 now. Link
|
||
those to i2, not i1. Partially rewrite this scan code.
|
||
|
||
2018-02-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c/82210
|
||
* stor-layout.c (place_field): For variable length fields, adjust
|
||
offset_align afterwards not just based on the field's alignment,
|
||
but also on the size.
|
||
|
||
PR middle-end/84309
|
||
* match.pd (pow(C,x) -> exp(log(C)*x)): Use exp2s and log2s instead
|
||
of exps and logs in the use_exp2 case.
|
||
|
||
2018-02-13 Jeff Law <law@redhat.com>
|
||
|
||
* config/rl/rl78.c (rl78_attribute_table): Fix terminator and
|
||
entry for "vector".
|
||
|
||
* config/rl78/rl78.c (rl78_handle_func_attribute): Mark
|
||
ARGS as unused.
|
||
|
||
2018-02-13 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
PR debug/84342
|
||
PR debug/84319
|
||
* common.opt (gas-loc-support, gas-locview-support): New.
|
||
(ginline-points, ginternal-reset-location-views): New.
|
||
* doc/invoke.texi: Document them. Use @itemx where intended.
|
||
(gvariable-location-views): Adjust.
|
||
* target.def (reset_location_view): New.
|
||
* doc/tm.texi.in (DWARF2_ASM_VIEW_DEBUG_INFO): New.
|
||
(TARGET_RESET_LOCATION_VIEW): New.
|
||
* doc/tm.texi: Rebuilt.
|
||
* dwarf2out.c (dwarf2out_default_as_loc_support): New.
|
||
(dwarf2out_default_as_locview_support): New.
|
||
(output_asm_line_debug_info): Use option variables.
|
||
(dwarf2out_maybe_output_loclist_view_pair): Likewise.
|
||
(output_loc_list): Likewise.
|
||
(add_high_low_attributes): Check option variables.
|
||
Don't output entry view attribute in strict mode.
|
||
(gen_inlined_subroutine_die): Check option variables.
|
||
(dwarf2out_inline_entry): Likewise.
|
||
(init_sections_and_labels): Likewise.
|
||
(dwarf2out_early_finish): Likewise.
|
||
(maybe_reset_location_view): New, from...
|
||
(dwarf2out_var_location): ... here. Call it.
|
||
* debug.h (dwarf2out_default_as_loc_support): Declare.
|
||
(dwarf2out_default_as_locview_support): Declare.
|
||
* hooks.c (hook_int_rtx_insn_0): New.
|
||
* hooks.h (hook_int_rtx_insn_0): Declare.
|
||
* toplev.c (process_options): Take -gas-loc-support and
|
||
-gas-locview-support from dwarf2out. Enable
|
||
-gvariable-location-views by default only with locview
|
||
assembler support. Enable -ginternal-reset-location-views by
|
||
default only if the target defines the corresponding hook.
|
||
Enable -ginline-points by default if location views are
|
||
enabled; force it disabled if statement frontiers are
|
||
disabled.
|
||
* tree-inline.c (expand_call_inline): Check option variables.
|
||
* tree-ssa-live.c (remove_unused_scope_block_p): Likewise.
|
||
|
||
2018-02-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/84321
|
||
* tree-vrp.c (intersect_range_with_nonzero_bits): Fix VR_ANTI_RANGE
|
||
handling. Also check whether the anti-range contains any values
|
||
that satisfy the mask; switch to a VR_RANGE if not.
|
||
|
||
2018-02-13 Paolo Bonzini <bonzini@gnu.org>
|
||
|
||
PR sanitizer/84340
|
||
* internal-fn.def (ASAN_CHECK, ASAN_MARK): Revert changes to fnspec.
|
||
|
||
2018-02-13 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR c++/83990
|
||
* ipa-param-manipulation.c (ipa_modify_call_arguments): Use location
|
||
of call statements, also set location of a load to a temporary.
|
||
|
||
2018-02-13 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.c (add_vector_labels): New function.
|
||
* config/rl78/rl78.c (rl78_handle_vector_attribute): New function.
|
||
* config/rl78/rl78.c (rl78_start_function): Call add_vector_labels.
|
||
* config/rl78/rl78.c (rl78_handle_func_attribute): Removed the assert
|
||
which checks that no arguments are passed.
|
||
* config/rl78/rl78.c (rl78_attribute_table): Add "vector" attribute.
|
||
* doc/extend.texi: Documentation for the new attribute.
|
||
|
||
2018-02-13 Andreas Schwab <schwab@suse.de>
|
||
|
||
* config/riscv/linux.h (CPP_SPEC): Define.
|
||
|
||
2018-02-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84335
|
||
* config/i386/i386.c (ix86_init_mmx_sse_builtins): Pass
|
||
OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2 instead of
|
||
OPTION_MASK_ISA_AES as first argument to def_builtin_const
|
||
for AES builtins. Pass OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2
|
||
instead of OPTION_MASK_ISA_PCLMUL as first argument to
|
||
def_builtin_const for __builtin_ia32_pclmulqdq128 builtin.
|
||
* config/i386/wmmintrin.h: If __SSE2__ is not defined, enable it
|
||
temporarily for AES and PCLMUL builtins.
|
||
|
||
PR tree-optimization/84339
|
||
* gimple-fold.c (get_range_strlen): Set *FLEXP to true when handling
|
||
ARRAY_REF where first operand is array_at_struct_end_p COMPONENT_REF.
|
||
Formatting fixes.
|
||
|
||
PR middle-end/84309
|
||
* match.pd (pow(C,x) -> exp(log(C)*x)): Optimize instead into
|
||
exp2(log2(C)*x) if C is a power of 2 and c99 runtime is available.
|
||
* generic-match-head.c (canonicalize_math_after_vectorization_p): New
|
||
inline function.
|
||
* gimple-match-head.c (canonicalize_math_after_vectorization_p): New
|
||
inline function.
|
||
* omp-simd-clone.h: New file.
|
||
* omp-simd-clone.c: Include omp-simd-clone.h.
|
||
(expand_simd_clones): No longer static.
|
||
* tree-vect-patterns.c: Include fold-const-call.h, attribs.h,
|
||
cgraph.h and omp-simd-clone.h.
|
||
(vect_recog_pow_pattern): Optimize pow(C,x) to exp(log(C)*x).
|
||
(vect_recog_widen_shift_pattern): Formatting fix.
|
||
(vect_pattern_recog_1): Don't check optab for calls.
|
||
|
||
PR target/84336
|
||
* config/i386/sse.md (<avx512>_vpermi2var<mode>3_mask): Force
|
||
operands[2] into a REG before using gen_lowpart on it.
|
||
|
||
2018-02-12 Jeff Law <law@redhat.com>
|
||
|
||
PR target/83760
|
||
* config/sh/sh.c (find_barrier): Consider a sibling call
|
||
a barrier as well.
|
||
|
||
* cse.c (try_back_substitute_reg): Move any REG_ARGS_SIZE note when
|
||
successfully back substituting a reg.
|
||
|
||
2018-02-12 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84037
|
||
* tree-vect-slp.c (vect_analyze_slp_cost): Add visited
|
||
parameter, move visited init to caller.
|
||
(vect_slp_analyze_operations): Separate cost from validity
|
||
check, initialize visited once for all instances.
|
||
(vect_schedule_slp): Analyze map to CSE vectorized nodes once
|
||
for all instances.
|
||
* tree-vect-stmts.c (vect_model_simple_cost): Make early
|
||
out an assert.
|
||
(vect_model_promotion_demotion_cost): Likewise.
|
||
(vectorizable_bswap): Guard cost modeling with !slp_node
|
||
instead of !PURE_SLP_STMT to avoid double-counting on hybrid
|
||
SLP stmts.
|
||
(vectorizable_call): Likewise.
|
||
(vectorizable_conversion): Likewise.
|
||
(vectorizable_assignment): Likewise.
|
||
(vectorizable_shift): Likewise.
|
||
(vectorizable_operation): Likewise.
|
||
(vectorizable_store): Likewise.
|
||
(vectorizable_load): Likewise.
|
||
(vectorizable_condition): Likewise.
|
||
(vectorizable_comparison): Likewise.
|
||
|
||
2018-02-12 Paolo Bonzini <bonzini@gnu.org>
|
||
|
||
PR sanitizer/84307
|
||
* internal-fn.def (ASAN_CHECK): Fix fnspec to account for return value.
|
||
(ASAN_MARK): Fix fnspec to account for return value, change pointer
|
||
argument from 'R' to 'W' so that the pointed-to datum is clobbered.
|
||
|
||
2018-02-08 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR middle-end/83665
|
||
* params.def (inline-min-speedup): Increase from 8 to 15.
|
||
(max-inline-insns-auto): Decrease from 40 to 30.
|
||
* ipa-split.c (consider_split): Add some buffer for function to
|
||
be considered inlining candidate.
|
||
* invoke.texi (max-inline-insns-auto, inline-min-speedup): UPdate
|
||
default values.
|
||
|
||
2018-02-12 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84037
|
||
* tree-vect-slp.c (vect_build_slp_tree_2): Try swapping the
|
||
matched stmts if we cannot swap the non-matched ones.
|
||
|
||
2018-02-12 Olga Makhotina <olga.makhotina@intel.com>
|
||
|
||
* config/i386/avx512fintrin.h (_mm_mask_scalef_round_sd,
|
||
_mm_maskz_scalef_round_sd, _mm_mask_scalef_round_ss,
|
||
_mm_maskz_scalef_round_ss): New intrinsics.
|
||
(__builtin_ia32_scalefsd_round, __builtin_ia32_scalefss_round): Fix.
|
||
* config/i386/i386-builtin.def (__builtin_ia32_scalefsd_round,
|
||
__builtin_ia32_scalefss_round): Remove.
|
||
(__builtin_ia32_scalefsd_mask_round,
|
||
__builtin_ia32_scalefss_mask_round): New intrinsics.
|
||
* config/i386/sse.md (vmscalef<mode><round_name>): Renamed to ...
|
||
(vmscalef<mode><mask_scalar_name><round_scalar_name>): ... this.
|
||
((match_operand:VF_128 2 "<round_nimm_predicate>"
|
||
"<round_constraint>")): Changed to ...
|
||
((match_operand:VF_128 2 "<round_scalar_nimm_predicate>"
|
||
"<round_scalar_constraint>")): ... this.
|
||
("vscalef<ssescalarmodesuffix>\t{<round_op3>%2, %1, %0|
|
||
%0, %1, %2<round_op3>}"): Changed to ...
|
||
("vscalef<ssescalarmodesuffix>\t{<round_scalar_mask_op3>%2, %1,
|
||
%0<mask_scalar_operand3>|%0<mask_scalar_operand3>, %1,
|
||
%2<round_scalar_mask_op3>}"): ... this.
|
||
* config/i386/subst.md (round_scalar_nimm_predicate): New.
|
||
|
||
2018-02-12 Olga Makhotina <olga.makhotina@intel.com>
|
||
|
||
* config/i386/avx512fintrin.h (_mm_mask_sqrt_round_sd)
|
||
(_mm_maskz_sqrt_round_sd, _mm_mask_sqrt_round_ss)
|
||
(_mm_maskz_sqrt_round_ss): New intrinsics.
|
||
(__builtin_ia32_sqrtsd_round, __builtin_ia32_sqrtss_round): Remove.
|
||
(__builtin_ia32_sqrtsd_mask_round)
|
||
(__builtin_ia32_sqrtss_mask_round): New builtins.
|
||
* config/i386/i386-builtin.def (__builtin_ia32_sqrtsd_round)
|
||
(__builtin_ia32_sqrtss_round): Remove.
|
||
(__builtin_ia32_sqrtsd_mask_round)
|
||
(__builtin_ia32_sqrtss_mask_round): New builtins.
|
||
* config/i386/sse.md (vmsqrt<mode>2<round_name>): Renamed to ...
|
||
(vmsqrt<mode>2<mask_scalar_name><round_scalar_name>): ... this.
|
||
((match_operand:VF_128 1 "vector_operand"
|
||
"xBm,<round_constraint>")): Changed to ...
|
||
((match_operand:VF_128 1 "vector_operand"
|
||
"xBm,<round_scalar_constraint>")): ... this.
|
||
(vsqrt<ssescalarmodesuffix>\t{<round_op3>%1, %2, %0|
|
||
%0, %2, %<iptr>1<round_op3>}): Changed to ...
|
||
(vsqrt<ssescalarmodesuffix>\t{<round_scalar_mask_op3>%1, %2,
|
||
%0<mask_scalar_operand3>|%0<mask_scalar_operand3>, %2,
|
||
%<iptr>1<round_scalar_mask_op3>}): ... this.
|
||
((set_attr "prefix" "<round_prefix>")): Changed to ...
|
||
((set_attr "prefix" "<round_scalar_prefix>")): ... this.
|
||
|
||
2018-02-11 Steven Munroe <munroesj@gcc.gnu.org>
|
||
|
||
PR target/84266
|
||
* config/rs6000/mmintrin.h (_mm_cmpeq_pi32 [_ARCH_PWR9]):
|
||
Cast vec_cmpeq result to correct type.
|
||
* config/rs6000/mmintrin.h (_mm_cmpgt_pi32 [_ARCH_PWR9]):
|
||
Cast vec_cmpgt result to correct type.
|
||
|
||
2018-02-11 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
* final.c (final_scan_insn_1): Renamed from...
|
||
(final_scan_insn): ... this. New wrapper, to recover
|
||
seen from the outermost call in recursive ones.
|
||
* config/sparc/sparc.c (output_return): Drop seen from call.
|
||
(output_sibcall): Likewise.
|
||
* config/visium/visium.c (output_branch): Likewise.
|
||
|
||
2018-02-10 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
* config/pa/pa.c (hppa_profile_hook): Mark SYMBOL_REF for _mcount as
|
||
function label.
|
||
|
||
2018-02-10 Alan Modra <amodra@gmail.com>
|
||
|
||
PR target/84300
|
||
* config/rs6000/rs6000.md (split_stack_return): Remove (use ..).
|
||
Specify LR as an input.
|
||
|
||
2018-02-10 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR sanitizer/83987
|
||
* omp-low.c (maybe_remove_omp_member_access_dummy_vars,
|
||
remove_member_access_dummy_vars): New functions.
|
||
(lower_omp_for, lower_omp_taskreg, lower_omp_target,
|
||
lower_omp_1, execute_lower_omp): Use them.
|
||
|
||
PR rtl-optimization/84308
|
||
* shrink-wrap.c (spread_components): Release todo vector.
|
||
|
||
2018-02-09 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/57193
|
||
* ira-color.c (struct allocno_color_data): Add member
|
||
conflict_allocno_hard_prefs.
|
||
(update_conflict_allocno_hard_prefs): New.
|
||
(bucket_allocno_compare_func): Add a preference based on
|
||
conflict_allocno_hard_prefs.
|
||
(push_allocno_to_stack): Update conflict_allocno_hard_prefs.
|
||
(color_allocnos): Remove a dead code. Initiate
|
||
conflict_allocno_hard_prefs. Call update_costs_from_prefs.
|
||
|
||
2018-02-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84226
|
||
* config/rs6000/vsx.md (p9_xxbrq_v16qi): Change input operand
|
||
constraint from =wa to wa. Avoid a subreg on the output operand,
|
||
instead use a pseudo and subreg it in a move.
|
||
(p9_xxbrd_<mode>): Changed to ...
|
||
(p9_xxbrd_v2di): ... this insn, without VSX_D iterator.
|
||
(p9_xxbrd_v2df): New expander.
|
||
(p9_xxbrw_<mode>): Changed to ...
|
||
(p9_xxbrw_v4si): ... this insn, without VSX_W iterator.
|
||
(p9_xxbrw_v4sf): New expander.
|
||
|
||
2018-02-09 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rx/rx.md (movsicc): Update expander to be matched by GCC.
|
||
|
||
2018-02-09 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/83926
|
||
* config/rs6000/vsx.md (vsx_mul_v2di): Handle generating a 64-bit
|
||
multiply in 32-bit mode.
|
||
(vsx_div_v2di): Handle generating a 64-bit signed divide in 32-bit mode.
|
||
(vsx_udiv_v2di): Handle generating a 64-bit unsigned divide in 32-bit
|
||
mode.
|
||
|
||
2018-02-09 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rx/constraints.md (CALL_OP_SYMBOL_REF): Added new constraint
|
||
to allow or block "symbol_ref" depending on the value of TARGET_JSR.
|
||
* config/rx/rx.md (call_internal): Use CALL_OP_SYMBOL_REF.
|
||
* config/rx/rx.md (call_value_internal): Use CALL_OP_SYMBOL_REF.
|
||
|
||
2018-02-09 Pierre-Marie de Rodat <derodat@adacore.com>
|
||
|
||
PR lto/84213
|
||
* dwarf2out.c (is_trivial_indirect_ref): New function.
|
||
(dwarf2out_late_global_decl): Do not generate a location
|
||
attribute for variables that have a non-trivial DECL_VALUE_EXPR
|
||
and that are not defined in the current unit.
|
||
|
||
2018-02-09 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* optabs.c (prepare_cmp_insn): Try harder to emit a direct comparison
|
||
instead of a libcall for UNORDERED.
|
||
|
||
2018-02-09 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR target/82641
|
||
* config/arm/arm-c.c (arm_cpu_builtins): Un-define __ARM_FEATURE_LDREX,
|
||
__ARM_ARCH_PROFILE, __ARM_ARCH_ISA_THUMB, __ARM_FP and __ARM_NEON_FP.
|
||
|
||
2018-02-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
||
|
||
PR target/PR84295
|
||
* config/s390/s390.c (s390_set_current_function): Invoke
|
||
s390_indirect_branch_settings also if fndecl didn't change.
|
||
|
||
2018-02-09 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
* config/rs6000/rs6000.md (blockage): Set length to zero.
|
||
|
||
2018-02-09 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* expr.c (optimize_bitfield_assignment_op): Remove obsolete assertion.
|
||
|
||
2018-02-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR sanitizer/84285
|
||
* gcc.c (STATIC_LIBASAN_LIBS, STATIC_LIBTSAN_LIBS,
|
||
STATIC_LIBLSAN_LIBS, STATIC_LIBUBSAN_LIBS): Handle -static like
|
||
-static-lib*san.
|
||
|
||
PR debug/84252
|
||
* var-tracking.c (vt_add_function_parameter): Punt for non-onepart
|
||
PARALLEL incoming that failed vt_get_decl_and_offset check.
|
||
|
||
PR middle-end/84237
|
||
* output.h (bss_initializer_p): Add NAMED argument, defaulted to false.
|
||
* varasm.c (bss_initializer_p): Add NAMED argument, if true, ignore
|
||
TREE_READONLY bit.
|
||
(get_variable_section): For decls in named .bss* sections pass true as
|
||
second argument to bss_initializer_p.
|
||
|
||
2018-02-09 Marek Polacek <polacek@redhat.com>
|
||
Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c++/83659
|
||
* fold-const.c (fold_indirect_ref_1): Use VECTOR_TYPE_P macro.
|
||
Formatting fixes. Verify first that tree_fits_poly_int64_p (op01).
|
||
Sync some changes from cxx_fold_indirect_ref.
|
||
|
||
2018-02-09 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
* cfgexpand.c (expand_gimple_basic_block): Handle inline entry
|
||
markers.
|
||
* dwarf2out.c (dwarf2_debug_hooks): Enable inline_entry hook.
|
||
(BLOCK_INLINE_ENTRY_LABEL): New.
|
||
(dwarf2out_var_location): Disregard inline entry markers.
|
||
(inline_entry_data): New struct.
|
||
(inline_entry_data_hasher): New hashtable type.
|
||
(inline_entry_data_hasher::hash): New.
|
||
(inline_entry_data_hasher::equal): New.
|
||
(inline_entry_data_table): New variable.
|
||
(add_high_low_attributes): Add DW_AT_entry_pc and
|
||
DW_AT_GNU_entry_view attributes if a pending entry is found
|
||
in inline_entry_data_table. Add old entry_pc attribute only
|
||
if debug nonbinding markers are disabled.
|
||
(gen_inlined_subroutine_die): Set BLOCK_DIE if nonbinding
|
||
markers are enabled.
|
||
(block_within_block_p, dwarf2out_inline_entry): New.
|
||
(dwarf2out_finish): Check that no entries remained in
|
||
inline_entry_data_table.
|
||
* final.c (reemit_insn_block_notes): Handle inline entry notes.
|
||
(final_scan_insn, notice_source_line): Likewise.
|
||
(rest_of_clean_state): Skip inline entry markers.
|
||
* gimple-pretty-print.c (dump_gimple_debug): Handle inline entry
|
||
markers.
|
||
* gimple.c (gimple_build_debug_inline_entry): New.
|
||
* gimple.h (enum gimple_debug_subcode): Add
|
||
GIMPLE_DEBUG_INLINE_ENTRY.
|
||
(gimple_build_debug_inline_entry): Declare.
|
||
(gimple_debug_inline_entry_p): New.
|
||
(gimple_debug_nonbind_marker_p): Adjust.
|
||
* insn-notes.def (INLINE_ENTRY): New.
|
||
* print-rtl.c (rtx_writer::print_rtx_operand_code_0): Handle
|
||
inline entry marker notes.
|
||
(print_insn): Likewise.
|
||
* rtl.h (NOTE_MARKER_P): Add INLINE_ENTRY support.
|
||
(INSN_DEBUG_MARKER_KIND): Likewise.
|
||
(GEN_RTX_DEBUG_MARKER_INLINE_ENTRY_PAT): New.
|
||
* tree-inline.c (expand_call_inline): Build and insert
|
||
debug_inline_entry stmt.
|
||
* tree-ssa-live.c (remove_unused_scope_block_p): Preserve
|
||
inline entry blocks early, if nonbind markers are enabled.
|
||
(dump_scope_block): Dump fragment info.
|
||
* var-tracking.c (reemit_marker_as_note): Handle inline entry note.
|
||
* doc/gimple.texi (gimple_debug_inline_entry_p): New.
|
||
(gimple_build_debug_inline_entry): New.
|
||
* doc/invoke.texi (gstatement-frontiers, gno-statement-frontiers):
|
||
Enable/disable inline entry points too.
|
||
* doc/rtl.texi (NOTE_INSN_INLINE_ENTRY): New.
|
||
(DEBUG_INSN): Describe inline entry markers.
|
||
|
||
* common.opt (gvariable-location-views): New.
|
||
(gvariable-location-views=incompat5): New.
|
||
* config.in: Rebuilt.
|
||
* configure: Rebuilt.
|
||
* configure.ac: Test assembler for view support.
|
||
* dwarf2asm.c (dw2_asm_output_symname_uleb128): New.
|
||
* dwarf2asm.h (dw2_asm_output_symname_uleb128): Declare.
|
||
* dwarf2out.c (var_loc_view): New typedef.
|
||
(struct dw_loc_list_struct): Add vl_symbol, vbegin, vend.
|
||
(dwarf2out_locviews_in_attribute): New.
|
||
(dwarf2out_locviews_in_loclist): New.
|
||
(dw_val_equal_p): Compare val_view_list of dw_val_class_view_lists.
|
||
(enum dw_line_info_opcode): Add LI_adv_address.
|
||
(struct dw_line_info_table): Add view.
|
||
(RESET_NEXT_VIEW, RESETTING_VIEW_P): New macros.
|
||
(DWARF2_ASM_VIEW_DEBUG_INFO): Define default.
|
||
(zero_view_p): New variable.
|
||
(ZERO_VIEW_P): New macro.
|
||
(output_asm_line_debug_info): New.
|
||
(struct var_loc_node): Add view.
|
||
(add_AT_view_list, AT_loc_list): New.
|
||
(add_var_loc_to_decl): Add view param. Test it against last.
|
||
(new_loc_list): Add view params. Record them.
|
||
(AT_loc_list_ptr): Handle loc and view lists.
|
||
(view_list_to_loc_list_val_node): New.
|
||
(print_dw_val): Handle dw_val_class_view_list.
|
||
(size_of_die): Likewise.
|
||
(value_format): Likewise.
|
||
(loc_list_has_views): New.
|
||
(gen_llsym): Set vl_symbol too.
|
||
(maybe_gen_llsym, skip_loc_list_entry): New.
|
||
(dwarf2out_maybe_output_loclist_view_pair): New.
|
||
(output_loc_list): Output view list or entries too.
|
||
(output_view_list_offset): New.
|
||
(output_die): Handle dw_val_class_view_list.
|
||
(output_dwarf_version): New.
|
||
(output_compilation_unit_header): Use it.
|
||
(output_skeleton_debug_sections): Likewise.
|
||
(output_rnglists, output_line_info): Likewise.
|
||
(output_pubnames, output_aranges): Update version comments.
|
||
(output_one_line_info_table): Output view numbers in asm comments.
|
||
(dw_loc_list): Determine current endview, pass it to new_loc_list.
|
||
Call maybe_gen_llsym.
|
||
(loc_list_from_tree_1): Adjust.
|
||
(add_AT_location_description): Create view list attribute if
|
||
needed, check it's absent otherwise.
|
||
(convert_cfa_to_fb_loc_list): Adjust.
|
||
(maybe_emit_file): Call output_asm_line_debug_info for test.
|
||
(dwarf2out_var_location): Reset views as needed. Precompute
|
||
add_var_loc_to_decl args. Call get_attr_min_length only if we have the
|
||
attribute. Set view.
|
||
(new_line_info_table): Reset next view.
|
||
(set_cur_line_info_table): Call output_asm_line_debug_info for test.
|
||
(dwarf2out_source_line): Likewise. Output view resets and labels to
|
||
the assembler, or select appropriate line info opcodes.
|
||
(prune_unused_types_walk_attribs): Handle dw_val_class_view_list.
|
||
(optimize_string_length): Catch it. Adjust.
|
||
(resolve_addr): Copy vl_symbol along with ll_symbol. Handle
|
||
dw_val_class_view_list, and remove it if no longer needed.
|
||
(hash_loc_list): Hash view numbers.
|
||
(loc_list_hasher::equal): Compare them.
|
||
(optimize_location_lists): Check whether a view list symbol is
|
||
needed, and whether the locview attribute is present, and
|
||
whether they match. Remove the locview attribute if no longer
|
||
needed.
|
||
(index_location_lists): Call skip_loc_list_entry for test.
|
||
(dwarf2out_finish): Call output_asm_line_debug_info for test.
|
||
Use output_dwarf_version.
|
||
* dwarf2out.h (enum dw_val_class): Add dw_val_class_view_list.
|
||
(struct dw_val_node): Add val_view_list.
|
||
* final.c (SEEN_NEXT_VIEW): New.
|
||
(set_next_view_needed): New.
|
||
(clear_next_view_needed): New.
|
||
(maybe_output_next_view): New.
|
||
(final_start_function): Rename to...
|
||
(final_start_function_1): ... this. Take pointer to FIRST,
|
||
add SEEN parameter. Emit param bindings in the initial view.
|
||
(final_start_function): Reintroduce SEEN-less interface.
|
||
(final): Rename to...
|
||
(final_1): ... this. Take SEEN parameter. Output final pending
|
||
next view at the end.
|
||
(final): Reintroduce seen-less interface.
|
||
(final_scan_insn): Output pending next view before switching
|
||
sections or ending a block. Mark the next view as needed when
|
||
outputting variable locations. Notify debug backend of section
|
||
changes, and of location view changes.
|
||
(rest_of_handle_final): Adjust.
|
||
* toplev.c (process_options): Autodetect value for debug variable
|
||
location views option. Warn on incompat5 without -gdwarf-5.
|
||
* doc/invoke.texi (gvariable-location-views): New.
|
||
(gvariable-location-views=incompat5): New.
|
||
(gno-variable-location-views): New.
|
||
|
||
2018-02-08 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR tree-optimization/84136
|
||
* tree-cfg.c (find_taken_edge_computed_goto): Remove assertion
|
||
that the result of find_edge is non-NULL.
|
||
|
||
2018-02-08 Sergey Shalnov <sergey.shalnov@intel.com>
|
||
|
||
PR target/83008
|
||
* config/i386/x86-tune-costs.h (skylake_cost): Fix cost of
|
||
storing integer register in SImode. Fix cost of 256 and 512
|
||
byte aligned SSE register store.
|
||
|
||
2018-02-08 Sergey Shalnov <sergey.shalnov@intel.com>
|
||
|
||
* config/i386/i386.c (ix86_multiplication_cost): Fix
|
||
multiplication cost for TARGET_AVX512DQ.
|
||
|
||
2018-02-08 Marek Polacek <polacek@redhat.com>
|
||
|
||
PR tree-optimization/84238
|
||
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Verify the result of
|
||
get_range_strlen.
|
||
|
||
2018-02-08 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/84265
|
||
* tree-vect-stmts.c (vectorizable_store): Don't treat
|
||
VMAT_CONTIGUOUS accesses as grouped.
|
||
(vectorizable_load): Likewise.
|
||
|
||
2018-02-08 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/81635
|
||
* wide-int.h (wi::round_down_for_mask, wi::round_up_for_mask): Declare.
|
||
* wide-int.cc (wi::round_down_for_mask, wi::round_up_for_mask)
|
||
(test_round_for_mask): New functions.
|
||
(wide_int_cc_tests): Call test_round_for_mask.
|
||
* tree-vrp.h (intersect_range_with_nonzero_bits): Declare.
|
||
* tree-vrp.c (intersect_range_with_nonzero_bits): New function.
|
||
* tree-data-ref.c (split_constant_offset_1): Use it to refine the
|
||
range returned by get_range_info.
|
||
|
||
2018-02-08 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR ipa/81360
|
||
* cgraph.h (symtab_node::output_to_lto_symbol_table_p): Declare
|
||
* symtab.c: Include builtins.h
|
||
(symtab_node::output_to_lto_symbol_table_p): Move here
|
||
from lto-streamer-out.c:output_symbol_p.
|
||
* lto-streamer-out.c (write_symbol): Turn early exit to assert.
|
||
(output_symbol_p): Move all logic to symtab.c
|
||
(produce_symtab): Update.
|
||
|
||
2018-02-08 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
||
|
||
* config/s390/s390-opts.h (enum indirect_branch): Define.
|
||
* config/s390/s390-protos.h (s390_return_addr_from_memory)
|
||
(s390_indirect_branch_via_thunk)
|
||
(s390_indirect_branch_via_inline_thunk): Add function prototypes.
|
||
(enum s390_indirect_branch_type): Define.
|
||
* config/s390/s390.c (struct s390_frame_layout, struct
|
||
machine_function): Remove.
|
||
(indirect_branch_prez10thunk_mask, indirect_branch_z10thunk_mask)
|
||
(indirect_branch_table_label_no, indirect_branch_table_name):
|
||
Define variables.
|
||
(INDIRECT_BRANCH_NUM_OPTIONS): Define macro.
|
||
(enum s390_indirect_branch_option): Define.
|
||
(s390_return_addr_from_memory): New function.
|
||
(s390_handle_string_attribute): New function.
|
||
(s390_attribute_table): Add new attribute handler.
|
||
(s390_execute_label): Handle UNSPEC_EXECUTE_JUMP patterns.
|
||
(s390_indirect_branch_via_thunk): New function.
|
||
(s390_indirect_branch_via_inline_thunk): New function.
|
||
(s390_function_ok_for_sibcall): When jumping via thunk disallow
|
||
sibling call optimization for non z10 compiles.
|
||
(s390_emit_call): Force indirect branch target to be a single
|
||
register. Add r1 clobber for non-z10 compiles.
|
||
(s390_emit_epilogue): Emit return jump via return_use expander.
|
||
(s390_reorg): Handle JUMP_INSNs as execute targets.
|
||
(s390_option_override_internal): Perform validity checks for the
|
||
new command line options.
|
||
(s390_indirect_branch_attrvalue): New function.
|
||
(s390_indirect_branch_settings): New function.
|
||
(s390_set_current_function): Invoke s390_indirect_branch_settings.
|
||
(s390_output_indirect_thunk_function): New function.
|
||
(s390_code_end): Implement target hook.
|
||
(s390_case_values_threshold): Implement target hook.
|
||
(TARGET_ASM_CODE_END, TARGET_CASE_VALUES_THRESHOLD): Define target
|
||
macros.
|
||
* config/s390/s390.h (struct s390_frame_layout)
|
||
(struct machine_function): Move here from s390.c.
|
||
(TARGET_INDIRECT_BRANCH_NOBP_RET)
|
||
(TARGET_INDIRECT_BRANCH_NOBP_JUMP)
|
||
(TARGET_INDIRECT_BRANCH_NOBP_JUMP_THUNK)
|
||
(TARGET_INDIRECT_BRANCH_NOBP_JUMP_INLINE_THUNK)
|
||
(TARGET_INDIRECT_BRANCH_NOBP_CALL)
|
||
(TARGET_DEFAULT_INDIRECT_BRANCH_TABLE)
|
||
(TARGET_INDIRECT_BRANCH_THUNK_NAME_EXRL)
|
||
(TARGET_INDIRECT_BRANCH_THUNK_NAME_EX)
|
||
(TARGET_INDIRECT_BRANCH_TABLE): Define macros.
|
||
* config/s390/s390.md (UNSPEC_EXECUTE_JUMP)
|
||
(INDIRECT_BRANCH_THUNK_REGNUM): Define constants.
|
||
(mnemonic attribute): Add values which aren't recognized
|
||
automatically.
|
||
("*cjump_long", "*icjump_long", "*basr", "*basr_r"): Disable
|
||
pattern for branch conversion. Fix mnemonic attribute.
|
||
("*c<code>", "*sibcall_br", "*sibcall_value_br", "*return"): Emit
|
||
indirect branch via thunk if requested.
|
||
("indirect_jump", "<code>"): Expand patterns for branch conversion.
|
||
("*indirect_jump"): Disable for branch conversion using out of
|
||
line thunks.
|
||
("indirect_jump_via_thunk<mode>_z10")
|
||
("indirect_jump_via_thunk<mode>")
|
||
("indirect_jump_via_inlinethunk<mode>_z10")
|
||
("indirect_jump_via_inlinethunk<mode>", "*casesi_jump")
|
||
("casesi_jump_via_thunk<mode>_z10", "casesi_jump_via_thunk<mode>")
|
||
("casesi_jump_via_inlinethunk<mode>_z10")
|
||
("casesi_jump_via_inlinethunk<mode>", "*basr_via_thunk<mode>_z10")
|
||
("*basr_via_thunk<mode>", "*basr_r_via_thunk_z10")
|
||
("*basr_r_via_thunk", "return<mode>_prez10"): New pattern.
|
||
("*indirect2_jump"): Disable for branch conversion.
|
||
("casesi_jump"): Turn into expander and expand patterns for branch
|
||
conversion.
|
||
("return_use"): New expander.
|
||
("*return"): Emit return via thunk and rename it to ...
|
||
("*return<mode>"): ... this one.
|
||
* config/s390/s390.opt: Add new options and and enum for the
|
||
option values.
|
||
|
||
2018-02-08 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* lra-constraints.c (match_reload): Unconditionally use
|
||
gen_lowpart_SUBREG, rather than selecting between that
|
||
and equivalent gen_rtx_SUBREG code.
|
||
|
||
2018-02-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84233
|
||
* tree-ssa-phiprop.c (propagate_with_phi): Use separate
|
||
changed flag instead of boguously re-using phi_inserted.
|
||
|
||
2018-02-08 Martin Jambor <mjambor@suse.cz>
|
||
|
||
* hsa-gen.c (get_symbol_for_decl): Set program allocation for
|
||
static local variables.
|
||
|
||
2018-02-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84278
|
||
* tree-vect-stmts.c (vectorizable_store): When looking for
|
||
smaller vector types to perform grouped strided loads/stores
|
||
make sure the mode is supported by the target.
|
||
(vectorizable_load): Likewise.
|
||
|
||
2018-02-08 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_components_for_bb):
|
||
Increase LDP/STP opportunities by adding adjacent callee-saves.
|
||
|
||
2018-02-08 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
PR rtl-optimization/84068
|
||
PR rtl-optimization/83459
|
||
* haifa-sched.c (rank_for_schedule): Fix SCHED_PRESSURE_MODEL sorting.
|
||
|
||
2018-02-08 Aldy Hernandez <aldyh@redhat.com>
|
||
|
||
PR tree-optimization/84224
|
||
* gimple-ssa-warn-alloca.c (pass_walloca::execute): Remove assert.
|
||
* calls.c (gimple_alloca_call_p): Only return TRUE when we have
|
||
non-zero arguments.
|
||
|
||
2018-02-07 Iain Sandoe <iain@codesourcery.com>
|
||
|
||
PR target/84113
|
||
* config/rs6000/altivec.md (*restore_world): Remove LR use.
|
||
* config/rs6000/predicates.md (restore_world_operation): Adjust op
|
||
count, remove one USE.
|
||
|
||
2018-02-07 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
* doc/install.texi (Configuration): Document the
|
||
--with-long-double-format={ibm,ieee} PowerPC configuration
|
||
options.
|
||
|
||
PR target/84154
|
||
* config/rs6000/rs6000.md (fix_trunc<SFDF:mode><QHI:mode>2):
|
||
Convert from define_expand to be define_insn_and_split. Rework
|
||
float/double/_Float128 conversions to QI/HI/SImode to work with
|
||
both ISA 2.07 (power8) or ISA 3.0 (power9). Fix regression where
|
||
conversions to QI/HImode types did a store and then a load to
|
||
truncate the value. For conversions to VSX registers, don't split
|
||
the insn, instead emit the code directly. Use the code iterator
|
||
any_fix to combine signed and unsigned conversions.
|
||
(fix<uns>_trunc<SFDF:mode>si2_p8): Likewise.
|
||
(fixuns_trunc<SFDF:mode><QHI:mode>2): Likewise.
|
||
(fix_trunc<IEEE128:mode><QHI:mode>2): Likewise.
|
||
(fix<uns>_trunc<SFDF:mode><QHI:mode>2): Likewise.
|
||
(fix_<mode>di2_hw): Likewise.
|
||
(fixuns_<mode>di2_hw): Likewise.
|
||
(fix_<mode>si2_hw): Likewise.
|
||
(fixuns_<mode>si2_hw): Likewise.
|
||
(fix<uns>_<IEEE128:mode><SDI:mode>2_hw): Likewise.
|
||
(fix<uns>_trunc<IEEE128:mode><QHI:mode>2): Likewise.
|
||
(fctiw<u>z_<mode>_smallint): Rename fctiw<u>z_<mode>_smallint to
|
||
fix<uns>_trunc<SFDF:mode>si2_p8.
|
||
(fix_trunc<SFDF:mode><QHI:mode>2_internal): Delete, no longer
|
||
used.
|
||
(fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
|
||
(fix<uns>_<mode>_mem): Likewise.
|
||
(fctiw<u>z_<mode>_mem): Likewise.
|
||
(fix<uns>_<mode>_mem): Likewise.
|
||
(fix<uns>_trunc<SFDF:mode><QHSI:mode>2_mem): On ISA 3.0, prevent
|
||
the register allocator from doing a direct move to the GPRs to do
|
||
a store, and instead use the ISA 3.0 store byte/half-word from
|
||
vector register instruction. For IEEE 128-bit floating point,
|
||
also optimize stores of 32-bit ints.
|
||
(fix<uns>_trunc<IEEE128:mode><QHSI:mode>2_mem): Likewise.
|
||
|
||
2018-02-07 Alan Hayward <alan.hayward@arm.com>
|
||
|
||
* genextract.c (push_pathstr_operand): New function to support
|
||
[a-zA-Z].
|
||
(walk_rtx): Call push_pathstr_operand.
|
||
(print_path): Support [a-zA-Z].
|
||
|
||
2018-02-07 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84037
|
||
* tree-vectorizer.h (struct _loop_vec_info): Add ivexpr_map member.
|
||
(cse_and_gimplify_to_preheader): Declare.
|
||
(vect_get_place_in_interleaving_chain): Likewise.
|
||
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
|
||
ivexpr_map.
|
||
(_loop_vec_info::~_loop_vec_info): Delete it.
|
||
(cse_and_gimplify_to_preheader): New function.
|
||
* tree-vect-slp.c (vect_get_place_in_interleaving_chain): Export.
|
||
* tree-vect-stmts.c (vectorizable_store): CSE base and steps.
|
||
(vectorizable_load): Likewise. For grouped stores always base
|
||
the IV on the first element.
|
||
* tree-vect-loop-manip.c (vect_loop_versioning): Unshare versioning
|
||
condition before gimplifying.
|
||
|
||
2018-02-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* tree-eh.c (operation_could_trap_helper_p): Ignore honor_trapv for
|
||
*DIV_EXPR and *MOD_EXPR.
|
||
|
||
2018-02-07 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/84248
|
||
* config/i386/i386.c (ix86_option_override_internal): Mask out
|
||
the CF_SET bit when checking -fcf-protection.
|
||
|
||
2018-02-07 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR libgomp/84217
|
||
* omp-expand.c (expand_oacc_collapse_init): Ensure diff_type is large
|
||
enough.
|
||
|
||
2018-02-07 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84204
|
||
* tree-chrec.c (chrec_fold_plus_1): Remove size limiting in
|
||
this place.
|
||
|
||
PR tree-optimization/84205
|
||
* graphite-isl-ast-to-gimple.c (binary_op_to_tree): Also
|
||
special-case isl_ast_op_zdiv_r.
|
||
|
||
PR tree-optimization/84223
|
||
* graphite-scop-detection.c (gather_bbs::before_dom_children):
|
||
Only add conditions from within the region.
|
||
(gather_bbs::after_dom_children): Adjust.
|
||
|
||
2018-02-07 Georg-Johann Lay <avr@gjlay.de>
|
||
|
||
PR target/84209
|
||
* config/avr/avr.h (GENERAL_REGNO_P, GENERAL_REG_P): New macros.
|
||
* config/avr/avr.md: Only post-reload split REG-REG moves if
|
||
either register is GENERAL_REG_P.
|
||
|
||
2018-02-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/84235
|
||
* tree-ssa-scopedtables.c
|
||
(avail_exprs_stack::simplify_binary_operation): Fir MINUS_EXPR, punt
|
||
if the subtraction is performed in floating point type where NaNs are
|
||
honored. For *DIV_EXPR, punt for ALL_FRACT_MODE_Ps where we can't
|
||
build 1. Formatting fix.
|
||
|
||
2018-02-06 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/84146
|
||
* config/i386/i386.c (rest_of_insert_endbranch): Only skip
|
||
NOTE_INSN_CALL_ARG_LOCATION after a call, not anything else,
|
||
and skip it regardless of bb boundaries. Use CALL_P macro,
|
||
don't test INSN_P (insn) together with CALL_P or JUMP_P check
|
||
unnecessarily, formatting fix.
|
||
|
||
2018-02-06 Michael Collison <michael.collison@arm.com>
|
||
|
||
* config/arm/thumb2.md:
|
||
(*thumb2_mov_negscc): Split only if TARGET_THUMB2 && !arm_restrict_it.
|
||
(*thumb_mov_notscc): Ditto.
|
||
|
||
2018-02-06 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
PR target/84154
|
||
* config/rs6000/rs6000.md (su code attribute): Use "u" for
|
||
unsigned_fix, not "s".
|
||
|
||
2018-02-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
|
||
|
||
* configure.ac (gcc_fn_eh_frame_ro): New function.
|
||
(gcc_cv_as_cfi_directive): Check both 32 and 64-bit assembler for
|
||
correct .eh_frame permissions.
|
||
* configure: Regenerate.
|
||
|
||
2018-02-06 Andrew Jenner <andrew@codeourcery.com>
|
||
|
||
* doc/invoke.texi: Add section for the PowerPC SPE backend. Remove
|
||
irrelevant options.
|
||
|
||
2018-02-06 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_option_override_internal):
|
||
Display warning message for -mno-speculate-indirect-jumps.
|
||
|
||
2018-02-06 Andrew Jenner <andrew@codesourcery.com>
|
||
|
||
* config/powerpcspe/powerpcspe.opt: (msimple-fpu, mfpu) Add
|
||
Undocumented.
|
||
* config/powerpcspe/sysv4.opt (mbit-align): Likewise.
|
||
|
||
2018-02-06 Aldy Hernandez <aldyh@redhat.com>
|
||
|
||
PR tree-optimization/84225
|
||
* tree-eh.c (find_trapping_overflow): Only call
|
||
operation_no_trapping_overflow when ANY_INTEGRAL_TYPE_P.
|
||
|
||
2018-02-06 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
||
|
||
PR target/84145
|
||
* config/i386/i386.c: Reimplement the check of possible options
|
||
-mibt/-mshstk conbination. Change error messages.
|
||
* doc/invoke.texi: Fix a typo: remove extra '='.
|
||
|
||
2018-02-06 Marek Polacek <polacek@redhat.com>
|
||
|
||
PR tree-optimization/84228
|
||
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Skip debug statements.
|
||
|
||
2018-02-06 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR target/82641
|
||
* config/arm/arm.c (arm_print_asm_arch_directives): Record already
|
||
emitted arch directives.
|
||
* config/arm/arm-c.c (arm_cpu_builtins): Undefine __ARM_ARCH and
|
||
__ARM_FEATURE_COPROC before changing architectures.
|
||
|
||
2018-02-06 Richard Biener <rguenther@suse.de>
|
||
|
||
* config/i386/i386.c (print_reg): Fix typo.
|
||
(ix86_loop_unroll_adjust): Do not unroll beyond the original nunroll.
|
||
|
||
2018-02-06 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* configure: Regenerate.
|
||
|
||
2018-02-05 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83369
|
||
* tree-ssa-ccp.c (pass_post_ipa_warn::execute): Use %G to print
|
||
inlining context.
|
||
|
||
2018-02-05 Martin Liska <mliska@suse.cz>
|
||
|
||
* doc/invoke.texi: Cherry-pick upstream r323995.
|
||
|
||
2018-02-05 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* ira.c (ira_init_register_move_cost): Adjust comment.
|
||
|
||
2018-02-05 Martin Liska <mliska@suse.cz>
|
||
|
||
PR gcov-profile/84137
|
||
* doc/gcov.texi: Fix typo in documentation.
|
||
|
||
2018-02-05 Martin Liska <mliska@suse.cz>
|
||
|
||
PR gcov-profile/83879
|
||
* doc/gcov.texi: Document necessity of --dynamic-list-data when
|
||
using dlopen functionality.
|
||
|
||
2018-02-05 Olga Makhotina <olga.makhotina@intel.com>
|
||
|
||
* config/i386/avx512dqintrin.h (_mm_mask_range_sd, _mm_maskz_range_sd,
|
||
_mm_mask_range_round_sd, _mm_maskz_range_round_sd, _mm_mask_range_ss,
|
||
_mm_maskz_range_ss, _mm_mask_range_round_ss,
|
||
_mm_maskz_range_round_ss): New intrinsics.
|
||
(__builtin_ia32_rangesd128_round)
|
||
(__builtin_ia32_rangess128_round): Remove.
|
||
(__builtin_ia32_rangesd128_mask_round,
|
||
__builtin_ia32_rangess128_mask_round): New builtins.
|
||
* config/i386/i386-builtin.def (__builtin_ia32_rangesd128_round,
|
||
__builtin_ia32_rangess128_round): Remove.
|
||
(__builtin_ia32_rangesd128_mask_round,
|
||
__builtin_ia32_rangess128_mask_round): New builtins.
|
||
* config/i386/sse.md (ranges<mode><round_saeonly_name>): Renamed to ...
|
||
(ranges<mode><mask_scalar_name><round_saeonly_scalar_name>): ... this.
|
||
((match_operand:VF_128 2 "<round_saeonly_nimm_predicate>"
|
||
"<round_saeonly_constraint>")): Changed to ...
|
||
((match_operand:VF_128 2 "<round_saeonly_scalar_nimm_predicate>"
|
||
"<round_saeonly_scalar_constraint>")): ... this.
|
||
("vrange<ssescalarmodesuffix>\t{%3, <round_saeonly_op4>%2, %1, %0|
|
||
%0, %1, %2<round_saeonly_op4>, %3}"): Changed to ...
|
||
("vrange<ssescalarmodesuffix>\t{%3, <round_saeonly_scalar_mask_op4>%2,
|
||
%1, %0<mask_scalar_operand4>|%0<mask_scalar_operand4>, %1,
|
||
%2<round_saeonly_scalar_mask_op4>, %3}"): ... this.
|
||
|
||
2018-02-02 Andrew Jenner <andrew@codesourcery.com>
|
||
|
||
* config/powerpcspe/powerpcspe.opt: Add Undocumented to irrelevant
|
||
options.
|
||
* config/powerpcspe/powerpcspe-tables.opt (rs6000_cpu_opt_value):
|
||
Remove all values except native, 8540 and 8548.
|
||
|
||
2018-02-02 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/i386.c (ix86_output_function_return): Pass
|
||
INVALID_REGNUM, instead of -1, as invalid register number to
|
||
indirect_thunk_name and output_indirect_thunk.
|
||
|
||
2018-02-02 Julia Koval <julia.koval@intel.com>
|
||
|
||
* config.gcc: Add -march=icelake.
|
||
* config/i386/driver-i386.c (host_detect_local_cpu): Detect icelake.
|
||
* config/i386/i386-c.c (ix86_target_macros_internal): Handle icelake.
|
||
* config/i386/i386.c (processor_costs): Add m_ICELAKE.
|
||
(PTA_ICELAKE, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES, PTA_AVX512VBMI2,
|
||
PTA_VPCLMULQDQ, PTA_RDPID, PTA_AVX512BITALG): New.
|
||
(processor_target_table): Add icelake.
|
||
(ix86_option_override_internal): Handle new PTAs.
|
||
(get_builtin_code_for_version): Handle icelake.
|
||
(M_INTEL_COREI7_ICELAKE): New.
|
||
(fold_builtin_cpu): Handle icelake.
|
||
* config/i386/i386.h (TARGET_ICELAKE, PROCESSOR_ICELAKE): New.
|
||
* doc/invoke.texi: Add -march=icelake.
|
||
|
||
2018-02-02 Julia Koval <julia.koval@intel.com>
|
||
|
||
* config/i386/i386.c (ix86_option_override_internal): Change flags type
|
||
to wide_int_bitmask.
|
||
* wide-int-bitmask.h: New.
|
||
|
||
2018-02-02 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
||
|
||
PR target/84066
|
||
* config/i386/i386.md: Replace Pmode with word_mode in
|
||
builtin_setjmp_setup and builtin_longjmp to support x32.
|
||
|
||
2018-02-01 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/56010
|
||
PR target/83743
|
||
* config/rs6000/driver-rs6000.c: #include "diagnostic.h".
|
||
#include "opts.h".
|
||
(rs6000_supported_cpu_names): New static variable.
|
||
(linux_cpu_translation_table): Likewise.
|
||
(elf_platform) <cpu>: Define new static variable and use it.
|
||
Translate kernel AT_PLATFORM name to canonical name if needed.
|
||
Error if platform name is unknown.
|
||
|
||
2018-02-01 Aldy Hernandez <aldyh@redhat.com>
|
||
|
||
PR target/84089
|
||
* config/pa/predicates.md (base14_operand): Handle E_VOIDmode.
|
||
|
||
2018-02-01 Jeff Law <law@redhat.com>
|
||
|
||
PR target/84128
|
||
* config/i386/i386.c (release_scratch_register_on_entry): Add new
|
||
OFFSET and RELEASE_VIA_POP arguments. Use SP+OFFSET to restore
|
||
the scratch if RELEASE_VIA_POP is false.
|
||
(ix86_adjust_stack_and_probe_stack_clash): Un-constify SIZE.
|
||
If we have to save a temporary register, decrement SIZE appropriately.
|
||
Pass new arguments to release_scratch_register_on_entry.
|
||
(ix86_adjust_stack_and_probe): Likewise.
|
||
(ix86_emit_probe_stack_range): Pass new arguments to
|
||
release_scratch_register_on_entry.
|
||
|
||
2018-02-01 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR rtl-optimization/84157
|
||
* combine.c (change_zero_ext): Use REG_P predicate in
|
||
front of HARD_REGISTER_P predicate.
|
||
|
||
2018-02-01 Georg-Johann Lay <avr@gjlay.de>
|
||
|
||
* config/avr/avr.c (avr_option_override): Move disabling of
|
||
-fdelete-null-pointer-checks to...
|
||
* common/config/avr/avr-common.c (avr_option_optimization_table):
|
||
...here.
|
||
|
||
2018-02-01 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/81635
|
||
* tree-data-ref.c (split_constant_offset_1): For types that
|
||
wrap on overflow, try to use range info to prove that wrapping
|
||
cannot occur.
|
||
|
||
2018-02-01 Renlin Li <renlin.li@arm.com>
|
||
|
||
PR target/83370
|
||
* config/aarch64/aarch64.c (aarch64_class_max_nregs): Handle
|
||
TAILCALL_ADDR_REGS.
|
||
(aarch64_register_move_cost): Likewise.
|
||
* config/aarch64/aarch64.h (reg_class): Rename CALLER_SAVE_REGS to
|
||
TAILCALL_ADDR_REGS.
|
||
(REG_CLASS_NAMES): Likewise.
|
||
(REG_CLASS_CONTENTS): Rename CALLER_SAVE_REGS to
|
||
TAILCALL_ADDR_REGS. Remove IP registers.
|
||
* config/aarch64/aarch64.md (Ucs): Update register constraint.
|
||
|
||
2018-02-01 Richard Biener <rguenther@suse.de>
|
||
|
||
* domwalk.h (dom_walker::dom_walker): Add additional constructor
|
||
for specifying RPO order and allow NULL for that.
|
||
* domwalk.c (dom_walker::dom_walker): Likewise.
|
||
(dom_walker::walk): Handle NULL RPO order.
|
||
* tree-into-ssa.c (rewrite_dom_walker): Do not walk dom children
|
||
in RPO order.
|
||
(rewrite_update_dom_walker): Likewise.
|
||
(mark_def_dom_walker): Likewise.
|
||
|
||
2018-02-01 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64-protos.h (aarch64_split_sve_subreg_move)
|
||
(aarch64_maybe_expand_sve_subreg_move): Declare.
|
||
* config/aarch64/aarch64.md (UNSPEC_REV_SUBREG): New unspec.
|
||
* config/aarch64/predicates.md (aarch64_any_register_operand): New
|
||
predicate.
|
||
* config/aarch64/aarch64-sve.md (mov<mode>): Optimize subreg moves
|
||
that are semantically a reverse operation.
|
||
(*aarch64_sve_mov<mode>_subreg_be): New pattern.
|
||
* config/aarch64/aarch64.c (aarch64_maybe_expand_sve_subreg_move):
|
||
(aarch64_replace_reg_mode, aarch64_split_sve_subreg_move): New
|
||
functions.
|
||
(aarch64_can_change_mode_class): For big-endian, forbid changes
|
||
between two SVE modes if they have different element sizes.
|
||
|
||
2018-02-01 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_expand_sve_const_vector): Prefer
|
||
the TImode handling for big-endian targets.
|
||
|
||
2018-02-01 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64-sve.md (sve_ld1rq): Replace with...
|
||
(*sve_ld1rq<Vesize>): ... this new pattern. Handle all element sizes,
|
||
not just bytes.
|
||
* config/aarch64/aarch64.c (aarch64_expand_sve_widened_duplicate):
|
||
Remove BSWAP handing for big-endian targets and use the form of
|
||
LD1RQ appropariate for the mode.
|
||
|
||
2018-02-01 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Handle
|
||
all CONST_VECTOR_DUPLICATE_P vectors, not just those with a single
|
||
duplicated element.
|
||
|
||
2018-02-01 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tearget/83845
|
||
* config/aarch64/aarch64.c (aarch64_secondary_reload): Tighten
|
||
check for operands that need to go through aarch64_sve_reload_be.
|
||
|
||
2018-02-01 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/81661
|
||
PR tree-optimization/84117
|
||
* tree-eh.h (rewrite_to_non_trapping_overflow): Declare.
|
||
* tree-eh.c: Include gimplify.h.
|
||
(find_trapping_overflow, replace_trapping_overflow,
|
||
rewrite_to_non_trapping_overflow): New functions.
|
||
* tree-vect-loop.c: Include tree-eh.h.
|
||
(vect_get_loop_niters): Use rewrite_to_non_trapping_overflow.
|
||
* tree-data-ref.c: Include tree-eh.h.
|
||
(get_segment_min_max): Use rewrite_to_non_trapping_overflow.
|
||
|
||
2018-01-31 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR rtl-optimization/84123
|
||
* combine.c (change_zero_ext): Check if hard register satisfies
|
||
can_change_dest_mode before calling gen_lowpart_SUBREG.
|
||
|
||
2018-01-31 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/82444
|
||
* ira.c (ira_init_register_move_cost): Remove assert.
|
||
|
||
2018-01-31 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR rtl-optimization/84071
|
||
* doc/tm.texi.in (WORD_REGISTER_OPERATIONS): Add explicit case.
|
||
* doc/tm.texi: Regenerate.
|
||
|
||
2018-01-31 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84132
|
||
* tree-data-ref.c (analyze_miv_subscript): Properly
|
||
check whether evolution_function_is_affine_multivariate_p
|
||
before calling gcd_of_steps_may_divide_p.
|
||
|
||
2018-01-31 Julia Koval <julia.koval@intel.com>
|
||
|
||
PR target/83618
|
||
* config/i386/i386.c (ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
|
||
* config/i386/i386.md (rdpid_rex64) New.
|
||
(rdpid): Make 32bit only.
|
||
|
||
2018-01-29 Aldy Hernandez <aldyh@redhat.com>
|
||
|
||
PR lto/84105
|
||
* tree-pretty-print.c (dump_generic_node): Handle a TYPE_NAME with
|
||
an IDENTIFIER_NODE for FUNCTION_TYPE's.
|
||
|
||
2018-01-31 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
Revert
|
||
2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
|
||
|
||
2018-01-31 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR rtl-optimization/84071
|
||
* combine.c (record_dead_and_set_regs_1): Record the source unmodified
|
||
for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.
|
||
|
||
2018-01-31 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (arc_handle_aux_attribute): New function.
|
||
(arc_attribute_table): Add 'aux' attribute.
|
||
(arc_in_small_data_p): Consider aux like variables.
|
||
(arc_is_aux_reg_p): New function.
|
||
(arc_asm_output_aligned_decl_local): Ignore 'aux' like variables.
|
||
(arc_get_aux_arg): New function.
|
||
(prepare_move_operands): Handle aux-register access.
|
||
(arc_handle_aux_attribute): New function.
|
||
* doc/extend.texi (ARC Variable attributes): Add subsection.
|
||
|
||
2018-01-31 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc-protos.h (arc_is_uncached_mem_p): Function proto.
|
||
* config/arc/arc.c (arc_handle_uncached_attribute): New function.
|
||
(arc_attribute_table): Add 'uncached' attribute.
|
||
(arc_print_operand): Print '.di' flag for uncached memory
|
||
accesses.
|
||
(arc_in_small_data_p): Do not consider for small data the uncached
|
||
types.
|
||
(arc_is_uncached_mem_p): New function.
|
||
* config/arc/predicates.md (compact_store_memory_operand): Check
|
||
for uncached memory accesses.
|
||
(nonvol_nonimm_operand): Likewise.
|
||
* gcc/doc/extend.texi (ARC Type Attribute): New subsection.
|
||
|
||
2018-01-31 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c/84100
|
||
* common.opt (falign-functions=, falign-jumps=, falign-labels=,
|
||
falign-loops=): Add Optimization flag.
|
||
|
||
2018-01-30 Jeff Law <law@redhat.com>
|
||
|
||
PR target/84064
|
||
* i386.c (ix86_adjust_stack_and_probe_stack_clash): New argument
|
||
INT_REGISTERS_SAVED. Check it prior to calling
|
||
get_scratch_register_on_entry.
|
||
(ix86_adjust_stack_and_probe): Similarly.
|
||
(ix86_emit_probe_stack_range): Similarly.
|
||
(ix86_expand_prologue): Corresponding changes.
|
||
|
||
2018-01-30 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
|
||
|
||
PR target/40411
|
||
* config/sol2.h (STARTFILE_ARCH_SPEC): Use -std=c*,
|
||
-std=iso9899:199409 instead of -pedantic to select values-Xc.o.
|
||
|
||
2018-01-30 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/84112
|
||
* lra-constraints.c (curr_insn_transform): Process AND in the
|
||
address.
|
||
|
||
2018-01-30 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/83986
|
||
* sched-deps.c (sched_analyze_insn): For frame related insns, add anti
|
||
dependence against last_pending_memory_flush in addition to
|
||
pending_jump_insns.
|
||
|
||
2018-01-30 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
PR tree-optimization/81611
|
||
* tree-ssa-dom.c (simple_iv_increment_p): Skip intervening
|
||
copies.
|
||
|
||
2018-01-30 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
|
||
|
||
PR target/83758
|
||
* config/rs6000/rs6000.c (rs6000_internal_arg_pointer): Only return
|
||
a reg rtx.
|
||
|
||
2018-01-30 Richard Biener <rguenther@suse.de>
|
||
Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/84111
|
||
* tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1): Skip
|
||
inner loops added during recursion, as they don't have up-to-date
|
||
SSA form.
|
||
|
||
2018-01-30 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR ipa/81360
|
||
* ipa-inline.c (can_inline_edge_p): Break out late tests to...
|
||
(can_inline_edge_by_limits_p): ... here.
|
||
(can_early_inline_edge_p, check_callers,
|
||
update_caller_keys, update_callee_keys, recursive_inlining,
|
||
add_new_edges_to_heap, speculation_useful_p,
|
||
inline_small_functions,
|
||
inline_small_functions, flatten_function,
|
||
inline_to_all_callers_1): Update.
|
||
|
||
2018-01-30 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* profile-count.c (profile_count::combine_with_ipa_count): Handle
|
||
zeros correctly.
|
||
|
||
2018-01-30 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83008
|
||
* tree-vect-slp.c (vect_analyze_slp_cost_1): Properly cost
|
||
invariant and constant vector uses in stmts when they need
|
||
more than one stmt.
|
||
|
||
2018-01-30 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
|
||
|
||
PR bootstrap/84017
|
||
* configure.ac (gcc_cv_as_shf_merge): Disable on Solaris 10/x86.
|
||
* configure: Regenerate.
|
||
|
||
2018-01-30 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64-sve.md (*vec_extract<mode><Vel>_0): New
|
||
pattern.
|
||
(*vec_extract<mode><Vel>_v128): Require a nonzero lane number.
|
||
Use gen_rtx_REG rather than gen_lowpart.
|
||
|
||
2018-01-30 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* lra-constraints.c (match_reload): Use subreg_lowpart_offset
|
||
rather than 0 when creating partial subregs.
|
||
|
||
2018-01-30 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* vec-perm-indices.c (vec_perm_indices::series_p): Give examples
|
||
of usage.
|
||
|
||
2018-01-29 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
PR target/81550
|
||
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode
|
||
and SFmode can go in Altivec registers (-mcpu=power7 for DFmode,
|
||
-mcpu=power8 for SFmode) don't set the PRE_INCDEC or PRE_MODIFY
|
||
flags. This restores the settings used before the 2017-07-24.
|
||
Turning off pre increment/decrement/modify allows IVOPTS to
|
||
optimize DF/SF loops where the index is an int.
|
||
|
||
2018-01-29 Richard Biener <rguenther@suse.de>
|
||
Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||
|
||
PR bootstrap/80867
|
||
* tree-vect-stmts.c (vectorizable_call): Don't call
|
||
targetm.vectorize_builtin_md_vectorized_function if callee is
|
||
NULL.
|
||
|
||
2018-01-22 Carl Love <cel@us.ibm.com>
|
||
|
||
* doc/extend.tex: Fix typo in second arg in
|
||
__builtin_bcdadd_{lt|eq|gt|ov} and __builtin_bcdsub_{lt|eq|gt|ov}.
|
||
|
||
2018-01-29 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84086
|
||
* tree-ssanames.c: Include cfgloop.h and tree-scalar-evolution.h.
|
||
(flush_ssaname_freelist): When SSA names were released reset
|
||
the SCEV hash table.
|
||
|
||
2018-01-29 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/84057
|
||
* tree-ssa-loop-ivcanon.c (unloop_loops): Deal with already
|
||
removed paths when removing edges.
|
||
|
||
2018-01-27 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* doc/invoke.texi: Replace -mfunction-return==@var{choice} with
|
||
-mfunction-return=@var{choice}.
|
||
|
||
2018-01-27 Bernd Edlinger <bernd.edlinger@hotmail.de>
|
||
|
||
PR diagnostic/84034
|
||
* diagnostic-show-locus.c (get_line_width_without_trailing_whitespace):
|
||
Handle CR like TAB.
|
||
(layout::print_source_line): Likewise.
|
||
(test_get_line_width_without_trailing_whitespace): Add test cases.
|
||
|
||
2018-01-27 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/84040
|
||
* sched-deps.c (sched_macro_fuse_insns): Return immediately for
|
||
debug insns.
|
||
|
||
2018-01-26 Jim Wilson <jimw@sifive.com>
|
||
|
||
* config/riscv/riscv.h (MAX_FIXED_MODE_SIZE): New.
|
||
|
||
* config/riscv/elf.h (LIB_SPEC): Don't include -lgloss when nosys.specs
|
||
specified.
|
||
|
||
2018-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS
|
||
and CMP + SUB-immediate -> SUBS.
|
||
|
||
2018-01-26 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83896
|
||
* tree-ssa-strlen.c (get_string_len): Rename...
|
||
(get_string_cst_length): ...to this. Return HOST_WIDE_INT.
|
||
Avoid assuming length is constant.
|
||
(handle_char_store): Use HOST_WIDE_INT for string length.
|
||
|
||
2018-01-26 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/81763
|
||
* config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
|
||
to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
|
||
|
||
2018-01-26 Richard Biener <rguenther@suse.de>
|
||
|
||
PR rtl-optimization/84003
|
||
* dse.c (record_store): Only record redundant stores when
|
||
the earlier store aliases at least all accesses the later one does.
|
||
|
||
2018-01-26 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/83985
|
||
* dce.c (deletable_insn_p): Return false for separate shrink wrapping
|
||
REG_CFA_RESTORE insns.
|
||
(delete_unmarked_insns): Don't ignore separate shrink wrapping
|
||
REG_CFA_RESTORE insns here.
|
||
|
||
PR c/83989
|
||
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Don't
|
||
use SSA_NAME_VAR as base for SSA_NAMEs with non-NULL SSA_NAME_VAR.
|
||
|
||
2018-01-26 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
|
||
* config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
|
||
(arc_init): Likewise.
|
||
(arc_override_options): Likewise.
|
||
(arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
|
||
value.
|
||
(hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
|
||
support.
|
||
* config/arc/arc.h (TARGET_DBNZ): Define.
|
||
* config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
|
||
properly set the tune attribute.
|
||
(dbnz): Use TARGET_DBNZ guard.
|
||
* config/arc/arc.opt (mtune): Add core3 option.
|
||
|
||
2018-01-26 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (arc_delegitimize_address_0): Refactored to
|
||
recognize new pic like addresses.
|
||
(arc_delegitimize_address): Clean up.
|
||
|
||
2018-01-26 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc-arches.def: Option mrf16 valid for all
|
||
architectures.
|
||
* config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
|
||
* config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
|
||
* config/arc/arc-options.def (FL_RF16): Add mrf16 option.
|
||
* config/arc/arc-tables.opt: Regenerate.
|
||
* config/arc/arc.c (arc_conditional_register_usage): Handle
|
||
reduced register file case.
|
||
(arc_file_start): Set must have build attributes.
|
||
* config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
|
||
mrf16 option value.
|
||
* config/arc/arc.opt (mrf16): Add new option.
|
||
* config/arc/elf.h (ATTRIBUTE_PCS): Define.
|
||
* config/arc/genmultilib.awk: Handle new mrf16 option.
|
||
* config/arc/linux.h (ATTRIBUTE_PCS): Define.
|
||
* config/arc/t-multilib: Regenerate.
|
||
* doc/invoke.texi (ARC Options): Document mrf16 option.
|
||
|
||
2018-01-26 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc-protos.h: Add arc_is_secure_call_p proto.
|
||
* config/arc/arc.c (arc_handle_secure_attribute): New function.
|
||
(arc_attribute_table): Add 'secure_call' attribute.
|
||
(arc_print_operand): Print secure call operand.
|
||
(arc_function_ok_for_sibcall): Don't optimize tail calls when
|
||
secure.
|
||
(arc_is_secure_call_p): New function. * config/arc/arc.md
|
||
(call_i): Add support for sjli instruction.
|
||
(call_value_i): Likewise.
|
||
* config/arc/constraints.md (Csc): New constraint.
|
||
|
||
2018-01-26 Claudiu Zissulescu <claziss@synopsys.com>
|
||
John Eric Martin <John.Martin@emmicro-us.com>
|
||
|
||
* config/arc/arc-protos.h: Add arc_is_jli_call_p proto.
|
||
* config/arc/arc.c (_arc_jli_section): New struct.
|
||
(arc_jli_section): New type.
|
||
(rc_jli_sections): New static variable.
|
||
(arc_handle_jli_attribute): New function.
|
||
(arc_attribute_table): Add jli_always and jli_fixed attribute.
|
||
(arc_file_end): New function.
|
||
(TARGET_ASM_FILE_END): Define.
|
||
(arc_print_operand): Reuse 'S' letter for JLI output instruction.
|
||
(arc_add_jli_section): New function.
|
||
(jli_call_scan): Likewise.
|
||
(arc_reorg): Call jli_call_scan.
|
||
(arc_output_addsi): Remove 'S' from printing asm operand.
|
||
(arc_is_jli_call_p): New function.
|
||
* config/arc/arc.md (movqi_insn): Remove 'S' from printing asm
|
||
operand.
|
||
(movhi_insn): Likewise.
|
||
(movsi_insn): Likewise.
|
||
(movsi_set_cc_insn): Likewise.
|
||
(loadqi_update): Likewise.
|
||
(load_zeroextendqisi_update): Likewise.
|
||
(load_signextendqisi_update): Likewise.
|
||
(loadhi_update): Likewise.
|
||
(load_zeroextendhisi_update): Likewise.
|
||
(load_signextendhisi_update): Likewise.
|
||
(loadsi_update): Likewise.
|
||
(loadsf_update): Likewise.
|
||
(movsicc_insn): Likewise.
|
||
(bset_insn): Likewise.
|
||
(bxor_insn): Likewise.
|
||
(bclr_insn): Likewise.
|
||
(bmsk_insn): Likewise.
|
||
(bicsi3_insn): Likewise.
|
||
(cmpsi_cc_c_insn): Likewise.
|
||
(movsi_ne): Likewise.
|
||
(movsi_cond_exec): Likewise.
|
||
(clrsbsi2): Likewise.
|
||
(norm_f): Likewise.
|
||
(normw): Likewise.
|
||
(swap): Likewise.
|
||
(divaw): Likewise.
|
||
(flag): Likewise.
|
||
(sr): Likewise.
|
||
(kflag): Likewise.
|
||
(ffs): Likewise.
|
||
(ffs_f): Likewise.
|
||
(fls): Likewise.
|
||
(call_i): Remove 'S' asm letter, add jli instruction.
|
||
(call_value_i): Likewise.
|
||
* config/arc/arc.op (mjli-always): New option.
|
||
* config/arc/constraints.md (Cji): New constraint.
|
||
* config/arc/fpx.md (addsf3_fpx): Remove 'S' from printing asm
|
||
operand.
|
||
(subsf3_fpx): Likewise.
|
||
(mulsf3_fpx): Likewise.
|
||
* config/arc/simdext.md (vendrec_insn): Remove 'S' from printing
|
||
asm operand.
|
||
* doc/extend.texi (ARC): Document 'jli-always' and 'jli-fixed'
|
||
function attrbutes.
|
||
* doc/invoke.texi (ARC): Document mjli-always option.
|
||
|
||
2018-01-26 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.c (rl78_addsi3_internal): If operand 2 is const
|
||
avoid addition with 0 and use incw and decw where possible.
|
||
|
||
2018-01-26 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/81082
|
||
* fold-const.c (fold_plusminus_mult_expr): Do not perform the
|
||
association if it requires casting to unsigned.
|
||
* match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
|
||
from fold_plusminus_mult_expr to catch important cases late when
|
||
range info is available.
|
||
|
||
2018-01-26 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
|
||
|
||
* config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
|
||
* configure.ac (hidden_linkonce): New test.
|
||
* configure: Regenerate.
|
||
* config.in: Regenerate.
|
||
|
||
2018-01-26 Julia Koval <julia.koval@intel.com>
|
||
|
||
* config/i386/avx512bitalgintrin.h (_mm512_bitshuffle_epi64_mask,
|
||
_mm512_mask_bitshuffle_epi64_mask, _mm256_bitshuffle_epi64_mask,
|
||
_mm256_mask_bitshuffle_epi64_mask, _mm_bitshuffle_epi64_mask,
|
||
_mm_mask_bitshuffle_epi64_mask): Fix type.
|
||
* config/i386/i386-builtin-types.def (UHI_FTYPE_V2DI_V2DI_UHI,
|
||
USI_FTYPE_V4DI_V4DI_USI): Remove.
|
||
* config/i386/i386-builtin.def (__builtin_ia32_vpshufbitqmb512_mask,
|
||
__builtin_ia32_vpshufbitqmb256_mask,
|
||
__builtin_ia32_vpshufbitqmb128_mask): Fix types.
|
||
* config/i386/i386.c (ix86_expand_args_builtin): Remove old types.
|
||
* config/i386/sse.md (VI1_AVX512VLBW): Change types.
|
||
|
||
2018-01-26 Alan Modra <amodra@gmail.com>
|
||
|
||
PR target/84033
|
||
* config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Exclude
|
||
UNSPEC_VBPERMQ. Sort other unspecs.
|
||
|
||
2018-01-25 David Edelsohn <dje.gcc@gmail.com>
|
||
|
||
* doc/invoke.texi (PowerPC Options): Document 'native' cpu type.
|
||
|
||
2018-01-25 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR middle-end/83055
|
||
* predict.c (drop_profile): Do not push/pop cfun; update also
|
||
node->count.
|
||
(handle_missing_profiles): Fix logic looking for zero profiles.
|
||
|
||
2018-01-25 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/83977
|
||
* ipa-fnsummary.c (compute_fn_summary): Clear can_change_signature
|
||
on functions with #pragma omp declare simd or functions with simd
|
||
attribute.
|
||
* omp-simd-clone.c (expand_simd_clones): Revert 2018-01-24 change.
|
||
* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
|
||
Remove trailing \n from warning_at calls.
|
||
|
||
2018-01-25 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/84028
|
||
* config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
|
||
for neutered workers.
|
||
|
||
2018-01-24 Joseph Myers <joseph@codesourcery.com>
|
||
|
||
PR target/68467
|
||
* config/m68k/m68k.c (m68k_promote_function_mode): New function.
|
||
(TARGET_PROMOTE_FUNCTION_MODE): New macro.
|
||
|
||
2018-01-24 Jeff Law <law@redhat.com>
|
||
|
||
PR target/83994
|
||
* i386.c (get_probe_interval): Move to earlier point.
|
||
(ix86_compute_frame_layout): If -fstack-clash-protection and
|
||
the frame is larger than the probe interval, then use pushes
|
||
to save registers rather than reg->mem moves.
|
||
(ix86_expand_prologue): Remove conditional for int_registers_saved
|
||
assertion.
|
||
|
||
2018-01-24 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/84014
|
||
* ira-build.c (setup_min_max_allocno_live_range_point): Set up
|
||
min/max for never referenced object.
|
||
|
||
2018-01-24 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/83977
|
||
* tree.c (free_lang_data_in_decl): Don't clear DECL_ABSTRACT_ORIGIN
|
||
here.
|
||
* omp-low.c (create_omp_child_function): Remove "omp declare simd"
|
||
attributes from DECL_ATTRIBUTES (decl) without affecting
|
||
DECL_ATTRIBUTES (current_function_decl).
|
||
* omp-simd-clone.c (expand_simd_clones): Ignore DECL_ARTIFICIAL
|
||
functions with non-NULL DECL_ABSTRACT_ORIGIN.
|
||
|
||
2018-01-24 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83979
|
||
* fold-const.c (fold_comparison): Use constant_boolean_node
|
||
instead of boolean_{true,false}_node.
|
||
|
||
2018-01-24 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* ipa-profile.c (ipa_propagate_frequency_1): Fix logic skipping calls
|
||
with zero counts.
|
||
|
||
2018-01-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
|
||
Simplify the clause that sets the length attribute.
|
||
(*call_value_indirect_nonlocal_sysv<mode>): Likewise.
|
||
(*sibcall_nonlocal_sysv<mode>): Clean up code block; simplify the
|
||
clause that sets the length attribute.
|
||
(*sibcall_value_nonlocal_sysv<mode>): Likewise.
|
||
|
||
2018-01-24 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/83589
|
||
* config/nvptx/nvptx.c (WORKAROUND_PTXJIT_BUG_2): Define to 1.
|
||
(nvptx_pc_set, nvptx_condjump_label): New function. Copy from jump.c.
|
||
Add strict parameter.
|
||
(prevent_branch_around_nothing): Insert dummy insn between branch to
|
||
label and label with no ptx insn inbetween.
|
||
* config/nvptx/nvptx.md (define_insn "fake_nop"): New insn.
|
||
|
||
2018-01-24 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/81352
|
||
* config/nvptx/nvptx.c (nvptx_single): Add exit insn after noreturn call
|
||
for neutered threads in warp.
|
||
* config/nvptx/nvptx.md (define_insn "exit"): New insn.
|
||
|
||
2018-01-24 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83176
|
||
* tree-chrec.c (chrec_fold_plus_1): Handle (signed T){(T) .. }
|
||
operands.
|
||
|
||
2018-01-24 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/82819
|
||
* graphite-isl-ast-to-gimple.c (binary_op_to_tree): Avoid
|
||
code generating pluses that are no-ops in the target precision.
|
||
|
||
2018-01-24 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/84000
|
||
* tree-cfg.c (replace_loop_annotate): Handle annot_expr_parallel_kind.
|
||
|
||
2018-01-23 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* cfgcleanup.c (try_crossjump_to_edge): Use combine_with_count
|
||
to merge probabilities.
|
||
* predict.c (probably_never_executed): Also mark as cold functions
|
||
with global 0 profile and guessed local profile.
|
||
* profile-count.c (profile_probability::combine_with_count): New
|
||
member function.
|
||
* profile-count.h (profile_probability::operator*,
|
||
profile_probability::operator*=, profile_probability::operator/,
|
||
profile_probability::operator/=): Reduce precision to adjusted
|
||
and set value to guessed on contradictory divisions.
|
||
(profile_probability::combine_with_freq): Remove.
|
||
(profile_probability::combine_wiht_count): Declare.
|
||
(profile_count::force_nonzero):: Set to adjusted.
|
||
(profile_count::probability_in):: Set quality to adjusted.
|
||
* tree-ssa-tail-merge.c (replace_block_by): Use
|
||
combine_with_count.
|
||
|
||
2018-01-23 Andrew Waterman <andrew@sifive.com>
|
||
Jim Wilson <jimw@sifive.com>
|
||
|
||
* config/riscv/riscv.c (riscv_stack_boundary): New.
|
||
(riscv_option_override): Set riscv_stack_boundary. Handle
|
||
riscv_preferred_stack_boundary_arg.
|
||
* config/riscv/riscv.h (MIN_STACK_BOUNDARY, ABI_STACK_BOUNDARY): New.
|
||
(BIGGEST_ALIGNMENT): Set to STACK_BOUNDARY.
|
||
(STACK_BOUNDARY): Set to riscv_stack_boundary.
|
||
(RISCV_STACK_ALIGN): Use STACK_BOUNDARY.
|
||
* config/riscv/riscv.opt (mpreferred-stack-boundary): New.
|
||
* doc/invoke.tex (RISC-V Options): Add -mpreferred-stack-boundary.
|
||
|
||
2018-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/83905
|
||
* config/i386/i386.c (ix86_expand_prologue): Use cost reference
|
||
of struct ix86_frame.
|
||
(ix86_expand_epilogue): Likewise. Add a local variable for
|
||
the reg_save_offset field in struct ix86_frame.
|
||
|
||
2018-01-23 Bin Cheng <bin.cheng@arm.com>
|
||
|
||
PR tree-optimization/82604
|
||
* tree-loop-distribution.c (enum partition_kind): New enum item
|
||
PKIND_PARTIAL_MEMSET.
|
||
(partition_builtin_p): Support above new enum item.
|
||
(generate_code_for_partition): Ditto.
|
||
(compute_access_range): Differentiate cases that equality can be
|
||
proven at all loops, the innermost loops or no loops.
|
||
(classify_builtin_st, classify_builtin_ldst): Adjust call to above
|
||
function. Set PKIND_PARTIAL_MEMSET for partition appropriately.
|
||
(finalize_partitions, distribute_loop): Don't fuse partition of
|
||
PKIND_PARTIAL_MEMSET kind when distributing 3-level loop nest.
|
||
(prepare_perfect_loop_nest): Distribute 3-level loop nest only if
|
||
parloop is enabled.
|
||
|
||
2018-01-23 Martin Liska <mliska@suse.cz>
|
||
|
||
* predict.def (PRED_INDIR_CALL): Set probability to PROB_EVEN in
|
||
order to ignore the predictor.
|
||
(PRED_POLYMORPHIC_CALL): Likewise.
|
||
(PRED_RECURSIVE_CALL): Likewise.
|
||
|
||
2018-01-23 Martin Liska <mliska@suse.cz>
|
||
|
||
* tree-profile.c (tree_profiling): Print function header to
|
||
aware reader which function we are working on.
|
||
* value-prof.c (gimple_find_values_to_profile): Do not print
|
||
not interesting value histograms.
|
||
|
||
2018-01-23 Martin Liska <mliska@suse.cz>
|
||
|
||
* profile-count.h (enum profile_quality): Add
|
||
profile_uninitialized as the first value. Do not number values
|
||
as they are zero based.
|
||
(profile_count::verify): Update sanity check.
|
||
(profile_probability::verify): Likewise.
|
||
|
||
2018-01-23 Nathan Sidwell <nathan@acm.org>
|
||
|
||
* doc/invoke.texi (ffor-scope): Deprecate.
|
||
|
||
2018-01-23 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR tree-optimization/83510
|
||
* domwalk.c (set_all_edges_as_executable): New function.
|
||
(dom_walker::dom_walker): Convert bool param
|
||
"skip_unreachable_blocks" to enum reachability. Move setup of
|
||
edge flags to set_all_edges_as_executable and only do it when
|
||
reachability is REACHABLE_BLOCKS.
|
||
* domwalk.h (enum dom_walker::reachability): New enum.
|
||
(dom_walker::dom_walker): Convert bool param
|
||
"skip_unreachable_blocks" to enum reachability.
|
||
(set_all_edges_as_executable): New decl.
|
||
* graphite-scop-detection.c (gather_bbs::gather_bbs): Convert
|
||
from false for "skip_unreachable_blocks" to ALL_BLOCKS for
|
||
"reachability".
|
||
* tree-ssa-dom.c (dom_opt_dom_walker::dom_opt_dom_walker): Likewise,
|
||
but converting true to REACHABLE_BLOCKS.
|
||
* tree-ssa-sccvn.c (sccvn_dom_walker::sccvn_dom_walker): Likewise.
|
||
* tree-vrp.c
|
||
(check_array_bounds_dom_walker::check_array_bounds_dom_walker):
|
||
Likewise, but converting it to REACHABLE_BLOCKS_PRESERVING_FLAGS.
|
||
(vrp_dom_walker::vrp_dom_walker): Likewise, but converting it to
|
||
REACHABLE_BLOCKS.
|
||
(vrp_prop::vrp_finalize): Call set_all_edges_as_executable
|
||
if check_all_array_refs will be called.
|
||
|
||
2018-01-23 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* tree.c (selftest::test_location_wrappers): Add more test
|
||
coverage.
|
||
|
||
2018-01-23 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* sbitmap.c (selftest::test_set_range): Fix memory leaks.
|
||
(selftest::test_bit_in_range): Likewise.
|
||
|
||
2018-01-23 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR testsuite/83888
|
||
* doc/sourcebuild.texi (vect_float): Say that the selector
|
||
only describes the situation when -funsafe-math-optimizations is on.
|
||
(vect_float_strict): Document.
|
||
|
||
2018-01-23 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83965
|
||
* tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
|
||
(vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
|
||
instead of checking only for a reduction.
|
||
(vect_recog_widen_sum_pattern): Likewise.
|
||
|
||
2018-01-23 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* predict.c (probably_never_executed): Only use precise profile info.
|
||
(compute_function_frequency): Skip after inlining hack since we now
|
||
have quality checking.
|
||
|
||
2018-01-23 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* profile-count.h (profile_probability::very_unlikely,
|
||
profile_probability::unlikely, profile_probability::even): Set
|
||
precision to guessed.
|
||
|
||
2018-01-23 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83963
|
||
* graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
|
||
Properly terminate dominator walk when crossing the exit edge not
|
||
when visiting its source block.
|
||
|
||
2018-01-23 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c++/83918
|
||
* tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
|
||
VIEW_CONVERT_EXPR to wrap CONST_DECLs.
|
||
|
||
2018-01-22 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/83957
|
||
* omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs. Remove
|
||
semicolon after for body surrounded by braces.
|
||
|
||
PR tree-optimization/83081
|
||
* profile-count.h (profile_probability::split): New method.
|
||
* dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
|
||
Use profile_probability::split.
|
||
(do_compare_rtx_and_jump): Fix adjustment of probabilities
|
||
when splitting a single conditional jump into 2.
|
||
|
||
2018-01-22 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR tree-optimization/69452
|
||
* tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
|
||
decl.
|
||
|
||
2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78-expand.md (bswaphi2): New define_expand.
|
||
* config/rl78/rl78-virt.md (*bswaphi2_virt): New define_insn.
|
||
* config/rl78/rl78-real.md (*bswaphi2_real): New define_insn.
|
||
|
||
2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78-protos.h (rl78_split_movdi): New function declaration.
|
||
* config/rl78/rl78.md (movdi): New define_expand.
|
||
* config/rl78/rl78.c (rl78_split_movdi): New function.
|
||
|
||
2018-01-22 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
PR target/83862
|
||
* config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
|
||
no longer used.
|
||
* config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
|
||
* config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
|
||
128-bit to produce an UNSPEC move to get the double word with the
|
||
signbit and then a shift directly to do signbit.
|
||
(signbit<mode>2_dm): Replace old IEEE 128-bit signbit
|
||
implementation with a new version that just does either a direct
|
||
move or a regular move. Move memory interface to separate insns.
|
||
Move insns so they are next to the expander.
|
||
(signbit<mode>2_dm_mem_be): New combiner insns to combine load
|
||
with signbit move. Split big and little endian case.
|
||
(signbit<mode>2_dm_mem_le): Likewise.
|
||
(signbit<mode>2_dm_<su>ext): Delete, no longer used.
|
||
(signbit<mode>2_dm2): Likewise.
|
||
|
||
2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.md (anddi3): New define_expand.
|
||
|
||
2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.md (umindi3): New define_expand.
|
||
|
||
2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.md (smindi3): New define_expand.
|
||
|
||
2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.md (smaxdi3): New define_expand.
|
||
|
||
2018-01-22 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
|
||
LVX_V1TI): Add macro expansion.
|
||
* config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
|
||
definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
|
||
VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
|
||
* config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
|
||
Change check to determine if the instruction is a byte reversing
|
||
entry. Fix typo in comment.
|
||
* config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
|
||
for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
|
||
Add def_builtin calls for new builtins.
|
||
* config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
|
||
Add define_insn expansion.
|
||
|
||
2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.md (umaxdi3): New define_expand.
|
||
|
||
2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
|
||
|
||
* config/rl78/rl78.c (rl78_note_reg_set): Fixed dead reg check
|
||
for non-QImode registers.
|
||
|
||
2018-01-22 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83963
|
||
* graphite-scop-detection.c (scop_detection::get_sese): Delay
|
||
including the loop exit block.
|
||
(scop_detection::merge_sese): Likewise.
|
||
(scop_detection::add_scop): Do it here instead.
|
||
|
||
2018-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* doc/sourcebuild.texi (arm_softfloat): Document.
|
||
|
||
2018-01-21 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
PR gcc/77734
|
||
* config/pa/pa.c (pa_function_ok_for_sibcall): Use
|
||
targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
|
||
Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
|
||
|
||
2018-01-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
David Edelsohn <dje.gcc@gmail.com>
|
||
|
||
PR target/83946
|
||
* config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
|
||
Change "crset eq" to "crset 2".
|
||
(*call_value_indirect_nonlocal_sysv<mode>): Likewise.
|
||
(*call_indirect_aix<mode>_nospec): Likewise.
|
||
(*call_value_indirect_aix<mode>_nospec): Likewise.
|
||
(*call_indirect_elfv2<mode>_nospec): Likewise.
|
||
(*call_value_indirect_elfv2<mode>_nospec): Likewise.
|
||
(*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
|
||
change assembly output from . to $.
|
||
(*sibcall_value_nonlocal_sysv<mode>): Likewise.
|
||
(indirect_jump<mode>_nospec): Change assembly output from . to $.
|
||
(*tablejump<mode>_internal1_nospec): Likewise.
|
||
|
||
2018-01-21 Oleg Endo <olegendo@gcc.gnu.org>
|
||
|
||
PR target/80870
|
||
* config/sh/sh_optimize_sett_clrt.cc:
|
||
Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
|
||
|
||
2018-01-20 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83940
|
||
* tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
|
||
offset_dt to vect_constant_def rather than vect_unknown_def_type.
|
||
(vect_check_load_store_mask): Add a mask_dt_out parameter and
|
||
use it to pass back the definition type.
|
||
(vect_check_store_rhs): Likewise rhs_dt_out.
|
||
(vect_build_gather_load_calls): Add a mask_dt argument and use
|
||
it instead of a call to vect_is_simple_use.
|
||
(vectorizable_store): Update calls to vect_check_load_store_mask
|
||
and vect_check_store_rhs. Use the dt returned by the latter instead
|
||
of scatter_src_dt. Use the cached mask_dt and gs_info.offset_dt
|
||
instead of calls to vect_is_simple_use. Pass the scalar rather
|
||
than the vector operand to vect_is_simple_use when handling
|
||
second and subsequent copies of an rhs value.
|
||
(vectorizable_load): Update calls to vect_check_load_store_mask
|
||
and vect_build_gather_load_calls. Use the cached mask_dt and
|
||
gs_info.offset_dt instead of calls to vect_is_simple_use.
|
||
|
||
2018-01-20 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/83945
|
||
* tree-emutls.c: Include gimplify.h.
|
||
(lower_emutls_2): New function.
|
||
(lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
|
||
with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
|
||
it before further processing.
|
||
|
||
PR target/83930
|
||
* simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
|
||
UINTVAL (trueop1) instead of INTVAL (op1).
|
||
|
||
2018-01-19 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/81570
|
||
PR debug/83728
|
||
* dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
|
||
INCOMING_FRAME_SP_OFFSET if not defined.
|
||
(scan_trace): Add ENTRY argument. If true and
|
||
DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
|
||
emit a note to adjust the CFA offset.
|
||
(create_cfi_notes): Adjust scan_trace callers.
|
||
(create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
|
||
INCOMING_FRAME_SP_OFFSET in the CIE.
|
||
* config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
|
||
* config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
|
||
Likewise.
|
||
* doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
|
||
* doc/tm.texi: Regenerated.
|
||
|
||
2018-01-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
|
||
|
||
PR rtl-optimization/83147
|
||
* lra-constraints.c (remove_inheritance_pseudos): Use
|
||
lra_substitute_pseudo_within_insn.
|
||
|
||
2018-01-19 Tom de Vries <tom@codesourcery.com>
|
||
Cesar Philippidis <cesar@codesourcery.com>
|
||
|
||
PR target/83920
|
||
* config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
|
||
|
||
2018-01-19 Cesar Philippidis <cesar@codesourcery.com>
|
||
|
||
PR target/83790
|
||
* config/nvptx/nvptx.c (output_init_frag): Don't use generic address
|
||
spaces for function labels.
|
||
|
||
2018-01-19 Martin Liska <mliska@suse.cz>
|
||
|
||
* predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
|
||
(PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
|
||
(PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
|
||
(PRED_OPCODE_POSITIVE): Change from 64 to 59.
|
||
(PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
|
||
(PRED_CONST_RETURN): Change from 69 to 65.
|
||
(PRED_NULL_RETURN): Change from 91 to 71.
|
||
(PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
|
||
(PRED_LOOP_GUARD): Change from 66 to 73.
|
||
|
||
2018-01-19 Martin Liska <mliska@suse.cz>
|
||
|
||
* predict.c (predict_insn_def): Add new assert.
|
||
(struct branch_predictor): Change type to signed integer.
|
||
(test_prediction_value_range): Amend test to cover
|
||
PROB_UNINITIALIZED.
|
||
* predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
|
||
(PRED_LOOP_ITERATIONS_GUESSED): Likewise.
|
||
(PRED_LOOP_ITERATIONS_MAX): Likewise.
|
||
(PRED_LOOP_IV_COMPARE): Likewise.
|
||
* predict.h (PROB_UNINITIALIZED): Define new constant.
|
||
|
||
2018-01-19 Martin Liska <mliska@suse.cz>
|
||
|
||
* predict.c (dump_prediction): Add new format for
|
||
analyze_brprob.py script which is enabled with -details
|
||
suboption.
|
||
* profile-count.h (precise_p): New function.
|
||
|
||
2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83922
|
||
* tree-vect-loop.c (vect_verify_full_masking): Return false if
|
||
there are no statements that need masking.
|
||
(vect_active_double_reduction_p): New function.
|
||
(vect_analyze_loop_operations): Use it when handling phis that
|
||
are not in the loop header.
|
||
|
||
2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83914
|
||
* tree-vect-loop.c (vectorizable_induction): Don't convert
|
||
init_expr or apply the peeling adjustment for inductions
|
||
that are nested within the vectorized loop.
|
||
|
||
2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
|
||
instead of NEG.
|
||
|
||
2018-01-18 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR sanitizer/81715
|
||
PR testsuite/83882
|
||
* function.h (gimplify_parameters): Add gimple_seq * argument.
|
||
* function.c: Include gimple.h and options.h.
|
||
(gimplify_parameters): Add cleanup argument, add CLOBBER stmts
|
||
for the added local temporaries if needed.
|
||
* gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
|
||
if there are any parameter cleanups, wrap whole body into a
|
||
try/finally with the cleanups.
|
||
|
||
2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
PR target/82964
|
||
* config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
|
||
Use GET_MODE_CLASS for scalar floating point.
|
||
|
||
2018-01-18 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR ipa/82256
|
||
patch by PaX Team
|
||
* cgraphclones.c (cgraph_node::create_version_clone_with_body):
|
||
Fix call of call_cgraph_insertion_hooks.
|
||
|
||
2018-01-18 Martin Sebor <msebor@redhat.com>
|
||
|
||
* doc/invoke.texi (-Wclass-memaccess): Tweak text.
|
||
|
||
2018-01-18 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR ipa/83619
|
||
* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
|
||
frequencies.
|
||
|
||
2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
|
||
|
||
PR other/70268
|
||
* common.opt: (-ffile-prefix-map): New option.
|
||
* opts.c (common_handle_option): Defer it.
|
||
* opts-global.c (handle_common_deferred_options): Handle it.
|
||
* debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
|
||
* file-prefix-map.h: New file.
|
||
(remap_debug_filename, add_debug_prefix_map): ...here.
|
||
(add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
|
||
* final.c (debug_prefix_map, add_debug_prefix_map
|
||
remap_debug_filename): Move to...
|
||
* file-prefix-map.c: New file.
|
||
(file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
|
||
generalize, get rid of alloca(), use strrchr() instead of strchr().
|
||
(add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
|
||
Implement in terms of add_prefix_map().
|
||
(remap_macro_filename, remap_debug_filename): Implement in term of
|
||
remap_filename().
|
||
* Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
|
||
* builtins.c (fold_builtin_FILE): Call remap_macro_filename().
|
||
* dbxout.c: Include file-prefix-map.h.
|
||
* varasm.c: Likewise.
|
||
* vmsdbgout.c: Likewise.
|
||
* xcoffout.c: Likewise.
|
||
* dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
|
||
* doc/cppopts.texi (-fmacro-prefix-map): Document.
|
||
* doc/invoke.texi (-ffile-prefix-map): Document.
|
||
(-fdebug-prefix-map): Update description.
|
||
|
||
2018-01-18 Martin Liska <mliska@suse.cz>
|
||
|
||
* config/i386/i386.c (indirect_thunk_name): Document that also
|
||
lfence is emitted.
|
||
(output_indirect_thunk): Document why both instructions
|
||
(pause and lfence) are generated.
|
||
|
||
2018-01-18 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83887
|
||
* graphite-scop-detection.c
|
||
(scop_detection::get_nearest_dom_with_single_entry): Remove.
|
||
(scop_detection::get_nearest_pdom_with_single_exit): Likewise.
|
||
(scop_detection::merge_sese): Re-implement with a flood-fill
|
||
algorithm that properly finds a SESE region if it exists.
|
||
|
||
2018-01-18 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c/61240
|
||
* match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
|
||
pointer_diff optimizations use view_convert instead of convert.
|
||
|
||
2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
|
||
Generate different code for -mno-speculate-indirect-jumps.
|
||
(*call_value_indirect_nonlocal_sysv<mode>): Likewise.
|
||
(*call_indirect_aix<mode>): Disable for
|
||
-mno-speculate-indirect-jumps.
|
||
(*call_indirect_aix<mode>_nospec): New define_insn.
|
||
(*call_value_indirect_aix<mode>): Disable for
|
||
-mno-speculate-indirect-jumps.
|
||
(*call_value_indirect_aix<mode>_nospec): New define_insn.
|
||
(*sibcall_nonlocal_sysv<mode>): Generate different code for
|
||
-mno-speculate-indirect-jumps.
|
||
(*sibcall_value_nonlocal_sysv<mode>): Likewise.
|
||
|
||
2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
|
||
long double type, set the flags for noting the default long double
|
||
type, even if we don't pass or return a long double type.
|
||
|
||
2018-01-17 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR ipa/83051
|
||
* ipa-inline.c (flatten_function): Do not overwrite final inlining
|
||
failure.
|
||
|
||
2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
|
||
support for merge[hl].
|
||
(fold_mergehl_helper): New helper function.
|
||
(tree-vector-builder.h): New #include for tree_vector_builder usage.
|
||
* config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
|
||
(altivec_vmrglw_direct): Add xxmrglw insn.
|
||
|
||
2018-01-17 Andrew Waterman <andrew@sifive.com>
|
||
|
||
* config/riscv/riscv.c (riscv_conditional_register_usage): If
|
||
UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
|
||
|
||
2018-01-17 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR lto/83121
|
||
* ipa-devirt.c (add_type_duplicate): When comparing memory layout,
|
||
call the lto_location_cache before reading the
|
||
DECL_SOURCE_LOCATION of the types.
|
||
|
||
2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
|
||
Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
|
||
* config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
|
||
(aarch64_legitimate_constant_p): Just support CONST_DOUBLE
|
||
SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
|
||
* config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
|
||
Add declaration.
|
||
* config/aarch64/constraints.md (aarch64_movti_operand):
|
||
Limit immediates.
|
||
* config/aarch64/predicates.md (Uti): Add new constraint.
|
||
|
||
2018-01-17 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6000/vsx.md (define_expand xl_len_r,
|
||
define_expand stxvl, define_expand *stxvl): Add match_dup argument.
|
||
(define_insn): Add, match_dup 1 argument to define_insn stxvll and
|
||
lxvll.
|
||
(define_expand, define_insn): Move the shift left from the
|
||
define_insn to the define_expand for lxvl and stxvl instructions.
|
||
* config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
|
||
and XL_LEN_R definitions to PURE.
|
||
|
||
2018-01-17 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.c (indirect_thunk_name): Declare regno
|
||
as unsigned int. Compare regno with INVALID_REGNUM.
|
||
(output_indirect_thunk): Ditto.
|
||
(output_indirect_thunk_function): Ditto.
|
||
(ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
|
||
in the call to output_indirect_thunk_function.
|
||
|
||
2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR middle-end/83884
|
||
* expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
|
||
rather than the size of inner_type to determine the stack slot size
|
||
when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
|
||
|
||
2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
|
||
|
||
PR target/83546
|
||
* config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
|
||
to PTA_SILVERMONT.
|
||
|
||
2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
* config.gcc (powerpc*-linux*-*): Add support for 64-bit little
|
||
endian Linux systems to optionally enable multilibs for selecting
|
||
the long double type if the user configured an explicit type.
|
||
* config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
|
||
have no long double multilibs if not defined.
|
||
* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
|
||
warn if the user used -mabi={ieee,ibm}longdouble and we built
|
||
multilibs for long double.
|
||
* config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
|
||
appropriate multilib option.
|
||
(MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
|
||
multilib options.
|
||
* config/rs6000/t-ldouble-linux64le-ibm: New configuration files
|
||
for building long double multilibs.
|
||
* config/rs6000/t-ldouble-linux64le-ieee: Likewise.
|
||
|
||
2018-01-16 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
* config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
|
||
copies.
|
||
|
||
* config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
|
||
64 bits.
|
||
* config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
|
||
128 bits.
|
||
|
||
* config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
|
||
variables.
|
||
|
||
* config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
|
||
return value.
|
||
|
||
2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
|
||
ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
|
||
|
||
2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||
|
||
* config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
|
||
different rtl trees depending on TARGET_64BIT.
|
||
(rs6000_gen_lvx): Likewise.
|
||
|
||
2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* config/visium/visium.md (nop): Tweak comment.
|
||
(hazard_nop): Likewise.
|
||
|
||
2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
|
||
-mspeculate-indirect-jumps.
|
||
* config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
|
||
for -mno-speculate-indirect-jumps.
|
||
(*call_indirect_elfv2<mode>_nospec): New define_insn.
|
||
(*call_value_indirect_elfv2<mode>): Disable for
|
||
-mno-speculate-indirect-jumps.
|
||
(*call_value_indirect_elfv2<mode>_nospec): New define_insn.
|
||
(indirect_jump): Emit different RTL for
|
||
-mno-speculate-indirect-jumps.
|
||
(*indirect_jump<mode>): Disable for
|
||
-mno-speculate-indirect-jumps.
|
||
(*indirect_jump<mode>_nospec): New define_insn.
|
||
(tablejump): Emit different RTL for
|
||
-mno-speculate-indirect-jumps.
|
||
(tablejumpsi): Disable for -mno-speculate-indirect-jumps.
|
||
(tablejumpsi_nospec): New define_expand.
|
||
(tablejumpdi): Disable for -mno-speculate-indirect-jumps.
|
||
(tablejumpdi_nospec): New define_expand.
|
||
(*tablejump<mode>_internal1): Disable for
|
||
-mno-speculate-indirect-jumps.
|
||
(*tablejump<mode>_internal1_nospec): New define_insn.
|
||
* config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
|
||
option.
|
||
|
||
2018-01-16 Artyom Skrobov tyomitch@gmail.com
|
||
|
||
* caller-save.c (insert_save): Drop unnecessary parameter. All
|
||
callers updated.
|
||
|
||
2018-01-16 Jakub Jelinek <jakub@redhat.com>
|
||
Richard Biener <rguenth@suse.de>
|
||
|
||
PR libgomp/83590
|
||
* gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
|
||
return early, inline manually is_gimple_sizepos. Make sure if we
|
||
call gimplify_expr we don't end up with a gimple constant.
|
||
* tree.c (variably_modified_type_p): Don't return true for
|
||
is_gimple_constant (_t). Inline manually is_gimple_sizepos.
|
||
* gimplify.h (is_gimple_sizepos): Remove.
|
||
|
||
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83857
|
||
* tree-vect-loop.c (vect_analyze_loop_operations): Don't call
|
||
vectorizable_live_operation for pure SLP statements.
|
||
(vectorizable_live_operation): Handle PHIs.
|
||
|
||
2018-01-16 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83867
|
||
* tree-vect-stmts.c (vect_transform_stmt): Precompute
|
||
nested_in_vect_loop_p since the scalar stmt may get invalidated.
|
||
|
||
2018-01-16 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c/83844
|
||
* stor-layout.c (handle_warn_if_not_align): Use byte_position and
|
||
multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
|
||
If off is not INTEGER_CST, issue a may not be aligned warning
|
||
rather than isn't aligned. Use isn%'t rather than isn't.
|
||
* fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
|
||
into MULT_EXPR.
|
||
<case MULT_EXPR>: Improve the case when bottom and one of the
|
||
MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
|
||
operand, in that case check if the other operand is multiple of
|
||
bottom divided by the INTEGER_CST operand.
|
||
|
||
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR target/83858
|
||
* config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
|
||
* config/pa/pa-protos.h (pa_function_arg_size): Declare.
|
||
* config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
|
||
pa_function_arg_size instead of FUNCTION_ARG_SIZE.
|
||
* config/pa/pa.c (pa_function_arg_advance): Likewise.
|
||
(pa_function_arg, pa_arg_partial_bytes): Likewise.
|
||
(pa_function_arg_size): New function.
|
||
|
||
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
|
||
in a separate statement.
|
||
|
||
2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83847
|
||
* tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
|
||
group gathers and scatters.
|
||
|
||
2018-01-16 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/86620
|
||
* params.def (max-sched-ready-insns): Bump minimum value to 1.
|
||
|
||
PR rtl-optimization/83213
|
||
* recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
|
||
to last if both are JUMP_INSNs.
|
||
|
||
PR tree-optimization/83843
|
||
* gimple-ssa-store-merging.c
|
||
(imm_store_chain_info::output_merged_store): Handle bit_not_p on
|
||
store_immediate_info for bswap/nop orig_stores.
|
||
|
||
2018-01-15 Andrew Waterman <andrew@sifive.com>
|
||
|
||
* config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
|
||
!TARGET_MUL.
|
||
<UDIV>: Increase cost if !TARGET_DIV.
|
||
|
||
2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
|
||
(define_attr "cr_logical_3op"): New.
|
||
(cceq_ior_compare): Adjust.
|
||
(cceq_ior_compare_complement): Adjust.
|
||
(*cceq_rev_compare): Adjust.
|
||
* config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
|
||
(is_cracked_insn): Adjust.
|
||
(insn_must_be_first_in_group): Adjust.
|
||
* config/rs6000/40x.md: Adjust.
|
||
* config/rs6000/440.md: Adjust.
|
||
* config/rs6000/476.md: Adjust.
|
||
* config/rs6000/601.md: Adjust.
|
||
* config/rs6000/603.md: Adjust.
|
||
* config/rs6000/6xx.md: Adjust.
|
||
* config/rs6000/7450.md: Adjust.
|
||
* config/rs6000/7xx.md: Adjust.
|
||
* config/rs6000/8540.md: Adjust.
|
||
* config/rs6000/cell.md: Adjust.
|
||
* config/rs6000/e300c2c3.md: Adjust.
|
||
* config/rs6000/e500mc.md: Adjust.
|
||
* config/rs6000/e500mc64.md: Adjust.
|
||
* config/rs6000/e5500.md: Adjust.
|
||
* config/rs6000/e6500.md: Adjust.
|
||
* config/rs6000/mpc.md: Adjust.
|
||
* config/rs6000/power4.md: Adjust.
|
||
* config/rs6000/power5.md: Adjust.
|
||
* config/rs6000/power6.md: Adjust.
|
||
* config/rs6000/power7.md: Adjust.
|
||
* config/rs6000/power8.md: Adjust.
|
||
* config/rs6000/power9.md: Adjust.
|
||
* config/rs6000/rs64.md: Adjust.
|
||
* config/rs6000/titan.md: Adjust.
|
||
|
||
2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/predicates.md (indirect_branch_operand): Rewrite
|
||
ix86_indirect_branch_register logic.
|
||
|
||
2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/constraints.md (Bs): Update
|
||
ix86_indirect_branch_register check. Don't check
|
||
ix86_indirect_branch_register with GOT_memory_operand.
|
||
(Bw): Likewise.
|
||
* config/i386/predicates.md (GOT_memory_operand): Don't check
|
||
ix86_indirect_branch_register here.
|
||
(GOT32_symbol_operand): Likewise.
|
||
|
||
2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/predicates.md (constant_call_address_operand):
|
||
Rewrite ix86_indirect_branch_register logic.
|
||
(sibcall_insn_operand): Likewise.
|
||
|
||
2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/constraints.md (Bs): Replace
|
||
ix86_indirect_branch_thunk_register with
|
||
ix86_indirect_branch_register.
|
||
(Bw): Likewise.
|
||
* config/i386/i386.md (indirect_jump): Likewise.
|
||
(tablejump): Likewise.
|
||
(*sibcall_memory): Likewise.
|
||
(*sibcall_value_memory): Likewise.
|
||
Peepholes of indirect call and jump via memory: Likewise.
|
||
* config/i386/i386.opt: Likewise.
|
||
* config/i386/predicates.md (indirect_branch_operand): Likewise.
|
||
(GOT_memory_operand): Likewise.
|
||
(call_insn_operand): Likewise.
|
||
(sibcall_insn_operand): Likewise.
|
||
(GOT32_symbol_operand): Likewise.
|
||
|
||
2018-01-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/83837
|
||
* omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
|
||
type rather than type addr's type points to.
|
||
(expand_omp_atomic_mutex): Likewise.
|
||
(expand_omp_atomic): Likewise.
|
||
|
||
2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/83839
|
||
* config/i386/i386.c (output_indirect_thunk_function): Use
|
||
ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
|
||
for __x86_return_thunk.
|
||
|
||
2018-01-15 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/83850
|
||
* expmed.c (extract_bit_field_1): Fix typo.
|
||
|
||
2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
PR target/83687
|
||
* config/arm/iterators.md (VF): New mode iterator.
|
||
* config/arm/neon.md (neon_vabd<mode>_2): Use the above.
|
||
Remove integer-related logic from pattern.
|
||
(neon_vabd<mode>_3): Likewise.
|
||
|
||
2018-01-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/82694
|
||
* common.opt (fstrict-overflow): No longer an alias.
|
||
(fwrapv-pointer): New option.
|
||
* tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
|
||
also for pointer types based on flag_wrapv_pointer.
|
||
* opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
|
||
opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
|
||
opts->x_flag_wrapv got set.
|
||
* fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
|
||
changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
|
||
POINTER_TYPE_OVERFLOW_UNDEFINED.
|
||
* match.pd: Likewise in address comparison pattern.
|
||
* doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
|
||
|
||
2018-01-15 Richard Biener <rguenther@suse.de>
|
||
|
||
PR lto/83804
|
||
* tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
|
||
from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
|
||
Reset type names to their identifier if their TYPE_DECL doesn't
|
||
have linkage (and thus is used for ODR and devirt).
|
||
(save_debug_info_for_decl): Remove.
|
||
(save_debug_info_for_type): Likewise.
|
||
(add_tree_to_fld_list): Adjust.
|
||
* tree-pretty-print.c (dump_generic_node): Make dumping of
|
||
type names more robust.
|
||
|
||
2018-01-15 Richard Biener <rguenther@suse.de>
|
||
|
||
* BASE-VER: Bump to 8.0.1.
|
||
|
||
2018-01-14 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR other/83508
|
||
* builtins.c (check_access): Avoid warning when the no-warning bit
|
||
is set.
|
||
|
||
2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
|
||
|
||
* tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
|
||
* ira-color (allocno_hard_regs_compare): Likewise.
|
||
|
||
2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
|
||
|
||
PR target/83013
|
||
* config/microblaze/microblaze.c (microblaze_asm_output_ident):
|
||
Use .pushsection/.popsection.
|
||
|
||
2018-01-14 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR c++/81327
|
||
* doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
|
||
|
||
2018-01-14 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
|
||
entry from extra_headers.
|
||
(x86_64-*-*): Remove two duplicate gfniintrin.h entries from
|
||
extra_headers, make the list bitwise identical to the i?86-*-* one.
|
||
|
||
2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
|
||
-mcmodel=large with -mindirect-branch=thunk,
|
||
-mindirect-branch=thunk-extern, -mfunction-return=thunk and
|
||
-mfunction-return=thunk-extern.
|
||
* doc/invoke.texi: Document -mcmodel=large is incompatible with
|
||
-mindirect-branch=thunk, -mindirect-branch=thunk-extern,
|
||
-mfunction-return=thunk and -mfunction-return=thunk-extern.
|
||
|
||
2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/i386.c (print_reg): Print the name of the full
|
||
integer register without '%'.
|
||
(ix86_print_operand): Handle 'V'.
|
||
* doc/extend.texi: Document 'V' modifier.
|
||
|
||
2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/constraints.md (Bs): Disallow memory operand for
|
||
-mindirect-branch-register.
|
||
(Bw): Likewise.
|
||
* config/i386/predicates.md (indirect_branch_operand): Likewise.
|
||
(GOT_memory_operand): Likewise.
|
||
(call_insn_operand): Likewise.
|
||
(sibcall_insn_operand): Likewise.
|
||
(GOT32_symbol_operand): Likewise.
|
||
* config/i386/i386.md (indirect_jump): Call convert_memory_address
|
||
for -mindirect-branch-register.
|
||
(tablejump): Likewise.
|
||
(*sibcall_memory): Likewise.
|
||
(*sibcall_value_memory): Likewise.
|
||
Disallow peepholes of indirect call and jump via memory for
|
||
-mindirect-branch-register.
|
||
(*call_pop): Replace m with Bw.
|
||
(*call_value_pop): Likewise.
|
||
(*sibcall_pop_memory): Replace m with Bs.
|
||
* config/i386/i386.opt (mindirect-branch-register): New option.
|
||
* doc/invoke.texi: Document -mindirect-branch-register option.
|
||
|
||
2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/i386-protos.h (ix86_output_function_return): New.
|
||
* config/i386/i386.c (ix86_set_indirect_branch_type): Also
|
||
set function_return_type.
|
||
(indirect_thunk_name): Add ret_p to indicate thunk for function
|
||
return.
|
||
(output_indirect_thunk_function): Pass false to
|
||
indirect_thunk_name.
|
||
(ix86_output_indirect_branch_via_reg): Likewise.
|
||
(ix86_output_indirect_branch_via_push): Likewise.
|
||
(output_indirect_thunk_function): Create alias for function
|
||
return thunk if regno < 0.
|
||
(ix86_output_function_return): New function.
|
||
(ix86_handle_fndecl_attribute): Handle function_return.
|
||
(ix86_attribute_table): Add function_return.
|
||
* config/i386/i386.h (machine_function): Add
|
||
function_return_type.
|
||
* config/i386/i386.md (simple_return_internal): Use
|
||
ix86_output_function_return.
|
||
(simple_return_internal_long): Likewise.
|
||
* config/i386/i386.opt (mfunction-return=): New option.
|
||
(indirect_branch): Mention -mfunction-return=.
|
||
* doc/extend.texi: Document function_return function attribute.
|
||
* doc/invoke.texi: Document -mfunction-return= option.
|
||
|
||
2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* config/i386/i386-opts.h (indirect_branch): New.
|
||
* config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
|
||
* config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
|
||
with local indirect jump when converting indirect call and jump.
|
||
(ix86_set_indirect_branch_type): New.
|
||
(ix86_set_current_function): Call ix86_set_indirect_branch_type.
|
||
(indirectlabelno): New.
|
||
(indirect_thunk_needed): Likewise.
|
||
(indirect_thunk_bnd_needed): Likewise.
|
||
(indirect_thunks_used): Likewise.
|
||
(indirect_thunks_bnd_used): Likewise.
|
||
(INDIRECT_LABEL): Likewise.
|
||
(indirect_thunk_name): Likewise.
|
||
(output_indirect_thunk): Likewise.
|
||
(output_indirect_thunk_function): Likewise.
|
||
(ix86_output_indirect_branch_via_reg): Likewise.
|
||
(ix86_output_indirect_branch_via_push): Likewise.
|
||
(ix86_output_indirect_branch): Likewise.
|
||
(ix86_output_indirect_jmp): Likewise.
|
||
(ix86_code_end): Call output_indirect_thunk_function if needed.
|
||
(ix86_output_call_insn): Call ix86_output_indirect_branch if
|
||
needed.
|
||
(ix86_handle_fndecl_attribute): Handle indirect_branch.
|
||
(ix86_attribute_table): Add indirect_branch.
|
||
* config/i386/i386.h (machine_function): Add indirect_branch_type
|
||
and has_local_indirect_jump.
|
||
* config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
|
||
to true.
|
||
(tablejump): Likewise.
|
||
(*indirect_jump): Use ix86_output_indirect_jmp.
|
||
(*tablejump_1): Likewise.
|
||
(simple_return_indirect_internal): Likewise.
|
||
* config/i386/i386.opt (mindirect-branch=): New option.
|
||
(indirect_branch): New.
|
||
(keep): Likewise.
|
||
(thunk): Likewise.
|
||
(thunk-inline): Likewise.
|
||
(thunk-extern): Likewise.
|
||
* doc/extend.texi: Document indirect_branch function attribute.
|
||
* doc/invoke.texi: Document -mindirect-branch= option.
|
||
|
||
2018-01-14 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR ipa/83051
|
||
* ipa-inline.c (edge_badness): Tolerate roundoff errors.
|
||
|
||
2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* ipa-inline.c (want_inline_small_function_p): Return false if
|
||
inlining has already failed with CIF_FINAL_ERROR.
|
||
(update_caller_keys): Call want_inline_small_function_p before
|
||
can_inline_edge_p.
|
||
(update_callee_keys): Likewise.
|
||
|
||
2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
||
|
||
* config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
|
||
New function.
|
||
(rs6000_quadword_masked_address_p): Likewise.
|
||
(quad_aligned_load_p): Likewise.
|
||
(quad_aligned_store_p): Likewise.
|
||
(const_load_sequence_p): Add comment to describe the outer-most loop.
|
||
(mimic_memory_attributes_and_flags): New function.
|
||
(rs6000_gen_stvx): Likewise.
|
||
(replace_swapped_aligned_store): Likewise.
|
||
(rs6000_gen_lvx): Likewise.
|
||
(replace_swapped_aligned_load): Likewise.
|
||
(replace_swapped_load_constant): Capitalize argument name in
|
||
comment describing this function.
|
||
(rs6000_analyze_swaps): Add a third pass to search for vector loads
|
||
and stores that access quad-word aligned addresses and replace
|
||
with stvx or lvx instructions when appropriate.
|
||
* config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
|
||
New function prototype.
|
||
(rs6000_quadword_masked_address_p): Likewise.
|
||
(rs6000_gen_lvx): Likewise.
|
||
(rs6000_gen_stvx): Likewise.
|
||
* config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
|
||
VSX_D (V2DF, V2DI), modify this split to select lvx instruction
|
||
when memory address is aligned.
|
||
(*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
|
||
this split to select lvx instruction when memory address is aligned.
|
||
(*vsx_le_perm_load_v8hi): Modify this split to select lvx
|
||
instruction when memory address is aligned.
|
||
(*vsx_le_perm_load_v16qi): Likewise.
|
||
(four unnamed splitters): Modify to select the stvx instruction
|
||
when memory is aligned.
|
||
|
||
2018-01-13 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* predict.c (determine_unlikely_bbs): Handle correctly BBs
|
||
which appears in the queue multiple times.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vectorizer.h (vec_lower_bound): New structure.
|
||
(_loop_vec_info): Add check_nonzero and lower_bounds.
|
||
(LOOP_VINFO_CHECK_NONZERO): New macro.
|
||
(LOOP_VINFO_LOWER_BOUNDS): Likewise.
|
||
(LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
|
||
* tree-data-ref.h (dr_with_seg_len): Add access_size and align
|
||
fields. Make seg_len the distance travelled, not including the
|
||
access size.
|
||
(dr_direction_indicator): Declare.
|
||
(dr_zero_step_indicator): Likewise.
|
||
(dr_known_forward_stride_p): Likewise.
|
||
* tree-data-ref.c: Include stringpool.h, tree-vrp.h and
|
||
tree-ssanames.h.
|
||
(runtime_alias_check_p): Allow runtime alias checks with
|
||
variable strides.
|
||
(operator ==): Compare access_size and align.
|
||
(prune_runtime_alias_test_list): Rework for new distinction between
|
||
the access_size and seg_len.
|
||
(create_intersect_range_checks_index): Likewise. Cope with polynomial
|
||
segment lengths.
|
||
(get_segment_min_max): New function.
|
||
(create_intersect_range_checks): Use it.
|
||
(dr_step_indicator): New function.
|
||
(dr_direction_indicator): Likewise.
|
||
(dr_zero_step_indicator): Likewise.
|
||
(dr_known_forward_stride_p): Likewise.
|
||
* tree-loop-distribution.c (data_ref_segment_size): Return
|
||
DR_STEP * (niters - 1).
|
||
(compute_alias_check_pairs): Update call to the dr_with_seg_len
|
||
constructor.
|
||
* tree-vect-data-refs.c (vect_check_nonzero_value): New function.
|
||
(vect_preserves_scalar_order_p): New function, split out from...
|
||
(vect_analyze_data_ref_dependence): ...here. Check for zero steps.
|
||
(vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
|
||
(vect_vfa_access_size): New function.
|
||
(vect_vfa_align): Likewise.
|
||
(vect_compile_time_alias): Take access_size_a and access_b arguments.
|
||
(dump_lower_bound): New function.
|
||
(vect_check_lower_bound): Likewise.
|
||
(vect_small_gap_p): Likewise.
|
||
(vectorizable_with_step_bound_p): Likewise.
|
||
(vect_prune_runtime_alias_test_list): Ignore cross-iteration
|
||
depencies if the vectorization factor is 1. Convert the checks
|
||
for nonzero steps into checks on the bounds of DR_STEP. Try using
|
||
a bunds check for variable steps if the minimum required step is
|
||
relatively small. Update calls to the dr_with_seg_len
|
||
constructor and to vect_compile_time_alias.
|
||
* tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
|
||
function.
|
||
(vect_loop_versioning): Call it.
|
||
* tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
|
||
when retrying.
|
||
(vect_estimate_min_profitable_iters): Account for any bounds checks.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/sourcebuild.texi (vect_scatter_store): Document.
|
||
* optabs.def (scatter_store_optab, mask_scatter_store_optab): New
|
||
optabs.
|
||
* doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
|
||
Document.
|
||
* genopinit.c (main): Add supports_vec_scatter_store and
|
||
supports_vec_scatter_store_cached to target_optabs.
|
||
* gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
|
||
IFN_MASK_SCATTER_STORE.
|
||
* internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
|
||
functions.
|
||
* internal-fn.h (internal_store_fn_p): Declare.
|
||
(internal_fn_stored_value_index): Likewise.
|
||
* internal-fn.c (scatter_store_direct): New macro.
|
||
(expand_scatter_store_optab_fn): New function.
|
||
(direct_scatter_store_optab_supported_p): New macro.
|
||
(internal_store_fn_p): New function.
|
||
(internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
|
||
IFN_MASK_SCATTER_STORE.
|
||
(internal_fn_mask_index): Likewise.
|
||
(internal_fn_stored_value_index): New function.
|
||
(internal_gather_scatter_fn_supported_p): Adjust operand numbers
|
||
for scatter stores.
|
||
* optabs-query.h (supports_vec_scatter_store_p): Declare.
|
||
* optabs-query.c (supports_vec_scatter_store_p): New function.
|
||
* tree-vectorizer.h (vect_get_store_rhs): Declare.
|
||
* tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
|
||
true for scatter stores.
|
||
(vect_gather_scatter_fn_p): Handle scatter stores too.
|
||
(vect_check_gather_scatter): Consider using scatter stores if
|
||
supports_vec_scatter_store_p.
|
||
* tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
|
||
scatter stores too.
|
||
* tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
|
||
internal_fn_stored_value_index.
|
||
(check_load_store_masking): Handle scatter stores too.
|
||
(vect_get_store_rhs): Make public.
|
||
(vectorizable_call): Use internal_store_fn_p.
|
||
(vectorizable_store): Handle scatter store internal functions.
|
||
(vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
|
||
when deciding whether the end of the group has been reached.
|
||
* config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
|
||
* config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
|
||
(mask_scatter_store<mode>): New insns.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
|
||
* tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
|
||
* tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
|
||
function.
|
||
(vect_use_strided_gather_scatters_p): Take a masked_p argument.
|
||
Use vect_truncate_gather_scatter_offset if we can't treat the
|
||
operation as a normal gather load or scatter store.
|
||
(get_group_load_store_type): Take the gather_scatter_info
|
||
as argument. Try using a gather load or scatter store for
|
||
single-element groups.
|
||
(get_load_store_type): Update calls to get_group_load_store_type
|
||
and vect_use_strided_gather_scatters_p.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
|
||
optional tree argument.
|
||
* tree-vect-data-refs.c (vect_check_gather_scatter): Check for
|
||
null target hooks.
|
||
(vect_create_data_ref_ptr): Take the iv_step as an optional argument,
|
||
but continue to use the current value as a fallback.
|
||
(bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
|
||
to compare the updates.
|
||
* tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
|
||
(get_load_store_type): Use it when handling a strided access.
|
||
(vect_get_strided_load_store_ops): New function.
|
||
(vect_get_data_ptr_increment): Likewise.
|
||
(vectorizable_load): Handle strided gather loads. Always pass
|
||
a step to vect_create_data_ref_ptr and bump_vector_ptr.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/md.texi (gather_load@var{m}): Document.
|
||
(mask_gather_load@var{m}): Likewise.
|
||
* genopinit.c (main): Add supports_vec_gather_load and
|
||
supports_vec_gather_load_cached to target_optabs.
|
||
* optabs-tree.c (init_tree_optimization_optabs): Use
|
||
ggc_cleared_alloc to allocate target_optabs.
|
||
* optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
|
||
* internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
|
||
functions.
|
||
* internal-fn.h (internal_load_fn_p): Declare.
|
||
(internal_gather_scatter_fn_p): Likewise.
|
||
(internal_fn_mask_index): Likewise.
|
||
(internal_gather_scatter_fn_supported_p): Likewise.
|
||
* internal-fn.c (gather_load_direct): New macro.
|
||
(expand_gather_load_optab_fn): New function.
|
||
(direct_gather_load_optab_supported_p): New macro.
|
||
(direct_internal_fn_optab): New function.
|
||
(internal_load_fn_p): Likewise.
|
||
(internal_gather_scatter_fn_p): Likewise.
|
||
(internal_fn_mask_index): Likewise.
|
||
(internal_gather_scatter_fn_supported_p): Likewise.
|
||
* optabs-query.c (supports_at_least_one_mode_p): New function.
|
||
(supports_vec_gather_load_p): Likewise.
|
||
* optabs-query.h (supports_vec_gather_load_p): Declare.
|
||
* tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
|
||
and memory_type field.
|
||
(NUM_PATTERNS): Bump to 15.
|
||
* tree-vect-data-refs.c: Include internal-fn.h.
|
||
(vect_gather_scatter_fn_p): New function.
|
||
(vect_describe_gather_scatter_call): Likewise.
|
||
(vect_check_gather_scatter): Try using internal functions for
|
||
gather loads. Recognize existing calls to a gather load function.
|
||
(vect_analyze_data_refs): Consider using gather loads if
|
||
supports_vec_gather_load_p.
|
||
* tree-vect-patterns.c (vect_get_load_store_mask): New function.
|
||
(vect_get_gather_scatter_offset_type): Likewise.
|
||
(vect_convert_mask_for_vectype): Likewise.
|
||
(vect_add_conversion_to_patterm): Likewise.
|
||
(vect_try_gather_scatter_pattern): Likewise.
|
||
(vect_recog_gather_scatter_pattern): New pattern recognizer.
|
||
(vect_vect_recog_func_ptrs): Add it.
|
||
* tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
|
||
internal_fn_mask_index and internal_gather_scatter_fn_p.
|
||
(check_load_store_masking): Take the gather_scatter_info as an
|
||
argument and handle gather loads.
|
||
(vect_get_gather_scatter_ops): New function.
|
||
(vectorizable_call): Check internal_load_fn_p.
|
||
(vectorizable_load): Likewise. Handle gather load internal
|
||
functions.
|
||
(vectorizable_store): Update call to check_load_store_masking.
|
||
* config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
|
||
* config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
|
||
* config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
|
||
(aarch64_gather_scale_operand_d): New predicates.
|
||
* config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
|
||
(mask_gather_load<mode>): New insns.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* optabs.def (fold_left_plus_optab): New optab.
|
||
* doc/md.texi (fold_left_plus_@var{m}): Document.
|
||
* internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
|
||
* internal-fn.c (fold_left_direct): Define.
|
||
(expand_fold_left_optab_fn): Likewise.
|
||
(direct_fold_left_optab_supported_p): Likewise.
|
||
* fold-const-call.c (fold_const_fold_left): New function.
|
||
(fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
|
||
* tree-parloops.c (valid_reduction_p): New function.
|
||
(gather_scalar_reductions): Use it.
|
||
* tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
|
||
(vect_finish_replace_stmt): Declare.
|
||
* tree-vect-loop.c (fold_left_reduction_fn): New function.
|
||
(needs_fold_left_reduction_p): New function, split out from...
|
||
(vect_is_simple_reduction): ...here. Accept reductions that
|
||
forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
|
||
(vect_force_simple_reduction): Also store the reduction type in
|
||
the assignment's STMT_VINFO_REDUC_TYPE.
|
||
(vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
|
||
(merge_with_identity): New function.
|
||
(vect_expand_fold_left): Likewise.
|
||
(vectorize_fold_left_reduction): Likewise.
|
||
(vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
|
||
scalar phi in place for it. Check for target support and reject
|
||
cases that would reassociate the operation. Defer the transform
|
||
phase to vectorize_fold_left_reduction.
|
||
* config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
|
||
* config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
|
||
(*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-if-conv.c (predicate_mem_writes): Remove redundant
|
||
call to ifc_temp_var.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* target.def (legitimize_address_displacement): Take the original
|
||
offset as a poly_int.
|
||
* targhooks.h (default_legitimize_address_displacement): Update
|
||
accordingly.
|
||
* targhooks.c (default_legitimize_address_displacement): Likewise.
|
||
* doc/tm.texi: Regenerate.
|
||
* lra-constraints.c (base_plus_disp_to_reg): Take the displacement
|
||
as an argument, moving assert of ad->disp == ad->disp_term to...
|
||
(process_address_1): ...here. Update calls to base_plus_disp_to_reg.
|
||
Try calling targetm.legitimize_address_displacement before expanding
|
||
the address rather than afterwards, and adjust for the new interface.
|
||
* config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
|
||
Match the new hook interface. Handle SVE addresses.
|
||
* config/sh/sh.c (sh_legitimize_address_displacement): Make the
|
||
new hook interface.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* Makefile.in (OBJS): Add early-remat.o.
|
||
* target.def (select_early_remat_modes): New hook.
|
||
* doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
|
||
* doc/tm.texi: Regenerate.
|
||
* targhooks.h (default_select_early_remat_modes): Declare.
|
||
* targhooks.c (default_select_early_remat_modes): New function.
|
||
* timevar.def (TV_EARLY_REMAT): New timevar.
|
||
* passes.def (pass_early_remat): New pass.
|
||
* tree-pass.h (make_pass_early_remat): Declare.
|
||
* early-remat.c: New file.
|
||
* config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
|
||
function.
|
||
(TARGET_SELECT_EARLY_REMAT_MODES): Define.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
|
||
vfm1 with a bound_epilog parameter.
|
||
(vect_do_peeling): Update calls accordingly, and move the prologue
|
||
call earlier in the function. Treat the base bound_epilog as 0 for
|
||
fully-masked loops and retain vf - 1 for other loops. Add 1 to
|
||
this base when peeling for gaps.
|
||
* tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
|
||
with fully-masked loops.
|
||
(vect_estimate_min_profitable_iters): Handle the single peeled
|
||
iteration in that case.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
|
||
single-element interleaving even if the size is not a power of 2.
|
||
* tree-vect-stmts.c (get_load_store_type): Disallow elementwise
|
||
accesses for single-element interleaving if the group size is
|
||
not a power of 2.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/md.texi (fold_extract_last_@var{m}): Document.
|
||
* doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
|
||
* optabs.def (fold_extract_last_optab): New optab.
|
||
* internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
|
||
* internal-fn.c (fold_extract_direct): New macro.
|
||
(expand_fold_extract_optab_fn): Likewise.
|
||
(direct_fold_extract_optab_supported_p): Likewise.
|
||
* tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
|
||
* tree-vect-loop.c (vect_model_reduction_cost): Handle
|
||
EXTRACT_LAST_REDUCTION.
|
||
(get_initial_def_for_reduction): Do not create an initial vector
|
||
for EXTRACT_LAST_REDUCTION reductions.
|
||
(vectorizable_reduction): Leave the scalar phi in place for
|
||
EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
|
||
ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
|
||
epilogue code for EXTRACT_LAST_REDUCTION and defer the
|
||
transform phase to vectorizable_condition.
|
||
* tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
|
||
split out from...
|
||
(vect_finish_stmt_generation): ...here.
|
||
(vect_finish_replace_stmt): New function.
|
||
(vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
|
||
* config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
|
||
pattern.
|
||
* config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/md.texi (extract_last_@var{m}): Document.
|
||
* optabs.def (extract_last_optab): New optab.
|
||
* internal-fn.def (EXTRACT_LAST): New internal function.
|
||
* internal-fn.c (cond_unary_direct): New macro.
|
||
(expand_cond_unary_optab_fn): Likewise.
|
||
(direct_cond_unary_optab_supported_p): Likewise.
|
||
* tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
|
||
loops using EXTRACT_LAST.
|
||
* config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
|
||
(extract_last_<mode>): ...this optab.
|
||
(vec_extract<mode><Vel>): Update accordingly.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* target.def (empty_mask_is_expensive): New hook.
|
||
* doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
|
||
* doc/tm.texi: Regenerate.
|
||
* targhooks.h (default_empty_mask_is_expensive): Declare.
|
||
* targhooks.c (default_empty_mask_is_expensive): New function.
|
||
* tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
|
||
if the target says that empty masks are expensive.
|
||
* config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
|
||
New function.
|
||
(TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
|
||
(LOOP_VINFO_MASK_SKIP_NITERS): New macro.
|
||
(vect_use_loop_mask_for_alignment_p): New function.
|
||
(vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
|
||
* tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
|
||
niters_skip argument. Make sure that the first niters_skip elements
|
||
of the first iteration are inactive.
|
||
(vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
|
||
Update call to vect_set_loop_masks_directly.
|
||
(get_misalign_in_elems): New function, split out from...
|
||
(vect_gen_prolog_loop_niters): ...here.
|
||
(vect_update_init_of_dr): Take a code argument that specifies whether
|
||
the adjustment should be added or subtracted.
|
||
(vect_update_init_of_drs): Likewise.
|
||
(vect_prepare_for_masked_peels): New function.
|
||
(vect_do_peeling): Skip prologue peeling if we're using a mask
|
||
instead. Update call to vect_update_inits_of_drs.
|
||
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
|
||
mask_skip_niters.
|
||
(vect_analyze_loop_2): Allow fully-masked loops with peeling for
|
||
alignment. Do not include the number of peeled iterations in
|
||
the minimum threshold in that case.
|
||
(vectorizable_induction): Adjust the start value down by
|
||
LOOP_VINFO_MASK_SKIP_NITERS iterations.
|
||
(vect_transform_loop): Call vect_prepare_for_masked_peels.
|
||
Take the number of skipped iterations into account when calculating
|
||
the loop bounds.
|
||
* tree-vect-stmts.c (vect_gen_while_not): New function.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/sourcebuild.texi (vect_fully_masked): Document.
|
||
* params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
|
||
default value to 0.
|
||
* tree-vect-loop.c (vect_analyze_loop_costing): New function,
|
||
split out from...
|
||
(vect_analyze_loop_2): ...here. Don't check the vectorization
|
||
factor against the number of loop iterations if the loop is
|
||
fully-masked.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
|
||
(USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
|
||
(dump_groups): Update accordingly.
|
||
(iv_use::mem_type): New member variable.
|
||
(address_p): New function.
|
||
(record_use): Add a mem_type argument and initialize the new
|
||
mem_type field.
|
||
(record_group_use): Add a mem_type argument. Use address_p.
|
||
Remove obsolete null checks of base_object. Update call to record_use.
|
||
(find_interesting_uses_op): Update call to record_group_use.
|
||
(find_interesting_uses_cond): Likewise.
|
||
(find_interesting_uses_address): Likewise.
|
||
(get_mem_type_for_internal_fn): New function.
|
||
(find_address_like_use): Likewise.
|
||
(find_interesting_uses_stmt): Try find_address_like_use before
|
||
calling find_interesting_uses_op.
|
||
(addr_offset_valid_p): Use the iv mem_type field as the type
|
||
of the addressed memory.
|
||
(add_autoinc_candidates): Likewise.
|
||
(get_address_cost): Likewise.
|
||
(split_small_address_groups_p): Use address_p.
|
||
(split_address_groups): Likewise.
|
||
(add_iv_candidate_for_use): Likewise.
|
||
(autoinc_possible_for_pair): Likewise.
|
||
(rewrite_groups): Likewise.
|
||
(get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
|
||
(determine_group_iv_cost): Update after split of USE_ADDRESS.
|
||
(get_alias_ptr_type_for_ptr_address): New function.
|
||
(rewrite_use_address): Rewrite address uses in calls that were
|
||
identified by find_address_like_use.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
|
||
TARGET_MEM_REFs.
|
||
* gimple-expr.h (is_gimple_addressable: Likewise.
|
||
* gimple-expr.c (is_gimple_address): Likewise.
|
||
* internal-fn.c (expand_call_mem_ref): New function.
|
||
(expand_mask_load_optab_fn): Use it.
|
||
(expand_mask_store_optab_fn): Likewise.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
|
||
(cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
|
||
(cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
|
||
(cond_umax@var{mode}): Document.
|
||
* optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
|
||
(cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
|
||
(cond_umin_optab, cond_umax_optab): New optabs.
|
||
* internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
|
||
(COND_IOR, COND_XOR): New internal functions.
|
||
* internal-fn.h (get_conditional_internal_fn): Declare.
|
||
* internal-fn.c (cond_binary_direct): New macro.
|
||
(expand_cond_binary_optab_fn): Likewise.
|
||
(direct_cond_binary_optab_supported_p): Likewise.
|
||
(get_conditional_internal_fn): New function.
|
||
* tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
|
||
Cope with reduction statements that are vectorized as calls rather
|
||
than assignments.
|
||
* config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
|
||
* config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
|
||
(UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
|
||
(UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
|
||
(UNSPEC_COND_EOR): New unspecs.
|
||
(optab): Add mappings for them.
|
||
(SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
|
||
(sve_int_op, sve_fp_op): New int attributes.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* optabs.def (while_ult_optab): New optab.
|
||
* doc/md.texi (while_ult@var{m}@var{n}): Document.
|
||
* internal-fn.def (WHILE_ULT): New internal function.
|
||
* internal-fn.h (direct_internal_fn_supported_p): New override
|
||
that takes two types as argument.
|
||
* internal-fn.c (while_direct): New macro.
|
||
(expand_while_optab_fn): New function.
|
||
(convert_optab_supported_p): Likewise.
|
||
(direct_while_optab_supported_p): New macro.
|
||
* wide-int.h (wi::udiv_ceil): New function.
|
||
* tree-vectorizer.h (rgroup_masks): New structure.
|
||
(vec_loop_masks): New typedef.
|
||
(_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
|
||
and fully_masked_p.
|
||
(LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
|
||
(LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
|
||
(vect_max_vf): New function.
|
||
(slpeel_make_loop_iterate_ntimes): Delete.
|
||
(vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
|
||
(vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
|
||
(vect_record_loop_mask, vect_get_loop_mask): Likewise.
|
||
* tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
|
||
internal-fn.h, stor-layout.h and optabs-query.h.
|
||
(vect_set_loop_mask): New function.
|
||
(add_preheader_seq): Likewise.
|
||
(add_header_seq): Likewise.
|
||
(interleave_supported_p): Likewise.
|
||
(vect_maybe_permute_loop_masks): Likewise.
|
||
(vect_set_loop_masks_directly): Likewise.
|
||
(vect_set_loop_condition_masked): Likewise.
|
||
(vect_set_loop_condition_unmasked): New function, split out from
|
||
slpeel_make_loop_iterate_ntimes.
|
||
(slpeel_make_loop_iterate_ntimes): Rename to..
|
||
(vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
|
||
for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
|
||
(vect_do_peeling): Update call accordingly.
|
||
(vect_gen_vector_loop_niters): Use VF as the step for fully-masked
|
||
loops.
|
||
* tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
|
||
mask_compare_type, can_fully_mask_p and fully_masked_p.
|
||
(release_vec_loop_masks): New function.
|
||
(_loop_vec_info): Use it to free the loop masks.
|
||
(can_produce_all_loop_masks_p): New function.
|
||
(vect_get_max_nscalars_per_iter): Likewise.
|
||
(vect_verify_full_masking): Likewise.
|
||
(vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
|
||
retries, and free the mask rgroups before retrying. Check loop-wide
|
||
reasons for disallowing fully-masked loops. Make the final decision
|
||
about whether use a fully-masked loop or not.
|
||
(vect_estimate_min_profitable_iters): Do not assume that peeling
|
||
for the number of iterations will be needed for fully-masked loops.
|
||
(vectorizable_reduction): Disable fully-masked loops.
|
||
(vectorizable_live_operation): Likewise.
|
||
(vect_halve_mask_nunits): New function.
|
||
(vect_double_mask_nunits): Likewise.
|
||
(vect_record_loop_mask): Likewise.
|
||
(vect_get_loop_mask): Likewise.
|
||
(vect_transform_loop): Handle the case in which the final loop
|
||
iteration might handle a partial vector. Call vect_set_loop_condition
|
||
instead of slpeel_make_loop_iterate_ntimes.
|
||
* tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
|
||
(check_load_store_masking): New function.
|
||
(prepare_load_store_mask): Likewise.
|
||
(vectorizable_store): Handle fully-masked loops.
|
||
(vectorizable_load): Likewise.
|
||
(supportable_widening_operation): Use vect_halve_mask_nunits for
|
||
booleans.
|
||
(supportable_narrowing_operation): Likewise vect_double_mask_nunits.
|
||
(vect_gen_while): New function.
|
||
* config/aarch64/aarch64.md (umax<mode>3): New expander.
|
||
(aarch64_uqdec<mode>): New insn.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
|
||
(reduc_xor_scal_optab): New optabs.
|
||
* doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
|
||
(reduc_xor_scal_@var{m}): Document.
|
||
* doc/sourcebuild.texi (vect_logical_reduc): Likewise.
|
||
* internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
|
||
internal functions.
|
||
* fold-const-call.c (fold_const_call): Handle them.
|
||
* tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
|
||
internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
|
||
* config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
|
||
(*reduc_<bit_reduc>_scal_<mode>): New patterns.
|
||
* config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
|
||
(UNSPEC_XORV): New unspecs.
|
||
(optab): Add entries for them.
|
||
(BITWISEV): New int iterator.
|
||
(bit_reduc_op): New int attributes.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/md.texi (vec_shl_insert_@var{m}): New optab.
|
||
* internal-fn.def (VEC_SHL_INSERT): New internal function.
|
||
* optabs.def (vec_shl_insert_optab): New optab.
|
||
* tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
|
||
(duplicate_and_interleave): Likewise.
|
||
* tree-vect-loop.c: Include internal-fn.h.
|
||
(neutral_op_for_slp_reduction): New function, split out from
|
||
get_initial_defs_for_reduction.
|
||
(get_initial_def_for_reduction): Handle option 2 for variable-length
|
||
vectors by loading the neutral value into a vector and then shifting
|
||
the initial value into element 0.
|
||
(get_initial_defs_for_reduction): Replace the code argument with
|
||
the neutral value calculated by neutral_op_for_slp_reduction.
|
||
Use gimple_build_vector for constant-length vectors.
|
||
Use IFN_VEC_SHL_INSERT for variable-length vectors if all
|
||
but the first group_size elements have a neutral value.
|
||
Use duplicate_and_interleave otherwise.
|
||
(vect_create_epilog_for_reduction): Take a neutral_op parameter.
|
||
Update call to get_initial_defs_for_reduction. Handle SLP
|
||
reductions for variable-length vectors by creating one vector
|
||
result for each scalar result, with the elements associated
|
||
with other scalar results stubbed out with the neutral value.
|
||
(vectorizable_reduction): Call neutral_op_for_slp_reduction.
|
||
Require IFN_VEC_SHL_INSERT for double reductions on
|
||
variable-length vectors, or SLP reductions that have
|
||
a neutral value. Require can_duplicate_and_interleave_p
|
||
support for variable-length unchained SLP reductions if there
|
||
is no neutral value, such as for MIN/MAX reductions. Also require
|
||
the number of vector elements to be a multiple of the number of
|
||
SLP statements when doing variable-length unchained SLP reductions.
|
||
Update call to vect_create_epilog_for_reduction.
|
||
* tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
|
||
and remove initial values.
|
||
(duplicate_and_interleave): Make public.
|
||
* config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
|
||
* config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
|
||
(can_duplicate_and_interleave_p): New function.
|
||
(vect_get_and_check_slp_defs): Take the vector of statements
|
||
rather than just the current one. Remove excess parentheses.
|
||
Restriction rejectinon of vect_constant_def and vect_external_def
|
||
for variable-length vectors to boolean types, or types for which
|
||
can_duplicate_and_interleave_p is false.
|
||
(vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
|
||
(duplicate_and_interleave): New function.
|
||
(vect_get_constant_vectors): Use gimple_build_vector for
|
||
constant-length vectors and suitable variable-length constant
|
||
vectors. Use duplicate_and_interleave for other variable-length
|
||
vectors. Don't defer the update when inserting new statements.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
|
||
min_profitable_iters doesn't go negative.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
|
||
(vec_mask_store_lanes@var{m}@var{n}): Likewise.
|
||
* optabs.def (vec_mask_load_lanes_optab): New optab.
|
||
(vec_mask_store_lanes_optab): Likewise.
|
||
* internal-fn.def (MASK_LOAD_LANES): New internal function.
|
||
(MASK_STORE_LANES): Likewise.
|
||
* internal-fn.c (mask_load_lanes_direct): New macro.
|
||
(mask_store_lanes_direct): Likewise.
|
||
(expand_mask_load_optab_fn): Handle masked operations.
|
||
(expand_mask_load_lanes_optab_fn): New macro.
|
||
(expand_mask_store_optab_fn): Handle masked operations.
|
||
(expand_mask_store_lanes_optab_fn): New macro.
|
||
(direct_mask_load_lanes_optab_supported_p): Likewise.
|
||
(direct_mask_store_lanes_optab_supported_p): Likewise.
|
||
* tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
|
||
parameter.
|
||
(vect_load_lanes_supported): Likewise.
|
||
* tree-vect-data-refs.c (strip_conversion): New function.
|
||
(can_group_stmts_p): Likewise.
|
||
(vect_analyze_data_ref_accesses): Use it instead of checking
|
||
for a pair of assignments.
|
||
(vect_store_lanes_supported): Take a masked_p parameter.
|
||
(vect_load_lanes_supported): Likewise.
|
||
* tree-vect-loop.c (vect_analyze_loop_2): Update calls to
|
||
vect_store_lanes_supported and vect_load_lanes_supported.
|
||
* tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
|
||
* tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
|
||
parameter. Don't allow gaps for masked accesses.
|
||
Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
|
||
and vect_load_lanes_supported.
|
||
(get_load_store_type): Take a masked_p parameter and update
|
||
call to get_group_load_store_type.
|
||
(vectorizable_store): Update call to get_load_store_type.
|
||
Handle IFN_MASK_STORE_LANES.
|
||
(vectorizable_load): Update call to get_load_store_type.
|
||
Handle IFN_MASK_LOAD_LANES.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
|
||
modes for SVE.
|
||
* config/aarch64/aarch64-protos.h
|
||
(aarch64_sve_struct_memory_operand_p): Declare.
|
||
* config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
|
||
(vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
|
||
(VPRED, vpred): Handle SVE structure modes.
|
||
* config/aarch64/constraints.md (Utx): New constraint.
|
||
* config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
|
||
(aarch64_sve_struct_nonimmediate_operand): New predicates.
|
||
* config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
|
||
* config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
|
||
(*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
|
||
structure modes. Split into pieces after RA.
|
||
(vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
|
||
(vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
|
||
New patterns.
|
||
* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
|
||
SVE structure modes.
|
||
(aarch64_classify_address): Likewise.
|
||
(sizetochar): Move earlier in file.
|
||
(aarch64_print_operand): Handle SVE register lists.
|
||
(aarch64_array_mode): New function.
|
||
(aarch64_sve_struct_memory_operand_p): Likewise.
|
||
(TARGET_ARRAY_MODE): Redefine.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* target.def (array_mode): New target hook.
|
||
* doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
|
||
* doc/tm.texi: Regenerate.
|
||
* hooks.h (hook_optmode_mode_uhwi_none): Declare.
|
||
* hooks.c (hook_optmode_mode_uhwi_none): New function.
|
||
* tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
|
||
targetm.array_mode.
|
||
* stor-layout.c (mode_for_array): Likewise. Support polynomial
|
||
type sizes.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* fold-const.c (fold_binary_loc): Check the argument types
|
||
rather than the result type when testing for a vector operation.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
|
||
* doc/tm.texi: Regenerate.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* doc/invoke.texi (-msve-vector-bits=): Document new option.
|
||
(sve): Document new AArch64 extension.
|
||
* doc/md.texi (w): Extend the description of the AArch64
|
||
constraint to include SVE vectors.
|
||
(Upl, Upa): Document new AArch64 predicate constraints.
|
||
* config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
|
||
enum.
|
||
* config/aarch64/aarch64.opt (sve_vector_bits): New enum.
|
||
(msve-vector-bits=): New option.
|
||
* config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
|
||
SVE when these are disabled.
|
||
(sve): New extension.
|
||
* config/aarch64/aarch64-modes.def: Define SVE vector and predicate
|
||
modes. Adjust their number of units based on aarch64_sve_vg.
|
||
(MAX_BITSIZE_MODE_ANY_MODE): Define.
|
||
* config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
|
||
aarch64_addr_query_type.
|
||
(aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
|
||
(aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
|
||
(aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
|
||
(aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
|
||
(aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
|
||
(aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
|
||
(aarch64_simd_imm_zero_p): Delete.
|
||
(aarch64_check_zero_based_sve_index_immediate): Declare.
|
||
(aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
|
||
(aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
|
||
(aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
|
||
(aarch64_sve_float_mul_immediate_p): Likewise.
|
||
(aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
|
||
rather than an rtx.
|
||
(aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
|
||
(aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
|
||
(aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
|
||
(aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
|
||
(aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
|
||
(aarch64_regmode_natural_size): Likewise.
|
||
* config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
|
||
(AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
|
||
left one place.
|
||
(AARCH64_ISA_SVE, TARGET_SVE): New macros.
|
||
(FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
|
||
for VG and the SVE predicate registers.
|
||
(V_ALIASES): Add a "z"-prefixed alias.
|
||
(FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
|
||
(AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
|
||
(PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
|
||
(PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
|
||
(REG_CLASS_NAMES): Add entries for them.
|
||
(REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
|
||
and the predicate registers.
|
||
(aarch64_sve_vg): Declare.
|
||
(BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
|
||
(SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
|
||
(REGMODE_NATURAL_SIZE): Define.
|
||
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
|
||
SVE macros.
|
||
* config/aarch64/aarch64.c: Include cfgrtl.h.
|
||
(simd_immediate_info): Add a constructor for series vectors,
|
||
and an associated step field.
|
||
(aarch64_sve_vg): New variable.
|
||
(aarch64_dbx_register_number): Handle VG and the predicate registers.
|
||
(aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
|
||
(VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
|
||
(VEC_ANY_DATA, VEC_STRUCT): New constants.
|
||
(aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
|
||
(aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
|
||
(aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
|
||
(aarch64_get_mask_mode): New functions.
|
||
(aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
|
||
and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
|
||
(aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
|
||
predicate modes and predicate registers. Explicitly restrict
|
||
GPRs to modes of 16 bytes or smaller. Only allow FP registers
|
||
to store a vector mode if it is recognized by
|
||
aarch64_classify_vector_mode.
|
||
(aarch64_regmode_natural_size): New function.
|
||
(aarch64_hard_regno_caller_save_mode): Return the original mode
|
||
for predicates.
|
||
(aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
|
||
(aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
|
||
(aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
|
||
(aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
|
||
functions.
|
||
(aarch64_add_offset): Add a temp2 parameter. Assert that temp1
|
||
does not overlap dest if the function is frame-related. Handle
|
||
SVE constants.
|
||
(aarch64_split_add_offset): New function.
|
||
(aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
|
||
them aarch64_add_offset.
|
||
(aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
|
||
and update call to aarch64_sub_sp.
|
||
(aarch64_add_cfa_expression): New function.
|
||
(aarch64_expand_prologue): Pass extra temporary registers to the
|
||
functions above. Handle the case in which we need to emit new
|
||
DW_CFA_expressions for registers that were originally saved
|
||
relative to the stack pointer, but now have to be expressed
|
||
relative to the frame pointer.
|
||
(aarch64_output_mi_thunk): Pass extra temporary registers to the
|
||
functions above.
|
||
(aarch64_expand_epilogue): Likewise. Prevent inheritance of
|
||
IP0 and IP1 values for SVE frames.
|
||
(aarch64_expand_vec_series): New function.
|
||
(aarch64_expand_sve_widened_duplicate): Likewise.
|
||
(aarch64_expand_sve_const_vector): Likewise.
|
||
(aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
|
||
Handle SVE constants. Use emit_move_insn to move a force_const_mem
|
||
into the register, rather than emitting a SET directly.
|
||
(aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
|
||
(aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
|
||
(offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
|
||
(offset_9bit_signed_scaled_p): New functions.
|
||
(aarch64_replicate_bitmask_imm): New function.
|
||
(aarch64_bitmask_imm): Use it.
|
||
(aarch64_cannot_force_const_mem): Reject expressions involving
|
||
a CONST_POLY_INT. Update call to aarch64_classify_symbol.
|
||
(aarch64_classify_index): Handle SVE indices, by requiring
|
||
a plain register index with a scale that matches the element size.
|
||
(aarch64_classify_address): Handle SVE addresses. Assert that
|
||
the mode of the address is VOIDmode or an integer mode.
|
||
Update call to aarch64_classify_symbol.
|
||
(aarch64_classify_symbolic_expression): Update call to
|
||
aarch64_classify_symbol.
|
||
(aarch64_const_vec_all_in_range_p): New function.
|
||
(aarch64_print_vector_float_operand): Likewise.
|
||
(aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
|
||
"vN" for FP registers with SVE modes. Handle (const ...) vectors
|
||
and the FP immediates 1.0 and 0.5.
|
||
(aarch64_print_address_internal): Handle SVE addresses.
|
||
(aarch64_print_operand_address): Use ADDR_QUERY_ANY.
|
||
(aarch64_regno_regclass): Handle predicate registers.
|
||
(aarch64_secondary_reload): Handle big-endian reloads of SVE
|
||
data modes.
|
||
(aarch64_class_max_nregs): Handle SVE modes and predicate registers.
|
||
(aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
|
||
(aarch64_convert_sve_vector_bits): New function.
|
||
(aarch64_override_options): Use it to handle -msve-vector-bits=.
|
||
(aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
|
||
rather than an rtx.
|
||
(aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
|
||
Handle SVE vector and predicate modes. Accept VL-based constants
|
||
that need only one temporary register, and VL offsets that require
|
||
no temporary registers.
|
||
(aarch64_conditional_register_usage): Mark the predicate registers
|
||
as fixed if SVE isn't available.
|
||
(aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
|
||
Return true for SVE vector and predicate modes.
|
||
(aarch64_simd_container_mode): Take the number of bits as a poly_int64
|
||
rather than an unsigned int. Handle SVE modes.
|
||
(aarch64_preferred_simd_mode): Update call accordingly. Handle
|
||
SVE modes.
|
||
(aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
|
||
if SVE is enabled.
|
||
(aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
|
||
(aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
|
||
(aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
|
||
(aarch64_sve_float_mul_immediate_p): New functions.
|
||
(aarch64_sve_valid_immediate): New function.
|
||
(aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
|
||
Explicitly reject structure modes. Check for INDEX constants.
|
||
Handle PTRUE and PFALSE constants.
|
||
(aarch64_check_zero_based_sve_index_immediate): New function.
|
||
(aarch64_simd_imm_zero_p): Delete.
|
||
(aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
|
||
vector modes. Accept constants in the range of CNT[BHWD].
|
||
(aarch64_simd_scalar_immediate_valid_for_move): Explicitly
|
||
ask for an Advanced SIMD mode.
|
||
(aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
|
||
(aarch64_simd_vector_alignment): Handle SVE predicates.
|
||
(aarch64_vectorize_preferred_vector_alignment): New function.
|
||
(aarch64_simd_vector_alignment_reachable): Use it instead of
|
||
the vector size.
|
||
(aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
|
||
(aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
|
||
functions.
|
||
(MAX_VECT_LEN): Delete.
|
||
(expand_vec_perm_d): Add a vec_flags field.
|
||
(emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
|
||
(aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
|
||
(aarch64_evpc_ext): Don't apply a big-endian lane correction
|
||
for SVE modes.
|
||
(aarch64_evpc_rev): Rename to...
|
||
(aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
|
||
(aarch64_evpc_rev_global): New function.
|
||
(aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
|
||
(aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
|
||
MAX_VECT_LEN.
|
||
(aarch64_evpc_sve_tbl): New function.
|
||
(aarch64_expand_vec_perm_const_1): Update after rename of
|
||
aarch64_evpc_rev. Handle SVE permutes too, trying
|
||
aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
|
||
than aarch64_evpc_tbl.
|
||
(aarch64_vectorize_vec_perm_const): Initialize vec_flags.
|
||
(aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
|
||
(aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
|
||
(aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
|
||
(aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
|
||
(aarch64_expand_sve_vcond): New functions.
|
||
(aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
|
||
of aarch64_vector_mode_p.
|
||
(aarch64_dwarf_poly_indeterminate_value): New function.
|
||
(aarch64_compute_pressure_classes): Likewise.
|
||
(aarch64_can_change_mode_class): Likewise.
|
||
(TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
|
||
(TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
|
||
(TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
|
||
(TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
|
||
(TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
|
||
(TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
|
||
* config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
|
||
(Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
|
||
constraints.
|
||
(Dn, Dl, Dr): Accept const as well as const_vector.
|
||
(Dz): Likewise. Compare against CONST0_RTX.
|
||
* config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
|
||
of "vector" where appropriate.
|
||
(SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
|
||
(SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
|
||
(UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
|
||
(UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
|
||
(UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
|
||
(UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
|
||
(Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
|
||
(v_int_equiv): Extend to SVE modes.
|
||
(Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
|
||
mode attributes.
|
||
(LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
|
||
(optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
|
||
(logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
|
||
(LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
|
||
(SVE_COND_FP_CMP): New int iterators.
|
||
(perm_hilo): Handle the new unpack unspecs.
|
||
(optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
|
||
attributes.
|
||
* config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
|
||
(aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
|
||
(aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
|
||
(aarch64_equality_operator, aarch64_constant_vector_operand)
|
||
(aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
|
||
(aarch64_sve_nonimmediate_operand): Likewise.
|
||
(aarch64_sve_general_operand): Likewise.
|
||
(aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
|
||
(aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
|
||
(aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
|
||
(aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
|
||
(aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
|
||
(aarch64_sve_float_arith_immediate): Likewise.
|
||
(aarch64_sve_float_arith_with_sub_immediate): Likewise.
|
||
(aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
|
||
(aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
|
||
(aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
|
||
(aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
|
||
(aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
|
||
(aarch64_sve_float_arith_operand): Likewise.
|
||
(aarch64_sve_float_arith_with_sub_operand): Likewise.
|
||
(aarch64_sve_float_mul_operand): Likewise.
|
||
(aarch64_sve_vec_perm_operand): Likewise.
|
||
(aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
|
||
(aarch64_mov_operand): Accept const_poly_int and const_vector.
|
||
(aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
|
||
as well as const_vector.
|
||
(aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
|
||
in file. Use CONST0_RTX and CONSTM1_RTX.
|
||
(aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
|
||
(aarch64_simd_reg_or_zero): Accept const as well as const_vector.
|
||
Use aarch64_simd_imm_zero.
|
||
* config/aarch64/aarch64-sve.md: New file.
|
||
* config/aarch64/aarch64.md: Include it.
|
||
(VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
|
||
(UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
|
||
(UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
|
||
(UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
|
||
(UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
|
||
(sve): New attribute.
|
||
(enabled): Disable instructions with the sve attribute unless
|
||
TARGET_SVE.
|
||
(movqi, movhi): Pass CONST_POLY_INT operaneds through
|
||
aarch64_expand_mov_immediate.
|
||
(*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
|
||
CNT[BHSD] immediates.
|
||
(movti): Split CONST_POLY_INT moves into two halves.
|
||
(add<mode>3): Accept aarch64_pluslong_or_poly_operand.
|
||
Split additions that need a temporary here if the destination
|
||
is the stack pointer.
|
||
(*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
|
||
(*add<mode>3_poly_1): New instruction.
|
||
(set_clobber_cc): New expander.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
|
||
parameter and use it instead of GET_MODE_SIZE (innermode). Use
|
||
inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
|
||
Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
|
||
GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
|
||
Change innermode from fixed_mode_size to machine_mode.
|
||
(simplify_subreg): Update call accordingly. Handle a constant-sized
|
||
subreg of a variable-length CONST_VECTOR.
|
||
|
||
2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
|
||
(add_offset_to_base): New function, split out from...
|
||
(create_mem_ref): ...here. When handling a scale other than 1,
|
||
check first whether the address is valid without the offset.
|
||
Add it into the base if so, leaving the index and scale as-is.
|
||
|
||
2018-01-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c++/83778
|
||
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
|
||
fold_for_warn before checking if arg2 is INTEGER_CST.
|
||
|
||
2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/predicates.md (load_multiple_operation): Delete.
|
||
(store_multiple_operation): Delete.
|
||
* config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
|
||
* config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
|
||
* config/rs6000/rs6000-string.c (expand_block_move): Delete everything
|
||
guarded by TARGET_STRING.
|
||
(rs6000_output_load_multiple): Delete.
|
||
* config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
|
||
OPTION_MASK_STRING / TARGET_STRING handling.
|
||
(print_operand) <'N', 'O'>: Add comment that these are unused now.
|
||
(const rs6000_opt_masks) <"string">: Change mask to 0.
|
||
* config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
|
||
(MASK_STRING): Delete.
|
||
* config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
|
||
parts. Simplify.
|
||
(load_multiple): Delete.
|
||
(*ldmsi8): Delete.
|
||
(*ldmsi7): Delete.
|
||
(*ldmsi6): Delete.
|
||
(*ldmsi5): Delete.
|
||
(*ldmsi4): Delete.
|
||
(*ldmsi3): Delete.
|
||
(store_multiple): Delete.
|
||
(*stmsi8): Delete.
|
||
(*stmsi7): Delete.
|
||
(*stmsi6): Delete.
|
||
(*stmsi5): Delete.
|
||
(*stmsi4): Delete.
|
||
(*stmsi3): Delete.
|
||
(movmemsi_8reg): Delete.
|
||
(corresponding unnamed define_insn): Delete.
|
||
(movmemsi_6reg): Delete.
|
||
(corresponding unnamed define_insn): Delete.
|
||
(movmemsi_4reg): Delete.
|
||
(corresponding unnamed define_insn): Delete.
|
||
(movmemsi_2reg): Delete.
|
||
(corresponding unnamed define_insn): Delete.
|
||
(movmemsi_1reg): Delete.
|
||
(corresponding unnamed define_insn): Delete.
|
||
* config/rs6000/rs6000.opt (mno-string): New.
|
||
(mstring): Replace by deprecation warning stub.
|
||
* doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
|
||
|
||
2018-01-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* regrename.c (regrename_do_replace): If replacing the same
|
||
reg multiple times, try to reuse last created gen_raw_REG.
|
||
|
||
PR debug/81155
|
||
* bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
|
||
main to workaround a bug in GDB.
|
||
|
||
2018-01-12 Tom de Vries <tom@codesourcery.com>
|
||
|
||
PR target/83737
|
||
* config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
|
||
|
||
2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/80481
|
||
* ira-color.c (get_cap_member): New function.
|
||
(allocnos_conflict_by_live_ranges_p): Use it.
|
||
(slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
|
||
(setup_slot_coalesced_allocno_live_ranges): Ditto.
|
||
|
||
2018-01-12 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/83628
|
||
* config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
|
||
(*saddl_se_1): Ditto.
|
||
(*ssubsi_1): Ditto.
|
||
(*ssubl_se_1): Ditto.
|
||
|
||
2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
|
||
rather than wi::to_widest for DR_INITs.
|
||
* tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
|
||
wi::to_poly_offset rather than wi::to_offset for DR_INIT.
|
||
(vect_analyze_data_ref_accesses): Require both DR_INITs to be
|
||
INTEGER_CSTs.
|
||
(vect_analyze_group_access_1): Note that here.
|
||
|
||
2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
|
||
polynomial type sizes.
|
||
|
||
2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
|
||
poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
|
||
(gimple_add_tmp_var): Likewise.
|
||
|
||
2018-01-12 Martin Liska <mliska@suse.cz>
|
||
|
||
* gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
|
||
(gimple_alloc_sizes): Likewise.
|
||
(dump_gimple_statistics): Use PRIu64 in printf format.
|
||
* gimple.h: Change uint64_t to int.
|
||
|
||
2018-01-12 Martin Liska <mliska@suse.cz>
|
||
|
||
* tree-core.h: Use uint64_t instead of int.
|
||
* tree.c (tree_node_counts): Likewise.
|
||
(tree_node_sizes): Likewise.
|
||
(dump_tree_statistics): Use PRIu64 in printf format.
|
||
|
||
2018-01-12 Martin Liska <mliska@suse.cz>
|
||
|
||
* Makefile.in: As qsort_chk is implemented in vec.c, add
|
||
vec.o to linkage of gencfn-macros.
|
||
* tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
|
||
passing the info to record_node_allocation_statistics.
|
||
(test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
|
||
and pass the info.
|
||
* ggc-common.c (struct ggc_usage): Add operator== and use
|
||
it in operator< and compare function.
|
||
* mem-stats.h (struct mem_usage): Likewise.
|
||
* vec.c (struct vec_usage): Remove operator< and compare
|
||
function. Can be simply inherited.
|
||
|
||
2018-01-12 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR target/81616
|
||
* params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
|
||
* tree-ssa-math-opts.c: Include domwalk.h.
|
||
(convert_mult_to_fma_1): New function.
|
||
(fma_transformation_info): New type.
|
||
(fma_deferring_state): Likewise.
|
||
(cancel_fma_deferring): New function.
|
||
(result_of_phi): Likewise.
|
||
(last_fma_candidate_feeds_initial_phi): Likewise.
|
||
(convert_mult_to_fma): Added deferring logic, split actual
|
||
transformation to convert_mult_to_fma_1.
|
||
(math_opts_dom_walker): New type.
|
||
(math_opts_dom_walker::after_dom_children): New method, body moved
|
||
here from pass_optimize_widening_mul::execute, added deferring logic
|
||
bits.
|
||
(pass_optimize_widening_mul::execute): Moved most of code to
|
||
math_opts_dom_walker::after_dom_children.
|
||
* config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
|
||
* config/i386/i386.c (ix86_option_override_internal): Added
|
||
maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
|
||
|
||
2018-01-12 Richard Biener <rguenther@suse.de>
|
||
|
||
PR debug/83157
|
||
* dwarf2out.c (gen_variable_die): Do not reset old_die for
|
||
inline instance vars.
|
||
|
||
2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
|
||
|
||
PR target/81819
|
||
* config/rx/rx.c (rx_is_restricted_memory_address):
|
||
Handle SUBREG case.
|
||
|
||
2018-01-12 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/80846
|
||
* target.def (split_reduction): New target hook.
|
||
* targhooks.c (default_split_reduction): New function.
|
||
* targhooks.h (default_split_reduction): Declare.
|
||
* tree-vect-loop.c (vect_create_epilog_for_reduction): If the
|
||
target requests first reduce vectors by combining low and high
|
||
parts.
|
||
* tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
|
||
(get_vectype_for_scalar_type_and_size): Export.
|
||
* tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
|
||
* doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
|
||
* doc/tm.texi: Regenerate.
|
||
* config/i386/i386.c (ix86_split_reduction): Implement
|
||
TARGET_VECTORIZE_SPLIT_REDUCTION.
|
||
|
||
2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR target/83368
|
||
* config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
|
||
in PIC mode except for TARGET_VXWORKS_RTP.
|
||
* config/sparc/sparc.c: Include cfgrtl.h.
|
||
(TARGET_INIT_PIC_REG): Define.
|
||
(TARGET_USE_PSEUDO_PIC_REG): Likewise.
|
||
(sparc_pic_register_p): New predicate.
|
||
(sparc_legitimate_address_p): Use it.
|
||
(sparc_legitimize_pic_address): Likewise.
|
||
(sparc_delegitimize_address): Likewise.
|
||
(sparc_mode_dependent_address_p): Likewise.
|
||
(gen_load_pcrel_sym): Remove 4th parameter.
|
||
(load_got_register): Adjust call to above. Remove obsolete stuff.
|
||
(sparc_expand_prologue): Do not call load_got_register here.
|
||
(sparc_flat_expand_prologue): Likewise.
|
||
(sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
|
||
(sparc_use_pseudo_pic_reg): New function.
|
||
(sparc_init_pic_reg): Likewise.
|
||
* config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
|
||
(builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
|
||
|
||
2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
|
||
|
||
* doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
|
||
Add item for branch_cost.
|
||
|
||
2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR rtl-optimization/83565
|
||
* rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
|
||
not extend the result to a larger mode for rotate operations.
|
||
(num_sign_bit_copies1): Likewise.
|
||
|
||
2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
|
||
|
||
PR target/40411
|
||
* config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
|
||
-symbolic.
|
||
Use values-Xc.o for -pedantic.
|
||
Link with values-xpg4.o for C90, values-xpg6.o otherwise.
|
||
|
||
2018-01-12 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/83054
|
||
* ipa-devirt.c (final_warning_record::grow_type_warnings):
|
||
New function.
|
||
(possible_polymorphic_call_targets): Use it.
|
||
(ipa_devirt): Likewise.
|
||
|
||
2018-01-12 Martin Liska <mliska@suse.cz>
|
||
|
||
* profile-count.h (enum profile_quality): Use 0 as invalid
|
||
enum value of profile_quality.
|
||
|
||
2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
|
||
|
||
* doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
|
||
-mext-string options.
|
||
|
||
2018-01-12 Richard Biener <rguenther@suse.de>
|
||
|
||
* lto-streamer-out.c (DFS::DFS_write_tree_body): Process
|
||
DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
|
||
* tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
|
||
Likewise.
|
||
* tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
|
||
|
||
2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
* configure.ac (--with-long-double-format): Add support for the
|
||
configuration option to change the default long double format on
|
||
PowerPC systems.
|
||
* config.gcc (powerpc*-linux*-*): Likewise.
|
||
* configure: Regenerate.
|
||
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
|
||
double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
|
||
used without modification.
|
||
|
||
2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
|
||
(SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
|
||
* config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
|
||
MISC_BUILTIN_SPEC_BARRIER.
|
||
(rs6000_init_builtins): Likewise.
|
||
* config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
|
||
enum value.
|
||
(speculation_barrier): New define_insn.
|
||
* doc/extend.texi: Document __builtin_speculation_barrier.
|
||
|
||
2018-01-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/83203
|
||
* config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
|
||
is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
|
||
* config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
|
||
iterators.
|
||
(ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
|
||
integral modes instead of "ss" and "sd".
|
||
(vec_set<mode>_0): New define_insns for 256-bit and 512-bit
|
||
vectors with 32-bit and 64-bit elements.
|
||
(vecdupssescalarmodesuffix): New mode attribute.
|
||
(vec_dup<mode>): Use it.
|
||
|
||
2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/83330
|
||
* config/i386/i386.c (ix86_compute_frame_layout): Align stack
|
||
frame if argument is passed on stack.
|
||
|
||
2018-01-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/82682
|
||
* ree.c (combine_reaching_defs): Optimize also
|
||
reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
|
||
reg2=any_extend(exp); reg1=reg2;, formatting fix.
|
||
|
||
2018-01-11 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR middle-end/83189
|
||
* gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
|
||
|
||
2018-01-11 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR middle-end/83718
|
||
* tree-inline.c (copy_cfg_body): Adjust num&den for scaling
|
||
after they are computed.
|
||
|
||
2018-01-11 Bin Cheng <bin.cheng@arm.com>
|
||
|
||
PR tree-optimization/83695
|
||
* gimple-loop-linterchange.cc
|
||
(tree_loop_interchange::interchange_loops): Call scev_reset_htab to
|
||
reset cached scev information after interchange.
|
||
(pass_linterchange::execute): Remove call to scev_reset_htab.
|
||
|
||
2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
|
||
vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
|
||
vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
|
||
vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
|
||
vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
|
||
vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
|
||
* config/arm/arm_neon_builtins.def (vfmal_lane_low,
|
||
vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
|
||
vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
|
||
vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
|
||
vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
|
||
* config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
|
||
(V_lane_reg): Likewise.
|
||
* config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
|
||
New define_expand.
|
||
(neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
|
||
(vfmal_lane_low<mode>_intrinsic,
|
||
vfmal_lane_low<vfmlsel2><mode>_intrinsic,
|
||
vfmal_lane_high<vfmlsel2><mode>_intrinsic,
|
||
vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
|
||
vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
|
||
vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
|
||
vfmsl_lane_high<mode>_intrinsic): New define_insns.
|
||
|
||
2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/arm/arm-cpus.in (fp16fml): New feature.
|
||
(ALL_SIMD): Add fp16fml.
|
||
(armv8.2-a): Add fp16fml as an option.
|
||
(armv8.3-a): Likewise.
|
||
(armv8.4-a): Add fp16fml as part of fp16.
|
||
* config/arm/arm.h (TARGET_FP16FML): Define.
|
||
* config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
|
||
when appropriate.
|
||
* config/arm/arm-modes.def (V2HF): Define.
|
||
* config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
|
||
vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
|
||
vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
|
||
* config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
|
||
vfmsl_low, vfmsl_high): New set of builtins.
|
||
* config/arm/iterators.md (PLUSMINUS): New code iterator.
|
||
(vfml_op): New code attribute.
|
||
(VFMLHALVES): New int iterator.
|
||
(VFML, VFMLSEL): New mode attributes.
|
||
(V_reg): Define mapping for V2HF.
|
||
(V_hi, V_lo): New mode attributes.
|
||
(VF_constraint): Likewise.
|
||
(vfml_half, vfml_half_selector): New int attributes.
|
||
* config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
|
||
define_expand.
|
||
(vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
|
||
vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
|
||
New define_insn.
|
||
* config/arm/t-arm-elf (v8_fps): Add fp16fml.
|
||
* config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
|
||
* config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
|
||
* doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
|
||
documentation.
|
||
* doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
|
||
Document new effective target and option set.
|
||
|
||
2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/arm/arm-cpus.in (armv8_4): New feature.
|
||
(ARMv8_4a): New fgroup.
|
||
(armv8.4-a): New arch.
|
||
* config/arm/arm-tables.opt: Regenerate.
|
||
* config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
|
||
* config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
|
||
* config/arm/t-multilib (v8_4_a_simd_variants): New variable.
|
||
Add matching rules for -march=armv8.4-a and extensions.
|
||
* doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
|
||
|
||
2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
|
||
|
||
PR target/81821
|
||
* config/rx/rx.md (BW): New mode attribute.
|
||
(sync_lock_test_and_setsi): Add mode suffix to insn output.
|
||
|
||
2018-01-11 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83435
|
||
* graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
|
||
* graphite-scop-detection.c (scop_detection::get_sese): Likewise.
|
||
* tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
|
||
|
||
2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
|
||
field.
|
||
(aarch64_classify_address): Initialize it. Track polynomial offsets.
|
||
(aarch64_print_address_internal): Use it to check for a zero offset.
|
||
|
||
2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
|
||
* config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
|
||
Return a poly_int64 rather than a HOST_WIDE_INT.
|
||
(aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
|
||
rather than a HOST_WIDE_INT.
|
||
* config/aarch64/aarch64.h (aarch64_frame): Protect with
|
||
HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
|
||
hard_fp_offset, frame_size, initial_adjust, callee_offset and
|
||
final_offset from HOST_WIDE_INT to poly_int64.
|
||
* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
|
||
to_constant when getting the number of units in an Advanced SIMD
|
||
mode.
|
||
(aarch64_builtin_vectorized_function): Check for a constant number
|
||
of units.
|
||
* config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
|
||
GET_MODE_SIZE.
|
||
(aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
|
||
attribute instead of GET_MODE_NUNITS.
|
||
* config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
|
||
(aarch64_class_max_nregs): Use the constant_lowest_bound of the
|
||
GET_MODE_SIZE for fixed-size registers.
|
||
(aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
|
||
(aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
|
||
(aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
|
||
(aarch64_legitimize_address_displacement, aarch64_secondary_reload)
|
||
(aarch64_print_operand, aarch64_print_address_internal)
|
||
(aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
|
||
(aarch64_short_vector_p, aapcs_vfp_sub_candidate)
|
||
(aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
|
||
Handle polynomial GET_MODE_SIZE.
|
||
(aarch64_hard_regno_caller_save_mode): Likewise. Return modes
|
||
wider than SImode without modification.
|
||
(tls_symbolic_operand_type): Use strip_offset instead of split_const.
|
||
(aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
|
||
(aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
|
||
passing and returning SVE modes.
|
||
(aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
|
||
rather than GEN_INT.
|
||
(aarch64_emit_probe_stack_range): Take the size as a poly_int64
|
||
rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
|
||
(aarch64_allocate_and_probe_stack_space): Likewise.
|
||
(aarch64_layout_frame): Cope with polynomial offsets.
|
||
(aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
|
||
start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
|
||
polynomial offsets.
|
||
(offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
|
||
(aarch64_offset_7bit_signed_scaled_p): Take the offset as a
|
||
poly_int64 rather than a HOST_WIDE_INT.
|
||
(aarch64_get_separate_components, aarch64_process_components)
|
||
(aarch64_expand_prologue, aarch64_expand_epilogue)
|
||
(aarch64_use_return_insn_p): Handle polynomial frame offsets.
|
||
(aarch64_anchor_offset): New function, split out from...
|
||
(aarch64_legitimize_address): ...here.
|
||
(aarch64_builtin_vectorization_cost): Handle polynomial
|
||
TYPE_VECTOR_SUBPARTS.
|
||
(aarch64_simd_check_vect_par_cnst_half): Handle polynomial
|
||
GET_MODE_NUNITS.
|
||
(aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
|
||
number of elements from the PARALLEL rather than the mode.
|
||
(aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
|
||
rather than GET_MODE_BITSIZE.
|
||
(aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
|
||
(aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
|
||
(aarch64_expand_vec_perm_const_1): Handle polynomial
|
||
d->perm.length () and d->perm elements.
|
||
(aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
|
||
Apply to_constant to d->perm elements.
|
||
(aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
|
||
polynomial CONST_VECTOR_NUNITS.
|
||
(aarch64_move_pointer): Take amount as a poly_int64 rather
|
||
than an int.
|
||
(aarch64_progress_pointer): Avoid temporary variable.
|
||
* config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
|
||
the mode attribute instead of GET_MODE.
|
||
|
||
2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
|
||
x exists before using it.
|
||
(aarch64_add_constant_internal): Rename to...
|
||
(aarch64_add_offset_1): ...this. Replace regnum with separate
|
||
src and dest rtxes. Handle the case in which they're different,
|
||
including when the offset is zero. Replace scratchreg with an rtx.
|
||
Use 2 additions if there is no spare register into which we can
|
||
move a 16-bit constant.
|
||
(aarch64_add_constant): Delete.
|
||
(aarch64_add_offset): Replace reg with separate src and dest
|
||
rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
|
||
Use aarch64_add_offset_1.
|
||
(aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
|
||
an rtx rather than an int. Take the delta as a poly_int64
|
||
rather than a HOST_WIDE_INT. Use aarch64_add_offset.
|
||
(aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
|
||
(aarch64_expand_prologue): Update calls to aarch64_sub_sp,
|
||
aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
|
||
(aarch64_expand_epilogue): Update calls to aarch64_add_offset
|
||
and aarch64_add_sp.
|
||
(aarch64_output_mi_thunk): Use aarch64_add_offset rather than
|
||
aarch64_add_constant.
|
||
|
||
2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
|
||
Use scalar_float_mode.
|
||
|
||
2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64-simd.md
|
||
(aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
|
||
(aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
|
||
(aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
|
||
(aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
|
||
(aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
|
||
(aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
|
||
(aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
|
||
(aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
|
||
(aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
|
||
(aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
|
||
|
||
2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
|
||
|
||
PR target/83514
|
||
* config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
|
||
targ_options->x_arm_arch_string is non NULL.
|
||
|
||
2018-01-11 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
* config/aarch64/aarch64.h
|
||
(AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
|
||
|
||
2018-01-11 Sudakshina Das <sudi.das@arm.com>
|
||
|
||
PR target/82096
|
||
* expmed.c (emit_store_flag_force): Swap if const op0
|
||
and change VOIDmode to mode of op0.
|
||
|
||
2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR rtl-optimization/83761
|
||
* caller-save.c (replace_reg_with_saved_mem): Pass bits rather
|
||
than bytes to mode_for_size.
|
||
|
||
2018-01-10 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR middle-end/83189
|
||
* gfortran.fortran-torture/compile/pr83189.f90: New testcase.
|
||
* tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
|
||
profile.
|
||
|
||
2018-01-10 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR middle-end/83575
|
||
* cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
|
||
when in layout mode.
|
||
(cfg_layout_finalize): Do not verify cfg before we are out of layout.
|
||
* cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
|
||
partition fixup.
|
||
|
||
2018-01-10 Michael Collison <michael.collison@arm.com>
|
||
|
||
* config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
|
||
* config/aarch64/aarch64-option-extension.def: Add
|
||
AARCH64_OPT_EXTENSION of 'fp16fml'.
|
||
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
|
||
(__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
|
||
* config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
|
||
* config/aarch64/constraints.md (Ui7): New constraint.
|
||
* config/aarch64/iterators.md (VFMLA_W): New mode iterator.
|
||
(VFMLA_SEL_W): Ditto.
|
||
(f16quad): Ditto.
|
||
(f16mac1): Ditto.
|
||
(VFMLA16_LOW): New int iterator.
|
||
(VFMLA16_HIGH): Ditto.
|
||
(UNSPEC_FMLAL): New unspec.
|
||
(UNSPEC_FMLSL): Ditto.
|
||
(UNSPEC_FMLAL2): Ditto.
|
||
(UNSPEC_FMLSL2): Ditto.
|
||
(f16mac): New code attribute.
|
||
* config/aarch64/aarch64-simd-builtins.def
|
||
(aarch64_fmlal_lowv2sf): Ditto.
|
||
(aarch64_fmlsl_lowv2sf): Ditto.
|
||
(aarch64_fmlalq_lowv4sf): Ditto.
|
||
(aarch64_fmlslq_lowv4sf): Ditto.
|
||
(aarch64_fmlal_highv2sf): Ditto.
|
||
(aarch64_fmlsl_highv2sf): Ditto.
|
||
(aarch64_fmlalq_highv4sf): Ditto.
|
||
(aarch64_fmlslq_highv4sf): Ditto.
|
||
(aarch64_fmlal_lane_lowv2sf): Ditto.
|
||
(aarch64_fmlsl_lane_lowv2sf): Ditto.
|
||
(aarch64_fmlal_laneq_lowv2sf): Ditto.
|
||
(aarch64_fmlsl_laneq_lowv2sf): Ditto.
|
||
(aarch64_fmlalq_lane_lowv4sf): Ditto.
|
||
(aarch64_fmlsl_lane_lowv4sf): Ditto.
|
||
(aarch64_fmlalq_laneq_lowv4sf): Ditto.
|
||
(aarch64_fmlsl_laneq_lowv4sf): Ditto.
|
||
(aarch64_fmlal_lane_highv2sf): Ditto.
|
||
(aarch64_fmlsl_lane_highv2sf): Ditto.
|
||
(aarch64_fmlal_laneq_highv2sf): Ditto.
|
||
(aarch64_fmlsl_laneq_highv2sf): Ditto.
|
||
(aarch64_fmlalq_lane_highv4sf): Ditto.
|
||
(aarch64_fmlsl_lane_highv4sf): Ditto.
|
||
(aarch64_fmlalq_laneq_highv4sf): Ditto.
|
||
(aarch64_fmlsl_laneq_highv4sf): Ditto.
|
||
* config/aarch64/aarch64-simd.md:
|
||
(aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
|
||
(aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
|
||
(aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
|
||
(aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
|
||
(aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
|
||
(aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
|
||
(aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
|
||
(aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
|
||
(aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
|
||
(aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
|
||
(aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
|
||
(aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
|
||
(aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
|
||
(aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
|
||
(aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
|
||
(aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
|
||
(aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
|
||
(aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
|
||
(aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
|
||
(aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
|
||
* config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
|
||
(vfmlsl_low_u32): Ditto.
|
||
(vfmlalq_low_u32): Ditto.
|
||
(vfmlslq_low_u32): Ditto.
|
||
(vfmlal_high_u32): Ditto.
|
||
(vfmlsl_high_u32): Ditto.
|
||
(vfmlalq_high_u32): Ditto.
|
||
(vfmlslq_high_u32): Ditto.
|
||
(vfmlal_lane_low_u32): Ditto.
|
||
(vfmlsl_lane_low_u32): Ditto.
|
||
(vfmlal_laneq_low_u32): Ditto.
|
||
(vfmlsl_laneq_low_u32): Ditto.
|
||
(vfmlalq_lane_low_u32): Ditto.
|
||
(vfmlslq_lane_low_u32): Ditto.
|
||
(vfmlalq_laneq_low_u32): Ditto.
|
||
(vfmlslq_laneq_low_u32): Ditto.
|
||
(vfmlal_lane_high_u32): Ditto.
|
||
(vfmlsl_lane_high_u32): Ditto.
|
||
(vfmlal_laneq_high_u32): Ditto.
|
||
(vfmlsl_laneq_high_u32): Ditto.
|
||
(vfmlalq_lane_high_u32): Ditto.
|
||
(vfmlslq_lane_high_u32): Ditto.
|
||
(vfmlalq_laneq_high_u32): Ditto.
|
||
(vfmlslq_laneq_high_u32): Ditto.
|
||
* config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
|
||
(AARCH64_FL_FOR_ARCH8_4): New.
|
||
(AARCH64_ISA_F16FML): New ISA flag.
|
||
(TARGET_F16FML): New feature flag for fp16fml.
|
||
(doc/invoke.texi): Document new fp16fml option.
|
||
|
||
2018-01-10 Michael Collison <michael.collison@arm.com>
|
||
|
||
* config/aarch64/aarch64-builtins.c:
|
||
(aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
|
||
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
|
||
(__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
|
||
* config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
|
||
(AARCH64_ISA_SHA3): New ISA flag.
|
||
(TARGET_SHA3): New feature flag for sha3.
|
||
* config/aarch64/iterators.md (sha512_op): New int attribute.
|
||
(CRYPTO_SHA512): New int iterator.
|
||
(UNSPEC_SHA512H): New unspec.
|
||
(UNSPEC_SHA512H2): Ditto.
|
||
(UNSPEC_SHA512SU0): Ditto.
|
||
(UNSPEC_SHA512SU1): Ditto.
|
||
* config/aarch64/aarch64-simd-builtins.def
|
||
(aarch64_crypto_sha512hqv2di): New builtin.
|
||
(aarch64_crypto_sha512h2qv2di): Ditto.
|
||
(aarch64_crypto_sha512su0qv2di): Ditto.
|
||
(aarch64_crypto_sha512su1qv2di): Ditto.
|
||
(aarch64_eor3qv8hi): Ditto.
|
||
(aarch64_rax1qv2di): Ditto.
|
||
(aarch64_xarqv2di): Ditto.
|
||
(aarch64_bcaxqv8hi): Ditto.
|
||
* config/aarch64/aarch64-simd.md:
|
||
(aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
|
||
(aarch64_crypto_sha512su0qv2di): Ditto.
|
||
(aarch64_crypto_sha512su1qv2di): Ditto.
|
||
(aarch64_eor3qv8hi): Ditto.
|
||
(aarch64_rax1qv2di): Ditto.
|
||
(aarch64_xarqv2di): Ditto.
|
||
(aarch64_bcaxqv8hi): Ditto.
|
||
* config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
|
||
(vsha512h2q_u64): Ditto.
|
||
(vsha512su0q_u64): Ditto.
|
||
(vsha512su1q_u64): Ditto.
|
||
(veor3q_u16): Ditto.
|
||
(vrax1q_u64): Ditto.
|
||
(vxarq_u64): Ditto.
|
||
(vbcaxq_u16): Ditto.
|
||
* config/arm/types.md (crypto_sha512): New type attribute.
|
||
(crypto_sha3): Ditto.
|
||
(doc/invoke.texi): Document new sha3 option.
|
||
|
||
2018-01-10 Michael Collison <michael.collison@arm.com>
|
||
|
||
* config/aarch64/aarch64-builtins.c:
|
||
(aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
|
||
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
|
||
(__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
|
||
(__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
|
||
* config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
|
||
(AARCH64_ISA_SM4): New ISA flag.
|
||
(TARGET_SM4): New feature flag for sm4.
|
||
* config/aarch64/aarch64-simd-builtins.def
|
||
(aarch64_sm3ss1qv4si): Ditto.
|
||
(aarch64_sm3tt1aq4si): Ditto.
|
||
(aarch64_sm3tt1bq4si): Ditto.
|
||
(aarch64_sm3tt2aq4si): Ditto.
|
||
(aarch64_sm3tt2bq4si): Ditto.
|
||
(aarch64_sm3partw1qv4si): Ditto.
|
||
(aarch64_sm3partw2qv4si): Ditto.
|
||
(aarch64_sm4eqv4si): Ditto.
|
||
(aarch64_sm4ekeyqv4si): Ditto.
|
||
* config/aarch64/aarch64-simd.md:
|
||
(aarch64_sm3ss1qv4si): Ditto.
|
||
(aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
|
||
(aarch64_sm3partw<sm3part_op>qv4si): Ditto.
|
||
(aarch64_sm4eqv4si): Ditto.
|
||
(aarch64_sm4ekeyqv4si): Ditto.
|
||
* config/aarch64/iterators.md (sm3tt_op): New int iterator.
|
||
(sm3part_op): Ditto.
|
||
(CRYPTO_SM3TT): Ditto.
|
||
(CRYPTO_SM3PART): Ditto.
|
||
(UNSPEC_SM3SS1): New unspec.
|
||
(UNSPEC_SM3TT1A): Ditto.
|
||
(UNSPEC_SM3TT1B): Ditto.
|
||
(UNSPEC_SM3TT2A): Ditto.
|
||
(UNSPEC_SM3TT2B): Ditto.
|
||
(UNSPEC_SM3PARTW1): Ditto.
|
||
(UNSPEC_SM3PARTW2): Ditto.
|
||
(UNSPEC_SM4E): Ditto.
|
||
(UNSPEC_SM4EKEY): Ditto.
|
||
* config/aarch64/constraints.md (Ui2): New constraint.
|
||
* config/aarch64/predicates.md (aarch64_imm2): New predicate.
|
||
* config/arm/types.md (crypto_sm3): New type attribute.
|
||
(crypto_sm4): Ditto.
|
||
* config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
|
||
(vsm3tt1aq_u32): Ditto.
|
||
(vsm3tt1bq_u32): Ditto.
|
||
(vsm3tt2aq_u32): Ditto.
|
||
(vsm3tt2bq_u32): Ditto.
|
||
(vsm3partw1q_u32): Ditto.
|
||
(vsm3partw2q_u32): Ditto.
|
||
(vsm4eq_u32): Ditto.
|
||
(vsm4ekeyq_u32): Ditto.
|
||
(doc/invoke.texi): Document new sm4 option.
|
||
|
||
2018-01-10 Michael Collison <michael.collison@arm.com>
|
||
|
||
* config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
|
||
* config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
|
||
(AARCH64_FL_FOR_ARCH8_4): New.
|
||
(AARCH64_FL_V8_4): New flag.
|
||
(doc/invoke.texi): Document new armv8.4-a option.
|
||
|
||
2018-01-10 Michael Collison <michael.collison@arm.com>
|
||
|
||
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
|
||
(__ARM_FEATURE_AES): Define if TARGET_AES is true.
|
||
(__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
|
||
* config/aarch64/aarch64-option-extension.def: Add
|
||
AARCH64_OPT_EXTENSION of 'sha2'.
|
||
(aes): Add AARCH64_OPT_EXTENSION of 'aes'.
|
||
(crypto): Disable sha2 and aes if crypto disabled.
|
||
(crypto): Enable aes and sha2 if enabled.
|
||
(simd): Disable sha2 and aes if simd disabled.
|
||
* config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
|
||
New flags.
|
||
(AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
|
||
(TARGET_SHA2): New feature flag for sha2.
|
||
(TARGET_AES): New feature flag for aes.
|
||
* config/aarch64/aarch64-simd.md:
|
||
(aarch64_crypto_aes<aes_op>v16qi): Make pattern
|
||
conditional on TARGET_AES.
|
||
(aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
|
||
(aarch64_crypto_sha1hsi): Make pattern conditional
|
||
on TARGET_SHA2.
|
||
(aarch64_crypto_sha1hv4si): Ditto.
|
||
(aarch64_be_crypto_sha1hv4si): Ditto.
|
||
(aarch64_crypto_sha1su1v4si): Ditto.
|
||
(aarch64_crypto_sha1<sha1_op>v4si): Ditto.
|
||
(aarch64_crypto_sha1su0v4si): Ditto.
|
||
(aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
|
||
(aarch64_crypto_sha256su0v4si): Ditto.
|
||
(aarch64_crypto_sha256su1v4si): Ditto.
|
||
(doc/invoke.texi): Document new aes and sha2 options.
|
||
|
||
2018-01-10 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83781
|
||
* gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
|
||
as string arrays.
|
||
|
||
2018-01-11 Martin Sebor <msebor@gmail.com>
|
||
Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
|
||
|
||
PR tree-optimization/83501
|
||
PR tree-optimization/81703
|
||
|
||
* tree-ssa-strlen.c (get_string_cst): Rename...
|
||
(get_string_len): ...to this. Handle global constants.
|
||
(handle_char_store): Adjust.
|
||
|
||
2018-01-10 Kito Cheng <kito.cheng@gmail.com>
|
||
Jim Wilson <jimw@sifive.com>
|
||
|
||
* config/riscv/riscv-protos.h (riscv_output_return): New.
|
||
* config/riscv/riscv.c (struct machine_function): New naked_p field.
|
||
(riscv_attribute_table, riscv_output_return),
|
||
(riscv_handle_fndecl_attribute, riscv_naked_function_p),
|
||
(riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
|
||
(riscv_compute_frame_info): Only compute frame->mask if not a naked
|
||
function.
|
||
(riscv_expand_prologue): Add early return for naked function.
|
||
(riscv_expand_epilogue): Likewise.
|
||
(riscv_function_ok_for_sibcall): Return false for naked function.
|
||
(riscv_set_current_function): New.
|
||
(TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
|
||
(TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
|
||
* config/riscv/riscv.md (simple_return): Call riscv_output_return.
|
||
* doc/extend.texi (RISC-V Function Attributes): New.
|
||
|
||
2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
|
||
check for 128-bit long double before checking TCmode.
|
||
* config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
|
||
128-bit long doubles before checking TFmode or TCmode.
|
||
(FLOAT128_IBM_P): Likewise.
|
||
|
||
2018-01-10 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83671
|
||
* builtins.c (c_strlen): Unconditionally return zero for the empty
|
||
string.
|
||
Use -Warray-bounds for warnings.
|
||
* gimple-fold.c (get_range_strlen): Handle non-constant lengths
|
||
for non-constant array indices with COMPONENT_REF, arrays of
|
||
arrays, and pointers to arrays.
|
||
(gimple_fold_builtin_strlen): Determine and set length range for
|
||
non-constant character arrays.
|
||
|
||
2018-01-10 Aldy Hernandez <aldyh@redhat.com>
|
||
|
||
PR middle-end/81897
|
||
* tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
|
||
empty blocks.
|
||
|
||
2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
|
||
|
||
2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/83399
|
||
* config/rs6000/rs6000.c (print_operand) <'y'>: Use
|
||
VECTOR_MEM_ALTIVEC_OR_VSX_P.
|
||
* config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
|
||
indexed_or_indirect_operand predicate.
|
||
(*vsx_le_perm_load_<mode> for VSX_W): Likewise.
|
||
(*vsx_le_perm_load_v8hi): Likewise.
|
||
(*vsx_le_perm_load_v16qi): Likewise.
|
||
(*vsx_le_perm_store_<mode> for VSX_D): Likewise.
|
||
(*vsx_le_perm_store_<mode> for VSX_W): Likewise.
|
||
(*vsx_le_perm_store_v8hi): Likewise.
|
||
(*vsx_le_perm_store_v16qi): Likewise.
|
||
(eight unnamed splitters): Likewise.
|
||
|
||
2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
* config/rs6000/x86intrin.h: Change #warning to #error. Update message.
|
||
* config/rs6000/emmintrin.h: Likewise.
|
||
* config/rs6000/mmintrin.h: Likewise.
|
||
* config/rs6000/xmmintrin.h: Likewise.
|
||
|
||
2018-01-10 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR c++/43486
|
||
* tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
|
||
"public_flag".
|
||
* tree.c (tree_nop_conversion): Return true for location wrapper
|
||
nodes.
|
||
(maybe_wrap_with_location): New function.
|
||
(selftest::check_strip_nops): New function.
|
||
(selftest::test_location_wrappers): New function.
|
||
(selftest::tree_c_tests): Call it.
|
||
* tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
|
||
(maybe_wrap_with_location): New decl.
|
||
(EXPR_LOCATION_WRAPPER_P): New macro.
|
||
(location_wrapper_p): New inline function.
|
||
(tree_strip_any_location_wrapper): New inline function.
|
||
|
||
2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/83735
|
||
* config/i386/i386.c (ix86_compute_frame_layout): Always adjust
|
||
stack_realign_offset for the largest alignment of stack slot
|
||
actually used.
|
||
(ix86_find_max_used_stack_alignment): New function.
|
||
(ix86_finalize_stack_frame_flags): Use it. Set
|
||
max_used_stack_alignment if we don't realign stack.
|
||
* config/i386/i386.h (machine_function): Add
|
||
max_used_stack_alignment.
|
||
|
||
2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
|
||
|
||
* config/arm/arm.opt (-mbranch-cost): New option.
|
||
* config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
|
||
account.
|
||
|
||
2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
PR target/83629
|
||
* config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
|
||
load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
|
||
|
||
2018-01-10 Richard Biener <rguenther@suse.de>
|
||
|
||
PR debug/83765
|
||
* dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
|
||
early out so it also covers the case where we have a non-NULL
|
||
origin.
|
||
|
||
2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR tree-optimization/83753
|
||
* tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
|
||
for non-strided grouped accesses if the number of elements is 1.
|
||
|
||
2018-01-10 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR target/81616
|
||
* i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
|
||
* i386.h (TARGET_USE_GATHER): Define.
|
||
* x86-tune.def (X86_TUNE_USE_GATHER): New.
|
||
|
||
2018-01-10 Martin Liska <mliska@suse.cz>
|
||
|
||
PR bootstrap/82831
|
||
* basic-block.h (CLEANUP_NO_PARTITIONING): New define.
|
||
* bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
|
||
partitioning.
|
||
* cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
|
||
CLEANUP_NO_PARTITIONING is not set.
|
||
|
||
2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* doc/rtl.texi: Remove documentation of (const ...) wrappers
|
||
for vectors, as a partial revert of r254296.
|
||
* rtl.h (const_vec_p): Delete.
|
||
(const_vec_duplicate_p): Don't test for vector CONSTs.
|
||
(unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
|
||
* expmed.c (make_tree): Likewise.
|
||
|
||
Revert:
|
||
* common.md (E, F): Use CONSTANT_P instead of checking for
|
||
CONST_VECTOR.
|
||
* emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
|
||
checking for CONST_VECTOR.
|
||
|
||
2018-01-09 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR middle-end/83575
|
||
* predict.c (force_edge_cold): Handle in more sane way edges
|
||
with no prediction.
|
||
|
||
2018-01-09 Carl Love <cel@us.ibm.com>
|
||
|
||
* config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
|
||
V4SI, V4SF types.
|
||
(p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
|
||
* config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
|
||
VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
|
||
VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
|
||
* config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
|
||
P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
|
||
* config/rs6000/rs6000-protos.h: Add extern defition for
|
||
rs6000_generate_float2_double_code.
|
||
* config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
|
||
function.
|
||
* config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
|
||
(float2_v2df): Add define_expand.
|
||
|
||
2018-01-09 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/83628
|
||
* combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
|
||
op_mode in the force_to_mode call.
|
||
|
||
2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
|
||
instead of checking each element individually.
|
||
(aarch64_evpc_uzp): Likewise.
|
||
(aarch64_evpc_zip): Likewise.
|
||
(aarch64_evpc_ext): Likewise.
|
||
(aarch64_evpc_rev): Likewise.
|
||
(aarch64_evpc_dup): Test the encoding for a single duplicated element,
|
||
instead of checking each element individually. Return true without
|
||
generating rtl if
|
||
(aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
|
||
whether all selected elements come from the same input, instead of
|
||
checking each element individually. Remove calls to gen_rtx_REG,
|
||
start_sequence and end_sequence and instead assert that no rtl is
|
||
generated.
|
||
|
||
2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
|
||
order of HIGH and CONST checks.
|
||
|
||
2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
|
||
if the destination isn't an SSA_NAME.
|
||
|
||
2018-01-09 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83668
|
||
* graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
|
||
move prologue...
|
||
(canonicalize_loop_form): ... here, renamed from ...
|
||
(canonicalize_loop_closed_ssa_form): ... this and amended to
|
||
swap successor edges for loop exit blocks to make us use
|
||
the RPO order we need for initial schedule generation.
|
||
|
||
2018-01-09 Joseph Myers <joseph@codesourcery.com>
|
||
|
||
PR tree-optimization/64811
|
||
* match.pd: When optimizing comparisons with Inf, avoid
|
||
introducing or losing exceptions from comparisons with NaN.
|
||
|
||
2018-01-09 Martin Liska <mliska@suse.cz>
|
||
|
||
PR sanitizer/82517
|
||
* asan.c (shadow_mem_size): Add gcc_assert.
|
||
|
||
2018-01-09 Georg-Johann Lay <avr@gjlay.de>
|
||
|
||
Don't save registers in main().
|
||
|
||
PR target/83738
|
||
* doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
|
||
* config/avr/avr.opt (-mmain-is-OS_task): New target option.
|
||
* config/avr/avr.c (avr_set_current_function): Don't error if
|
||
naked, OS_task or OS_main are specified at the same time.
|
||
(avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
|
||
OS_main.
|
||
(avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
|
||
attribute.
|
||
* common/config/avr/avr-common.c (avr_option_optimization_table):
|
||
Switch on -mmain-is-OS_task for optimizing compilations.
|
||
|
||
2018-01-09 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83572
|
||
* graphite.c: Include cfganal.h.
|
||
(graphite_transform_loops): Connect infinite loops to exit
|
||
and remove fake edges at the end.
|
||
|
||
2018-01-09 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* ipa-inline.c (edge_badness): Revert accidental checkin.
|
||
|
||
2018-01-09 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR ipa/80763
|
||
* ipa-comdats.c (set_comdat_group): Only set comdat group of real
|
||
symbols; not inline clones.
|
||
|
||
2018-01-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/83507
|
||
* modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
|
||
hard registers. Formatting fixes.
|
||
|
||
PR preprocessor/83722
|
||
* gcc.c (try_generate_repro): Pass
|
||
&temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
|
||
&temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
|
||
do_report_bug.
|
||
|
||
2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
|
||
Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* config/riscv/riscv.c (machine_function::is_leaf): Remove field.
|
||
(riscv_leaf_function_p): Delete.
|
||
(riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
|
||
|
||
2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
|
||
function.
|
||
(do_ifelse): New function.
|
||
(do_isel): New function.
|
||
(do_sub3): New function.
|
||
(do_add3): New function.
|
||
(do_load_mask_compare): New function.
|
||
(do_overlap_load_compare): New function.
|
||
(expand_compare_loop): New function.
|
||
(expand_block_compare): Call expand_compare_loop() when appropriate.
|
||
* config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
|
||
option description.
|
||
(-mblock-compare-inline-loop-limit): New option.
|
||
|
||
2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
PR target/83677
|
||
* config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
|
||
Reverse order of second and third operands in first alternative.
|
||
* config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
|
||
of first and second elements in UNSPEC_VPERMR vector.
|
||
(altivec_expand_vec_perm_le): Likewise.
|
||
|
||
2018-01-08 Jeff Law <law@redhat.com>
|
||
|
||
PR rtl-optimizatin/81308
|
||
* tree-switch-conversion.c (cfg_altered): New file scoped static.
|
||
(process_switch): If group_case_labels makes a change, then set
|
||
cfg_altered.
|
||
(pass_convert_switch::execute): If a switch is converted, then
|
||
set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
|
||
|
||
PR rtl-optimization/81308
|
||
* recog.c (split_all_insns): Conditionally cleanup the CFG after
|
||
splitting insns.
|
||
|
||
2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
|
||
|
||
PR target/83663 - Revert r255946
|
||
* config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
|
||
generation for cases where splatting a value is not useful.
|
||
* simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
|
||
across a vec_duplicate and a paradoxical subreg forming a vector
|
||
mode to a vec_concat.
|
||
|
||
2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
|
||
-march=armv8.3-a variants.
|
||
* config/arm/t-multilib: Likewise.
|
||
* config/arm/t-arm-elf: Likewise. Handle dotprod extension.
|
||
|
||
2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
|
||
to generate rtl.
|
||
(cceq_ior_compare_complement): Give it a name so I can use it, and
|
||
change boolean_or_operator predicate to boolean_operator so it can
|
||
be used to generate a crand.
|
||
(eqne): New code iterator.
|
||
(bd/bd_neg): New code_attrs.
|
||
(<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
|
||
a single define_insn.
|
||
(<bd>tf_<mode>): A new insn pattern for the conditional form branch
|
||
decrement (bdnzt/bdnzf/bdzt/bdzf).
|
||
* config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
|
||
with the new names of the branch decrement patterns, and added the
|
||
names of the branch decrement conditional patterns.
|
||
|
||
2018-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83563
|
||
* graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
|
||
cache.
|
||
|
||
2018-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/83713
|
||
* convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
|
||
|
||
2018-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/83685
|
||
* tree-ssa-pre.c (create_expression_by_pieces): Do not insert
|
||
references to abnormals.
|
||
|
||
2018-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR lto/83719
|
||
* dwarf2out.c (output_indirect_strings): Handle empty
|
||
skeleton_debug_str_hash.
|
||
(dwarf2out_early_finish): Index strings for -gsplit-dwarf.
|
||
|
||
2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
|
||
(emit_store_direct): Likewise.
|
||
(arc_trampoline_adjust_address): Likewise.
|
||
(arc_asm_trampoline_template): New function.
|
||
(arc_initialize_trampoline): Use asm_trampoline_template.
|
||
(TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
|
||
* config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
|
||
* config/arc/arc.md (flush_icache): Delete pattern.
|
||
|
||
2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
|
||
* config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
|
||
munaligned-access.
|
||
|
||
2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
|
||
|
||
PR target/83681
|
||
* config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
|
||
by not USED_FOR_TARGET.
|
||
(make_pass_resolve_sw_modes): Likewise.
|
||
|
||
2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
|
||
|
||
* config/nios2/nios2.h (nios2_section_threshold): Guard by not
|
||
USED_FOR_TARGET.
|
||
|
||
2018-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/83580
|
||
* tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
|
||
|
||
2018-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/83517
|
||
* match.pd ((t * 2) / 2) -> t): Add missing :c.
|
||
|
||
2018-01-06 Aldy Hernandez <aldyh@redhat.com>
|
||
|
||
PR middle-end/81897
|
||
* tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
|
||
basic blocks with a small number of successors.
|
||
(convert_control_dep_chain_into_preds): Improve handling of
|
||
forwarder blocks.
|
||
(dump_predicates): Split apart into...
|
||
(dump_pred_chain): ...here...
|
||
(dump_pred_info): ...and here.
|
||
(can_one_predicate_be_invalidated_p): Add debugging printfs.
|
||
(can_chain_union_be_invalidated_p): Improve check for invalidation
|
||
of paths.
|
||
(uninit_uses_cannot_happen): Avoid unnecessary if
|
||
convert_control_dep_chain_into_preds yielded nothing.
|
||
|
||
2018-01-06 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83640
|
||
* gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
|
||
subtracting negative offset from size.
|
||
(builtin_access::overlap): Adjust offset bounds of the access to fall
|
||
within the size of the object if possible.
|
||
|
||
2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR rtl-optimization/83699
|
||
* expmed.c (extract_bit_field_1): Restrict the vector usage of
|
||
extract_bit_field_as_subreg to cases in which the extracted
|
||
value is also a vector.
|
||
|
||
* lra-constraints.c (process_alt_operands): Test for the equivalence
|
||
substitutions when detecting a possible reload cycle.
|
||
|
||
2018-01-06 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/83480
|
||
* toplev.c (process_options): Don't enable debug_nonbind_markers_p
|
||
by default if flag_selective_schedling{,2}. Formatting fixes.
|
||
|
||
PR rtl-optimization/83682
|
||
* rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
|
||
if it has non-VECTOR_MODE element mode.
|
||
(vec_duplicate_p): Likewise.
|
||
|
||
PR middle-end/83694
|
||
* cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
|
||
and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
|
||
|
||
2018-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/83604
|
||
* config/i386/i386-builtin.def
|
||
(__builtin_ia32_vgf2p8affineinvqb_v64qi,
|
||
__builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
|
||
Require also OPTION_MASK_ISA_AVX512F in addition to
|
||
OPTION_MASK_ISA_GFNI.
|
||
(__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
|
||
__builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
|
||
OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
|
||
to OPTION_MASK_ISA_GFNI.
|
||
(__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
|
||
OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
|
||
OPTION_MASK_ISA_AVX512BW.
|
||
(__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
|
||
OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
|
||
addition to OPTION_MASK_ISA_GFNI.
|
||
(__builtin_ia32_vgf2p8affineinvqb_v16qi,
|
||
__builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
|
||
Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
|
||
to OPTION_MASK_ISA_GFNI.
|
||
* config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
|
||
a requirement for all ISAs rather than any of them with a few
|
||
exceptions.
|
||
(ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
|
||
processing.
|
||
(ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
|
||
bitmasks to be enabled with 3 exceptions, instead of requiring any
|
||
enabled ISA with lots of exceptions.
|
||
* config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
|
||
vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
|
||
Change avx512bw in isa attribute to avx512f.
|
||
* config/i386/sgxintrin.h: Add license boilerplate.
|
||
* config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
|
||
to __AVX512F__ and __AVX512VL to __AVX512VL__.
|
||
(_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
|
||
_mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
|
||
defined.
|
||
* config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
|
||
_mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
|
||
temporarily sse2 rather than sse if not enabled already.
|
||
|
||
PR target/83604
|
||
* config/i386/sse.md (VI248_VLBW): Rename to ...
|
||
(VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
|
||
(vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
|
||
vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
|
||
vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
|
||
vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
|
||
mode iterator instead of VI248_VLBW.
|
||
|
||
2018-01-05 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* ipa-fnsummary.c (record_modified_bb_info): Add OP.
|
||
(record_modified): Skip clobbers; add debug output.
|
||
(param_change_prob): Use sreal frequencies.
|
||
|
||
2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
|
||
punt for user-aligned variables.
|
||
|
||
2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-chrec.c (chrec_contains_symbols): Return true for
|
||
POLY_INT_CST.
|
||
|
||
2018-01-05 Sudakshina Das <sudi.das@arm.com>
|
||
|
||
PR target/82439
|
||
* simplify-rtx.c (simplify_relational_operation_1): Add simplifications
|
||
of (x|y) == x for BICS pattern.
|
||
|
||
2018-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/83605
|
||
* gimple-ssa-strength-reduction.c: Include tree-eh.h.
|
||
(find_candidates_dom_walker::before_dom_children): Ignore stmts that
|
||
can throw.
|
||
|
||
2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
|
||
|
||
* config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
|
||
* config/epiphany/rtems.h: New file.
|
||
|
||
2018-01-04 Jakub Jelinek <jakub@redhat.com>
|
||
Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/83554
|
||
* config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
|
||
QIreg_operand instead of register_operand predicate.
|
||
* config/i386/i386.c (ix86_rop_should_change_byte_p,
|
||
set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
|
||
comments instead of -fmitigate[-_]rop.
|
||
|
||
2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
|
||
|
||
PR bootstrap/81926
|
||
* cgraphunit.c (symbol_table::compile): Switch to text_section
|
||
before calling assembly_start debug hook.
|
||
* run-rtl-passes.c (run_rtl_passes): Likewise.
|
||
Include output.h.
|
||
|
||
2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vrp.c (extract_range_from_binary_expr_1): Check
|
||
range_int_cst_p rather than !symbolic_range_p before calling
|
||
extract_range_from_multiplicative_op_1.
|
||
|
||
2018-01-04 Jeff Law <law@redhat.com>
|
||
|
||
* tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
|
||
redundant test in assertion.
|
||
|
||
2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* doc/rtl.texi: Document machine_mode wrapper classes.
|
||
|
||
2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
|
||
using tree_to_uhwi.
|
||
|
||
2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
|
||
the VEC_PERM_EXPR fold to fail.
|
||
|
||
2018-01-04 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/83585
|
||
* bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
|
||
to switched_sections.
|
||
|
||
2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR target/83680
|
||
* config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
|
||
test for d.testing.
|
||
|
||
2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
|
||
|
||
PR target/83387
|
||
* config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
|
||
allow arguments in FP registers if TARGET_HARD_FLOAT is false.
|
||
|
||
2018-01-04 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/83666
|
||
* cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
|
||
is BLKmode and bitpos not zero or mode change is needed.
|
||
|
||
2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
PR target/83675
|
||
* config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
|
||
TARGET_VIS2.
|
||
|
||
2018-01-04 Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/83628
|
||
* config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
|
||
instead of MULT rtx. Update all corresponding splitters.
|
||
(*saddl_se): Ditto.
|
||
(*ssub<modesuffix>): Ditto.
|
||
(*ssubl_se): Ditto.
|
||
(*cmp_sadd_di): Update split patterns.
|
||
(*cmp_sadd_si): Ditto.
|
||
(*cmp_sadd_sidi): Ditto.
|
||
(*cmp_ssub_di): Ditto.
|
||
(*cmp_ssub_si): Ditto.
|
||
(*cmp_ssub_sidi): Ditto.
|
||
* config/alpha/predicates.md (const23_operand): New predicate.
|
||
* config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
|
||
Look for ASHIFT, not MULT inner operand.
|
||
(alpha_split_conditional_move): Update for *sadd<modesuffix> change.
|
||
|
||
2018-01-04 Martin Liska <mliska@suse.cz>
|
||
|
||
PR gcov-profile/83669
|
||
* gcov.c (output_intermediate_file): Add version to intermediate
|
||
gcov file.
|
||
* doc/gcov.texi: Document new field 'version' in intermediate
|
||
file format. Fix location of '-k' option of gcov command.
|
||
|
||
2018-01-04 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/82352
|
||
* ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
|
||
|
||
2018-01-04 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
|
||
|
||
2018-01-03 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83655
|
||
* gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
|
||
checking calls with invalid arguments.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-stmts.c (vect_get_store_rhs): New function.
|
||
(vectorizable_mask_load_store): Delete.
|
||
(vectorizable_call): Return false for masked loads and stores.
|
||
(vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
|
||
instead of gimple_assign_rhs1.
|
||
(vectorizable_load): Handle IFN_MASK_LOAD.
|
||
(vect_transform_stmt): Don't set is_store for call_vec_info_type.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-stmts.c (vect_build_gather_load_calls): New function,
|
||
split out from..,
|
||
(vectorizable_mask_load_store): ...here.
|
||
(vectorizable_load): ...and here.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-stmts.c (vect_build_all_ones_mask)
|
||
(vect_build_zero_merge_argument): New functions, split out from...
|
||
(vectorizable_load): ...here.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-stmts.c (vect_check_store_rhs): New function,
|
||
split out from...
|
||
(vectorizable_mask_load_store): ...here.
|
||
(vectorizable_store): ...and here.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-stmts.c (vect_check_load_store_mask): New function,
|
||
split out from...
|
||
(vectorizable_mask_load_store): ...here.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
|
||
(vect_model_store_cost): Take a vec_load_store_type instead of a
|
||
vect_def_type.
|
||
* tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
|
||
(vect_model_store_cost): Take a vec_load_store_type instead of a
|
||
vect_def_type.
|
||
(vectorizable_mask_load_store): Update accordingly.
|
||
(vectorizable_store): Likewise.
|
||
* tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-loop.c (vect_transform_loop): Stub out scalar
|
||
IFN_MASK_LOAD calls here rather than...
|
||
* tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* expmed.c (extract_bit_field_1): For vector extracts,
|
||
fall back to extract_bit_field_as_subreg if vec_extract
|
||
isn't available.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
|
||
they are variable or constant sized.
|
||
(assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
|
||
slots for constant-sized data.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
|
||
handling COND_EXPRs with boolean comparisons, try to find a better
|
||
basis for the mask type than the boolean itself.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
|
||
is calculated and how it can be overridden.
|
||
* genmodes.c (max_bitsize_mode_any_mode): New variable.
|
||
(create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
|
||
if defined.
|
||
(emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
|
||
if nonzero.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
|
||
Remove the mode argument.
|
||
(aarch64_simd_valid_immediate): Remove the mode and inverse
|
||
arguments.
|
||
* config/aarch64/iterators.md (bitsize): New iterator.
|
||
* config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
|
||
(ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
|
||
* config/aarch64/constraints.md (Do, Db, Dn): Update calls to
|
||
aarch64_simd_valid_immediate.
|
||
* config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
|
||
(aarch64_reg_or_bic_imm): Likewise.
|
||
* config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
|
||
with an insn_type enum and msl with a modifier_type enum.
|
||
Replace element_width with a scalar_mode. Change the shift
|
||
to unsigned int. Add constructors for scalar_float_mode and
|
||
scalar_int_mode elements.
|
||
(aarch64_vect_float_const_representable_p): Delete.
|
||
(aarch64_can_const_movi_rtx_p)
|
||
(aarch64_simd_scalar_immediate_valid_for_move)
|
||
(aarch64_simd_make_constant): Update call to
|
||
aarch64_simd_valid_immediate.
|
||
(aarch64_advsimd_valid_immediate_hs): New function.
|
||
(aarch64_advsimd_valid_immediate): Likewise.
|
||
(aarch64_simd_valid_immediate): Remove mode and inverse
|
||
arguments. Rewrite to use the above. Use const_vec_duplicate_p
|
||
to detect duplicated constants and use aarch64_float_const_zero_rtx_p
|
||
and aarch64_float_const_representable_p on the result.
|
||
(aarch64_output_simd_mov_immediate): Remove mode argument.
|
||
Update call to aarch64_simd_valid_immediate and use of
|
||
simd_immediate_info.
|
||
(aarch64_output_scalar_simd_mov_immediate): Update call
|
||
accordingly.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
|
||
(mode_nunits): Likewise CONST_MODE_NUNITS.
|
||
* machmode.def (ADJUST_NUNITS): Document.
|
||
* genmodes.c (mode_data::need_nunits_adj): New field.
|
||
(blank_mode): Update accordingly.
|
||
(adj_nunits): New variable.
|
||
(print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
|
||
parameter.
|
||
(emit_mode_size_inline): Set need_bytesize_adj for all modes
|
||
listed in adj_nunits.
|
||
(emit_mode_nunits_inline): Set need_nunits_adj for all modes
|
||
listed in adj_nunits. Don't emit case statements for such modes.
|
||
(emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
|
||
and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
|
||
nothing if adj_nunits is nonnull.
|
||
(emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
|
||
(emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
|
||
(emit_mode_fbit): Update use of print_maybe_const_decl.
|
||
(emit_move_size): Likewise. Treat the array as non-const
|
||
if adj_nunits.
|
||
(emit_mode_adjustments): Handle adj_nunits.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
|
||
* genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
|
||
(VECTOR_MODES): Use it.
|
||
(make_vector_modes): Take the prefix as an argument.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* mode-classes.def (MODE_VECTOR_BOOL): New mode class.
|
||
* machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
|
||
for MODE_VECTOR_BOOL.
|
||
* machmode.def (VECTOR_BOOL_MODE): Document.
|
||
* genmodes.c (VECTOR_BOOL_MODE): New macro.
|
||
(make_vector_bool_mode): New function.
|
||
(complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
|
||
MODE_VECTOR_BOOL.
|
||
* lto-streamer-in.c (lto_input_mode_table): Likewise.
|
||
* rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
|
||
Likewise.
|
||
* stor-layout.c (int_mode_for_mode): Likewise.
|
||
* tree.c (build_vector_type_for_mode): Likewise.
|
||
* varasm.c (output_constant_pool_2): Likewise.
|
||
* emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
|
||
CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
|
||
for MODE_VECTOR_BOOL.
|
||
* expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
|
||
of mode class checks.
|
||
* tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
|
||
instead of a list of mode class checks.
|
||
(expand_vector_scalar_condition): Likewise.
|
||
(type_for_widest_vector_mode): Handle BImode as an inner mode.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* machmode.h (mode_size): Change from unsigned short to
|
||
poly_uint16_pod.
|
||
(mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
|
||
(GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
|
||
or if measurement_type is not polynomial.
|
||
(fixed_size_mode::includes_p): Check for constant-sized modes.
|
||
* genmodes.c (emit_mode_size_inline): Make mode_size_inline
|
||
return a poly_uint16 rather than an unsigned short.
|
||
(emit_mode_size): Change the type of mode_size from unsigned short
|
||
to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
|
||
(emit_mode_adjustments): Cope with polynomial vector sizes.
|
||
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
|
||
for GET_MODE_SIZE.
|
||
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
|
||
for GET_MODE_SIZE.
|
||
* auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
|
||
* builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
|
||
* caller-save.c (setup_save_areas): Likewise.
|
||
(replace_reg_with_saved_mem): Likewise.
|
||
* calls.c (emit_library_call_value_1): Likewise.
|
||
* combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
|
||
* combine.c (simplify_set, make_extraction, simplify_shift_const_1)
|
||
(gen_lowpart_for_combine): Likewise.
|
||
* convert.c (convert_to_integer_1): Likewise.
|
||
* cse.c (equiv_constant, cse_insn): Likewise.
|
||
* cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
|
||
(cselib_subst_to_values): Likewise.
|
||
* dce.c (word_dce_process_block): Likewise.
|
||
* df-problems.c (df_word_lr_mark_ref): Likewise.
|
||
* dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
|
||
* dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
|
||
(concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
|
||
(rtl_for_decl_location): Likewise.
|
||
* emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
|
||
* expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
|
||
* expr.c (emit_group_load_1, clear_storage_hints): Likewise.
|
||
(emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
|
||
(expand_expr_real_1): Likewise.
|
||
* function.c (assign_parm_setup_block_p, assign_parm_setup_block)
|
||
(pad_below): Likewise.
|
||
* gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
|
||
* gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
|
||
* ira.c (get_subreg_tracking_sizes): Likewise.
|
||
* ira-build.c (ira_create_allocno_objects): Likewise.
|
||
* ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
|
||
(ira_sort_regnos_for_alter_reg): Likewise.
|
||
* ira-costs.c (record_operand_costs): Likewise.
|
||
* lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
|
||
(resolve_simple_move): Likewise.
|
||
* lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
|
||
(process_addr_reg, simplify_operand_subreg, curr_insn_transform)
|
||
(lra_constraints): Likewise.
|
||
(CONST_POOL_OK_P): Reject variable-sized modes.
|
||
* lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
|
||
(add_pseudo_to_slot, lra_spill): Likewise.
|
||
* omp-low.c (omp_clause_aligned_alignment): Likewise.
|
||
* optabs-query.c (get_best_extraction_insn): Likewise.
|
||
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
|
||
* optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
|
||
(expand_mult_highpart, valid_multiword_target_p): Likewise.
|
||
* recog.c (offsettable_address_addr_space_p): Likewise.
|
||
* regcprop.c (maybe_mode_change): Likewise.
|
||
* reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
|
||
* regrename.c (build_def_use): Likewise.
|
||
* regstat.c (dump_reg_info): Likewise.
|
||
* reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
|
||
(find_reloads, find_reloads_subreg_address): Likewise.
|
||
* reload1.c (eliminate_regs_1): Likewise.
|
||
* rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
|
||
* simplify-rtx.c (avoid_constant_pool_reference): Likewise.
|
||
(simplify_binary_operation_1, simplify_subreg): Likewise.
|
||
* targhooks.c (default_function_arg_padding): Likewise.
|
||
(default_hard_regno_nregs, default_class_max_nregs): Likewise.
|
||
* tree-cfg.c (verify_gimple_assign_binary): Likewise.
|
||
(verify_gimple_assign_ternary): Likewise.
|
||
* tree-inline.c (estimate_move_cost): Likewise.
|
||
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
|
||
* tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
|
||
(get_address_cost_ainc): Likewise.
|
||
* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
|
||
(vect_supportable_dr_alignment): Likewise.
|
||
* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
|
||
(vectorizable_reduction): Likewise.
|
||
* tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
|
||
(vectorizable_operation, vectorizable_load): Likewise.
|
||
* tree.c (build_same_sized_truth_vector_type): Likewise.
|
||
* valtrack.c (cleanup_auto_inc_dec): Likewise.
|
||
* var-tracking.c (emit_note_insn_var_location): Likewise.
|
||
* config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
|
||
(ADDR_VEC_ALIGN): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* machmode.h (mode_to_bits): Return a poly_uint16 rather than an
|
||
unsigned short.
|
||
(GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
|
||
or if measurement_type is polynomial.
|
||
* calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
|
||
* combine.c (make_extraction): Likewise.
|
||
* dse.c (find_shift_sequence): Likewise.
|
||
* dwarf2out.c (mem_loc_descriptor): Likewise.
|
||
* expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
|
||
(extract_bit_field, extract_low_bits): Likewise.
|
||
* expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
|
||
(optimize_bitfield_assignment_op, expand_assignment): Likewise.
|
||
(store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
|
||
* fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
|
||
* gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
|
||
* reload.c (find_reloads): Likewise.
|
||
* reload1.c (alter_reg): Likewise.
|
||
* stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
|
||
* targhooks.c (default_secondary_memory_needed_mode): Likewise.
|
||
* tree-if-conv.c (predicate_mem_writes): Likewise.
|
||
* tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
|
||
* tree-vect-patterns.c (adjust_bool_pattern): Likewise.
|
||
* tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
|
||
* valtrack.c (dead_debug_insert_temp): Likewise.
|
||
* varasm.c (mergeable_constant_section): Likewise.
|
||
* config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* expr.c (expand_assignment): Cope with polynomial mode sizes
|
||
when assigning to a CONCAT.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* machmode.h (mode_precision): Change from unsigned short to
|
||
poly_uint16_pod.
|
||
(mode_to_precision): Return a poly_uint16 rather than an unsigned
|
||
short.
|
||
(GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
|
||
or if measurement_type is not polynomial.
|
||
(HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
|
||
in which the mode is already known to be a scalar_int_mode.
|
||
* genmodes.c (emit_mode_precision): Change the type of mode_precision
|
||
from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
|
||
initializer.
|
||
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
|
||
for GET_MODE_PRECISION.
|
||
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
|
||
for GET_MODE_PRECISION.
|
||
* combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
|
||
as polynomial.
|
||
(try_combine, find_split_point, combine_simplify_rtx): Likewise.
|
||
(expand_field_assignment, make_extraction): Likewise.
|
||
(make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
|
||
(get_last_value): Likewise.
|
||
* convert.c (convert_to_integer_1): Likewise.
|
||
* cse.c (cse_insn): Likewise.
|
||
* expr.c (expand_expr_real_1): Likewise.
|
||
* lra-constraints.c (simplify_operand_subreg): Likewise.
|
||
* optabs-query.c (can_atomic_load_p): Likewise.
|
||
* optabs.c (expand_atomic_load): Likewise.
|
||
(expand_atomic_store): Likewise.
|
||
* ree.c (combine_reaching_defs): Likewise.
|
||
* rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
|
||
* rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
|
||
* tree.h (type_has_mode_precision_p): Likewise.
|
||
* ubsan.c (instrument_si_overflow): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
|
||
polynomial numbers of units.
|
||
(SET_TYPE_VECTOR_SUBPARTS): Likewise.
|
||
(valid_vector_subparts_p): New function.
|
||
(build_vector_type): Remove temporary shim and take the number
|
||
of units as a poly_uint64 rather than an int.
|
||
(build_opaque_vector_type): Take the number of units as a
|
||
poly_uint64 rather than an int.
|
||
* tree.c (build_vector_from_ctor): Handle polynomial
|
||
TYPE_VECTOR_SUBPARTS.
|
||
(type_hash_canon_hash, type_cache_hasher::equal): Likewise.
|
||
(uniform_vector_p, vector_type_mode, build_vector): Likewise.
|
||
(build_vector_from_val): If the number of units is variable,
|
||
use build_vec_duplicate_cst for constant operands and
|
||
VEC_DUPLICATE_EXPR otherwise.
|
||
(make_vector_type): Remove temporary is_constant ().
|
||
(build_vector_type, build_opaque_vector_type): Take the number of
|
||
units as a poly_uint64 rather than an int.
|
||
(check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
|
||
VECTOR_CST_NELTS.
|
||
* cfgexpand.c (expand_debug_expr): Likewise.
|
||
* expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
|
||
(store_constructor, expand_expr_real_1): Likewise.
|
||
(const_scalar_mask_from_tree): Likewise.
|
||
* fold-const-call.c (fold_const_reduction): Likewise.
|
||
* fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
|
||
(operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
|
||
(native_encode_vector, vec_cst_ctor_to_array): Likewise.
|
||
(fold_relational_const): Likewise.
|
||
(native_interpret_vector): Likewise. Change the size from an
|
||
int to an unsigned int.
|
||
* gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
|
||
TYPE_VECTOR_SUBPARTS.
|
||
(gimple_fold_indirect_ref, gimple_build_vector): Likewise.
|
||
(gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
|
||
duplicating a non-constant operand into a variable-length vector.
|
||
* hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
|
||
TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
|
||
* ipa-icf.c (sem_variable::equals): Likewise.
|
||
* match.pd: Likewise.
|
||
* omp-simd-clone.c (simd_clone_subparts): Likewise.
|
||
* print-tree.c (print_node): Likewise.
|
||
* stor-layout.c (layout_type): Likewise.
|
||
* targhooks.c (default_builtin_vectorization_cost): Likewise.
|
||
* tree-cfg.c (verify_gimple_comparison): Likewise.
|
||
(verify_gimple_assign_binary): Likewise.
|
||
(verify_gimple_assign_ternary): Likewise.
|
||
(verify_gimple_assign_single): Likewise.
|
||
* tree-pretty-print.c (dump_generic_node): Likewise.
|
||
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
|
||
(simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
|
||
* tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
|
||
(vect_grouped_load_supported, vect_permute_load_chain): Likewise.
|
||
(vect_shift_permute_load_chain): Likewise.
|
||
* tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
|
||
(expand_vector_condition, optimize_vector_constructor): Likewise.
|
||
(lower_vec_perm, get_compute_type): Likewise.
|
||
* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
|
||
(get_initial_defs_for_reduction, vect_transform_loop): Likewise.
|
||
* tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
|
||
(vect_recog_mask_conversion_pattern): Likewise.
|
||
* tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
|
||
(vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
|
||
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
|
||
(get_group_load_store_type, vectorizable_mask_load_store): Likewise.
|
||
(vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
|
||
(vectorizable_shift, vectorizable_operation, vectorizable_store)
|
||
(vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
|
||
(supportable_widening_operation): Likewise.
|
||
(supportable_narrowing_operation): Likewise.
|
||
* tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
|
||
Likewise.
|
||
* varasm.c (output_constant): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
|
||
so that both the length == 3 and length != 3 cases set up their
|
||
own permute vectors. Add comments explaining why we know the
|
||
number of elements is constant.
|
||
(vect_permute_load_chain): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* machmode.h (mode_nunits): Change from unsigned char to
|
||
poly_uint16_pod.
|
||
(ONLY_FIXED_SIZE_MODES): New macro.
|
||
(pod_mode::measurement_type, scalar_int_mode::measurement_type)
|
||
(scalar_float_mode::measurement_type, scalar_mode::measurement_type)
|
||
(complex_mode::measurement_type, fixed_size_mode::measurement_type):
|
||
New typedefs.
|
||
(mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
|
||
(GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
|
||
or if measurement_type is not polynomial.
|
||
* genmodes.c (ZERO_COEFFS): New macro.
|
||
(emit_mode_nunits_inline): Make mode_nunits_inline return a
|
||
poly_uint16.
|
||
(emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
|
||
Use ZERO_COEFFS when emitting initializers.
|
||
* data-streamer.h (bp_pack_poly_value): New function.
|
||
(bp_unpack_poly_value): Likewise.
|
||
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
|
||
for GET_MODE_NUNITS.
|
||
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
|
||
for GET_MODE_NUNITS.
|
||
* tree.c (make_vector_type): Remove temporary shim and make
|
||
the real function take the number of units as a poly_uint64
|
||
rather than an int.
|
||
(build_vector_type_for_mode): Handle polynomial nunits.
|
||
* dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
|
||
* emit-rtl.c (const_vec_series_p_1): Likewise.
|
||
(gen_rtx_CONST_VECTOR): Likewise.
|
||
* fold-const.c (test_vec_duplicate_folding): Likewise.
|
||
* genrecog.c (validate_pattern): Likewise.
|
||
* optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
|
||
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
|
||
* optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
|
||
(shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
|
||
(expand_vec_cond_expr, expand_mult_highpart): Likewise.
|
||
* rtlanal.c (subreg_get_info): Likewise.
|
||
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
|
||
(vect_grouped_load_supported): Likewise.
|
||
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
|
||
* tree-vect-loop.c (have_whole_vector_shift): Likewise.
|
||
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
|
||
(simplify_const_unary_operation, simplify_binary_operation_1)
|
||
(simplify_const_binary_operation, simplify_ternary_operation)
|
||
(test_vector_ops_duplicate, test_vector_ops): Likewise.
|
||
(simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
|
||
instead of CONST_VECTOR_NUNITS.
|
||
* varasm.c (output_constant_pool_2): Likewise.
|
||
* rtx-vector-builder.c (rtx_vector_builder::build): Only include the
|
||
explicit-encoded elements in the XVEC for variable-length vectors.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* coretypes.h (fixed_size_mode): Declare.
|
||
(fixed_size_mode_pod): New typedef.
|
||
* builtins.h (target_builtins::x_apply_args_mode)
|
||
(target_builtins::x_apply_result_mode): Change type to
|
||
fixed_size_mode_pod.
|
||
* builtins.c (apply_args_size, apply_result_size, result_vector)
|
||
(expand_builtin_apply_args_1, expand_builtin_apply)
|
||
(expand_builtin_return): Update accordingly.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* cse.c (hash_rtx_cb): Hash only the encoded elements.
|
||
* cselib.c (cselib_hash_rtx): Likewise.
|
||
* expmed.c (make_tree): Build VECTOR_CSTs directly from the
|
||
CONST_VECTOR encoding.
|
||
|
||
2018-01-03 Jakub Jelinek <jakub@redhat.com>
|
||
Jeff Law <law@redhat.com>
|
||
|
||
PR target/83641
|
||
* config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
|
||
noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
|
||
only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
|
||
and add REG_CFA_ADJUST_CFA notes in that case to both insns.
|
||
|
||
PR target/83641
|
||
* config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
|
||
explicitly probe *sp in a noreturn function if there were any callee
|
||
register saves or frame pointer is needed.
|
||
|
||
2018-01-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/83621
|
||
* cfgexpand.c (expand_debug_expr): Return NULL if mode is
|
||
BLKmode for ternary, binary or unary expressions.
|
||
|
||
PR debug/83645
|
||
* var-tracking.c (delete_vta_debug_insn): New inline function.
|
||
(delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
|
||
insns from get_insns () to NULL instead of each bb separately.
|
||
Use delete_vta_debug_insn. No longer static.
|
||
(vt_debug_insns_local, variable_tracking_main_1): Adjust
|
||
delete_vta_debug_insns callers.
|
||
* rtl.h (delete_vta_debug_insns): Declare.
|
||
* final.c (rest_of_handle_final): Call delete_vta_debug_insns
|
||
instead of variable_tracking_main.
|
||
|
||
2018-01-03 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/83603
|
||
* calls.c (maybe_warn_nonstring_arg): Avoid accessing function
|
||
arguments past the endof the argument list in functions declared
|
||
without a prototype.
|
||
* gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
|
||
Avoid checking when arguments are null.
|
||
|
||
2018-01-03 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR c/83559
|
||
* doc/extend.texi (attribute const): Fix a typo.
|
||
* ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
|
||
issuing -Wsuggest-attribute for void functions.
|
||
|
||
2018-01-03 Martin Sebor <msebor@redhat.com>
|
||
|
||
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
|
||
offset_int::from instead of wide_int::to_shwi.
|
||
(maybe_diag_overlap): Remove assertion.
|
||
Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
|
||
* gimple-ssa-sprintf.c (format_directive): Same.
|
||
(parse_directive): Same.
|
||
(sprintf_dom_walker::compute_format_length): Same.
|
||
(try_substitute_return_value): Same.
|
||
|
||
2018-01-03 Jeff Law <law@redhat.com>
|
||
|
||
PR middle-end/83654
|
||
* explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
|
||
non-constant residual for zero at runtime and avoid probing in
|
||
that case. Reorganize code for trailing problem to mirror handling
|
||
of the residual.
|
||
|
||
2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
|
||
|
||
PR tree-optimization/83501
|
||
* tree-ssa-strlen.c (get_string_cst): New.
|
||
(handle_char_store): Call get_string_cst.
|
||
|
||
2018-01-03 Martin Liska <mliska@suse.cz>
|
||
|
||
PR tree-optimization/83593
|
||
* tree-ssa-strlen.c: Include tree-cfg.h.
|
||
(strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
|
||
(strlen_dom_walker): Add new member variable m_cleanup_cfg.
|
||
(strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
|
||
to false.
|
||
(strlen_dom_walker::before_dom_children): Call
|
||
gimple_purge_dead_eh_edges. Dump tranformation with details
|
||
dump flags.
|
||
(strlen_dom_walker::before_dom_children): Update call by adding
|
||
new argument cleanup_eh.
|
||
(pass_strlen::execute): Return TODO_cleanup_cfg if needed.
|
||
|
||
2018-01-03 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/83549
|
||
* cif-code.def (VARIADIC_THUNK): New enum value.
|
||
* ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
|
||
thunks.
|
||
|
||
2018-01-03 Jan Beulich <jbeulich@suse.com>
|
||
|
||
* sse.md (mov<mode>_internal): Tighten condition for when to use
|
||
vmovdqu<ssescalarsize> for TI and OI modes.
|
||
|
||
2018-01-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
Update copyright years.
|
||
|
||
2018-01-03 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/83594
|
||
* ipa-visibility.c (function_and_variable_visibility): Skip
|
||
functions with noipa attribure.
|
||
|
||
2018-01-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* gcc.c (process_command): Update copyright notice dates.
|
||
* gcov-dump.c (print_version): Ditto.
|
||
* gcov.c (print_version): Ditto.
|
||
* gcov-tool.c (print_version): Ditto.
|
||
* gengtype.c (create_file): Ditto.
|
||
* doc/cpp.texi: Bump @copying's copyright year.
|
||
* doc/cppinternals.texi: Ditto.
|
||
* doc/gcc.texi: Ditto.
|
||
* doc/gccint.texi: Ditto.
|
||
* doc/gcov.texi: Ditto.
|
||
* doc/install.texi: Ditto.
|
||
* doc/invoke.texi: Ditto.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* vector-builder.h (vector_builder::m_full_nelts): Change from
|
||
unsigned int to poly_uint64.
|
||
(vector_builder::full_nelts): Update prototype accordingly.
|
||
(vector_builder::new_vector): Likewise.
|
||
(vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
|
||
(vector_builder::operator ==): Likewise.
|
||
(vector_builder::finalize): Likewise.
|
||
* int-vector-builder.h (int_vector_builder::int_vector_builder):
|
||
Take the number of elements as a poly_uint64 rather than an
|
||
unsigned int.
|
||
* vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
|
||
from unsigned int to poly_uint64.
|
||
(vec_perm_indices::vec_perm_indices): Update prototype accordingly.
|
||
(vec_perm_indices::new_vector): Likewise.
|
||
(vec_perm_indices::length): Likewise.
|
||
(vec_perm_indices::nelts_per_input): Likewise.
|
||
(vec_perm_indices::input_nelts): Likewise.
|
||
* vec-perm-indices.c (vec_perm_indices::new_vector): Take the
|
||
number of elements per input as a poly_uint64 rather than an
|
||
unsigned int. Use the original encoding for variable-length
|
||
vectors, rather than clamping each individual element.
|
||
For the second and subsequent elements in each pattern,
|
||
clamp the step and base before clamping their sum.
|
||
(vec_perm_indices::series_p): Handle polynomial element counts.
|
||
(vec_perm_indices::all_in_range_p): Likewise.
|
||
(vec_perm_indices_to_tree): Likewise.
|
||
(vec_perm_indices_to_rtx): Likewise.
|
||
* tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
|
||
* tree-vector-builder.c (tree_vector_builder::new_unary_operation)
|
||
(tree_vector_builder::new_binary_operation): Handle polynomial
|
||
element counts. Return false if we need to know the number
|
||
of elements at compile time.
|
||
* fold-const.c (fold_vec_perm): Punt if the number of elements
|
||
isn't known at compile time.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* vec-perm-indices.h (vec_perm_builder): Change element type
|
||
from HOST_WIDE_INT to poly_int64.
|
||
(vec_perm_indices::element_type): Update accordingly.
|
||
(vec_perm_indices::clamp): Handle polynomial element_types.
|
||
* vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
|
||
(vec_perm_indices::all_in_range_p): Likewise.
|
||
(tree_to_vec_perm_builder): Check for poly_int64 trees rather
|
||
than shwi trees.
|
||
* vector-builder.h (vector_builder::stepped_sequence_p): Handle
|
||
polynomial vec_perm_indices element types.
|
||
* int-vector-builder.h (int_vector_builder::equal_p): Likewise.
|
||
* fold-const.c (fold_vec_perm): Likewise.
|
||
* optabs.c (shift_amt_for_vec_perm_mask): Likewise.
|
||
* tree-vect-generic.c (lower_vec_perm): Likewise.
|
||
* tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
|
||
* config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
|
||
element type to HOST_WIDE_INT.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* alias.c (addr_side_effect_eval): Take the size as a poly_int64
|
||
rather than an int. Use plus_constant.
|
||
(memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
|
||
Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* calls.c (emit_call_1, expand_call): Change struct_value_size from
|
||
a HOST_WIDE_INT to a poly_int64.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* calls.c (load_register_parameters): Cope with polynomial
|
||
mode sizes. Require a constant size for BLKmode parameters
|
||
that aren't described by a PARALLEL. If BLOCK_REG_PADDING
|
||
forces a parameter to be padded at the lsb end in order to
|
||
fill a complete number of words, require the parameter size
|
||
to be ordered wrt UNITS_PER_WORD.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* reload1.c (spill_stack_slot_width): Change element type
|
||
from unsigned int to poly_uint64_pod.
|
||
(alter_reg): Treat mode sizes as polynomial.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* reload.c (complex_word_subreg_p): New function.
|
||
(reload_inner_reg_of_subreg, push_reload): Use it.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* lra-constraints.c (process_alt_operands): Reject matched
|
||
operands whose sizes aren't ordered.
|
||
(match_reload): Refer to this check here.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
|
||
that the mode size is in the set {1, 2, 4, 8, 16}.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
|
||
Use plus_constant instead of gen_rtx_PLUS.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
|
||
* config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
|
||
* config/cr16/cr16.c (cr16_push_rounding): ...this new function.
|
||
* config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
|
||
* config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
|
||
* config/h8300/h8300.c (h8300_push_rounding): ...this new function.
|
||
* config/i386/i386-protos.h (ix86_push_rounding): Declare.
|
||
* config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
|
||
* config/i386/i386.c (ix86_push_rounding): ...this new function.
|
||
* config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
|
||
a poly_int64.
|
||
* config/m32c/m32c.c (m32c_push_rounding): Likewise.
|
||
* config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
|
||
* config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
|
||
* config/m68k/m68k.c (m68k_push_rounding): ...this new function.
|
||
* config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
|
||
* config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
|
||
* config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
|
||
* config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
|
||
* config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
|
||
* config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
|
||
function.
|
||
* expr.c (emit_move_resolve_push): Treat the input and result
|
||
of PUSH_ROUNDING as a poly_int64.
|
||
(emit_move_complex_push, emit_single_push_insn_1): Likewise.
|
||
(emit_push_insn): Likewise.
|
||
* lra-eliminations.c (mark_not_eliminable): Likewise.
|
||
* recog.c (push_operand): Likewise.
|
||
* reload1.c (elimination_effects): Likewise.
|
||
* rtlanal.c (nonzero_bits1): Likewise.
|
||
* calls.c (store_one_arg): Likewise. Require the padding to be
|
||
known at compile time.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
|
||
Use plus_constant instead of gen_rtx_PLUS.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
|
||
rather than an int.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* expr.c (expand_expr_real_1): Use tree_to_poly_uint64
|
||
instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
|
||
via stack temporaries. Treat the mode size as polynomial too.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* expr.c (expand_expr_real_2): When handling conversions involving
|
||
unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
|
||
multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
|
||
as a poly_uint64 too.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* combine.c (can_change_dest_mode): Handle polynomial
|
||
REGMODE_NATURAL_SIZE.
|
||
* expmed.c (store_bit_field_1): Likewise.
|
||
* expr.c (store_constructor): Likewise.
|
||
* emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
|
||
and polynomial REGMODE_NATURAL_SIZE.
|
||
(gen_lowpart_common): Likewise.
|
||
* reginfo.c (record_subregs_of_mode): Likewise.
|
||
* rtlanal.c (read_modify_subreg_p): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
|
||
numbers of elements.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* match.pd: Cope with polynomial numbers of vector elements.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
|
||
in a POINTER_PLUS_EXPR.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* omp-simd-clone.c (simd_clone_subparts): New function.
|
||
(simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
|
||
(ipa_simd_modify_function_body): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
|
||
(expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
|
||
(expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
|
||
(expand_vector_condition, vector_element): Likewise.
|
||
(subparts_gt): New function.
|
||
(get_compute_type): Use subparts_gt.
|
||
(count_type_subparts): Delete.
|
||
(expand_vector_operations_1): Use subparts_gt instead of
|
||
count_type_subparts.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-data-refs.c (vect_no_alias_p): Replace with...
|
||
(vect_compile_time_alias): ...this new function. Do the calculation
|
||
on poly_ints rather than trees.
|
||
(vect_prune_runtime_alias_test_list): Update call accordingly.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
|
||
numbers of units.
|
||
(vect_schedule_slp_instance): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
|
||
constant and extern definitions for variable-length vectors.
|
||
(vect_get_constant_vectors): Note that the number of units
|
||
is known to be constant.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-stmts.c (vectorizable_conversion): Treat the number
|
||
of units as polynomial. Choose between WIDE and NARROW based
|
||
on multiple_p.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-stmts.c (simd_clone_subparts): New function.
|
||
(vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-stmts.c (vectorizable_call): Treat the number of
|
||
vectors as polynomial. Use build_index_vector for
|
||
IFN_GOMP_SIMD_LANE.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-stmts.c (get_load_store_type): Treat the number of
|
||
units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
|
||
for variable-length vectors.
|
||
(vectorizable_mask_load_store): Treat the number of units as
|
||
polynomial, asserting that it is constant if the condition has
|
||
already been enforced.
|
||
(vectorizable_store, vectorizable_load): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-loop.c (vectorizable_live_operation): Treat the number
|
||
of units as polynomial. Punt if we can't tell at compile time
|
||
which vector contains the final result.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-loop.c (vectorizable_induction): Treat the number
|
||
of units as polynomial. Punt on SLP inductions. Use an integer
|
||
VEC_SERIES_EXPR for variable-length integer reductions. Use a
|
||
cast of such a series for variable-length floating-point
|
||
reductions.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree.h (build_index_vector): Declare.
|
||
* tree.c (build_index_vector): New function.
|
||
* tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
|
||
of units as polynomial, forcibly converting it to a constant if
|
||
vectorizable_reduction has already enforced the condition.
|
||
(vect_create_epilog_for_reduction): Likewise. Use build_index_vector
|
||
to create a {1,2,3,...} vector.
|
||
(vectorizable_reduction): Treat the number of units as polynomial.
|
||
Choose vectype_in based on the largest scalar element size rather
|
||
than the smallest number of units. Enforce the restrictions
|
||
relied on above.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
|
||
number of units as polynomial.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* target.h (vector_sizes, auto_vector_sizes): New typedefs.
|
||
* target.def (autovectorize_vector_sizes): Return the vector sizes
|
||
by pointer, using vector_sizes rather than a bitmask.
|
||
* targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
|
||
* targhooks.c (default_autovectorize_vector_sizes): Likewise.
|
||
* config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
|
||
Likewise.
|
||
* config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
|
||
* config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
|
||
* config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
|
||
* config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
|
||
* omp-general.c (omp_max_vf): Likewise.
|
||
* omp-low.c (omp_clause_aligned_alignment): Likewise.
|
||
* optabs-query.c (can_vec_mask_load_store_p): Likewise.
|
||
* tree-vect-loop.c (vect_analyze_loop): Likewise.
|
||
* tree-vect-slp.c (vect_slp_bb): Likewise.
|
||
* doc/tm.texi: Regenerate.
|
||
* tree-vectorizer.h (current_vector_size): Change from an unsigned int
|
||
to a poly_uint64.
|
||
* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
|
||
the vector size as a poly_uint64 rather than an unsigned int.
|
||
(current_vector_size): Change from an unsigned int to a poly_uint64.
|
||
(get_vectype_for_scalar_type): Update accordingly.
|
||
* tree.h (build_truth_vector_type): Take the size and number of
|
||
units as a poly_uint64 rather than an unsigned int.
|
||
(build_vector_type): Add a temporary overload that takes
|
||
the number of units as a poly_uint64 rather than an unsigned int.
|
||
* tree.c (make_vector_type): Likewise.
|
||
(build_truth_vector_type): Take the number of units as a poly_uint64
|
||
rather than an unsigned int.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* target.def (get_mask_mode): Take the number of units and length
|
||
as poly_uint64s rather than unsigned ints.
|
||
* targhooks.h (default_get_mask_mode): Update accordingly.
|
||
* targhooks.c (default_get_mask_mode): Likewise.
|
||
* config/i386/i386.c (ix86_get_mask_mode): Likewise.
|
||
* doc/tm.texi: Regenerate.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
|
||
* omp-general.c (omp_max_vf): Likewise.
|
||
* omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
|
||
(expand_omp_simd): Handle polynomial safelen.
|
||
* omp-low.c (omplow_simd_context): Add a default constructor.
|
||
(omplow_simd_context::max_vf): Change from int to poly_uint64.
|
||
(lower_rec_simd_input_clauses): Update accordingly.
|
||
(lower_rec_input_clauses): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vectorizer.h (vect_nunits_for_cost): New function.
|
||
* tree-vect-loop.c (vect_model_reduction_cost): Use it.
|
||
* tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
|
||
(vect_analyze_slp_cost): Likewise.
|
||
* tree-vect-stmts.c (vect_model_store_cost): Likewise.
|
||
(vect_model_load_cost): Likewise.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
|
||
(vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
|
||
from an unsigned int * to a poly_uint64_pod *.
|
||
(calculate_unrolling_factor): New function.
|
||
(vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* tree-vectorizer.h (_slp_instance::unrolling_factor): Change
|
||
from an unsigned int to a poly_uint64.
|
||
(_loop_vec_info::slp_unrolling_factor): Likewise.
|
||
(_loop_vec_info::vectorization_factor): Change from an int
|
||
to a poly_uint64.
|
||
(MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
|
||
(vect_get_num_vectors): New function.
|
||
(vect_update_max_nunits, vect_vf_for_cost): Likewise.
|
||
(vect_get_num_copies): Use vect_get_num_vectors.
|
||
(vect_analyze_data_ref_dependences): Change max_vf from an int *
|
||
to an unsigned int *.
|
||
(vect_analyze_data_refs): Change min_vf from an int * to a
|
||
poly_uint64 *.
|
||
(vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
|
||
than an unsigned HOST_WIDE_INT.
|
||
* tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
|
||
(vect_analyze_data_ref_dependence): Change max_vf from an int *
|
||
to an unsigned int *.
|
||
(vect_analyze_data_ref_dependences): Likewise.
|
||
(vect_compute_data_ref_alignment): Handle polynomial vf.
|
||
(vect_enhance_data_refs_alignment): Likewise.
|
||
(vect_prune_runtime_alias_test_list): Likewise.
|
||
(vect_shift_permute_load_chain): Likewise.
|
||
(vect_supportable_dr_alignment): Likewise.
|
||
(dependence_distance_ge_vf): Take the vectorization factor as a
|
||
poly_uint64 rather than an unsigned HOST_WIDE_INT.
|
||
(vect_analyze_data_refs): Change min_vf from an int * to a
|
||
poly_uint64 *.
|
||
* tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
|
||
vfm1 as a poly_uint64 rather than an int. Make the same change
|
||
for the returned bound_scalar.
|
||
(vect_gen_vector_loop_niters): Handle polynomial vf.
|
||
(vect_do_peeling): Likewise. Update call to
|
||
vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
|
||
(vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
|
||
be constant.
|
||
* tree-vect-loop.c (vect_determine_vectorization_factor)
|
||
(vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
|
||
(vect_get_known_peeling_cost): Likewise.
|
||
(vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
|
||
(vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
|
||
(vect_transform_loop): Likewise. Use the lowest possible VF when
|
||
updating the upper bounds of the loop.
|
||
(vect_min_worthwhile_factor): Make static. Return an unsigned int
|
||
rather than an int.
|
||
* tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
|
||
polynomial unroll factors.
|
||
(vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
|
||
(vect_make_slp_decision): Likewise.
|
||
(vect_supported_load_permutation_p): Likewise, and polynomial
|
||
vf too.
|
||
(vect_analyze_slp_cost): Handle polynomial vf.
|
||
(vect_slp_analyze_node_operations): Likewise.
|
||
(vect_slp_analyze_bb_1): Likewise.
|
||
(vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
|
||
than an unsigned HOST_WIDE_INT.
|
||
* tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
|
||
(vectorizable_load): Handle polynomial vf.
|
||
* tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
|
||
a poly_uint64.
|
||
(adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
Alan Hayward <alan.hayward@arm.com>
|
||
David Sherwood <david.sherwood@arm.com>
|
||
|
||
* match.pd: Handle bit operations involving three constants
|
||
and try to fold one pair.
|
||
|
||
2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-vect-loop-manip.c: Include gimple-fold.h.
|
||
(slpeel_make_loop_iterate_ntimes): Add step, final_iv and
|
||
niters_maybe_zero parameters. Handle other cases besides a step of 1.
|
||
(vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
|
||
Add a path that uses a step of VF instead of 1, but disable it
|
||
for now.
|
||
(vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
|
||
and niters_no_overflow parameters. Update calls to
|
||
slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
|
||
Create a new SSA name if the latter choses to use a ste other
|
||
than zero, and return it via niters_vector_mult_vf_var.
|
||
* tree-vect-loop.c (vect_transform_loop): Update calls to
|
||
vect_do_peeling, vect_gen_vector_loop_niters and
|
||
slpeel_make_loop_iterate_ntimes.
|
||
* tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
|
||
(vect_gen_vector_loop_niters): Update declarations after above changes.
|
||
|
||
2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
|
||
128-bit round to integer instructions.
|
||
(ceil<mode>2): Likewise.
|
||
(btrunc<mode>2): Likewise.
|
||
(round<mode>2): Likewise.
|
||
|
||
2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
|
||
unaligned VSX load/store on P8/P9.
|
||
(expand_block_clear): Allow the use of unaligned VSX
|
||
load/store on P8/P9.
|
||
|
||
2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
|
||
|
||
* config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
|
||
New function.
|
||
(rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
|
||
swap associated with both a load and a store.
|
||
|
||
2018-01-02 Andrew Waterman <andrew@sifive.com>
|
||
|
||
* config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
|
||
* config/riscv/riscv.md (clear_cache): Use it.
|
||
|
||
2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
|
||
|
||
* web.c: Remove out-of-date comment.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* expr.c (fixup_args_size_notes): Check that any existing
|
||
REG_ARGS_SIZE notes are correct, and don't try to re-add them.
|
||
(emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
|
||
(emit_single_push_insn): ...here.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
|
||
(const_vector_encoded_nelts): New function.
|
||
(CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
|
||
(const_vector_int_elt, const_vector_elt): Declare.
|
||
* emit-rtl.c (const_vector_int_elt_1): New function.
|
||
(const_vector_elt): Likewise.
|
||
* simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
|
||
of CONST_VECTOR_ELT.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* expr.c: Include rtx-vector-builder.h.
|
||
(const_vector_mask_from_tree): Use rtx_vector_builder and operate
|
||
directly on the tree encoding.
|
||
(const_vector_from_tree): Likewise.
|
||
* optabs.c: Include rtx-vector-builder.h.
|
||
(expand_vec_perm_var): Use rtx_vector_builder and create a repeating
|
||
sequence of "u" values.
|
||
* vec-perm-indices.c: Include rtx-vector-builder.h.
|
||
(vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
|
||
directly on the vec_perm_indices encoding.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* doc/rtl.texi (const_vector): Describe new encoding scheme.
|
||
* Makefile.in (OBJS): Add rtx-vector-builder.o.
|
||
* rtx-vector-builder.h: New file.
|
||
* rtx-vector-builder.c: Likewise.
|
||
* rtl.h (rtx_def::u2): Add a const_vector field.
|
||
(CONST_VECTOR_NPATTERNS): New macro.
|
||
(CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
|
||
(CONST_VECTOR_DUPLICATE_P): Likewise.
|
||
(CONST_VECTOR_STEPPED_P): Likewise.
|
||
(CONST_VECTOR_ENCODED_ELT): Likewise.
|
||
(const_vec_duplicate_p): Check for a duplicated vector encoding.
|
||
(unwrap_const_vec_duplicate): Likewise.
|
||
(const_vec_series_p): Check for a non-duplicated vector encoding.
|
||
Say that the function only returns true for integer vectors.
|
||
* emit-rtl.c: Include rtx-vector-builder.h.
|
||
(gen_const_vec_duplicate_1): Delete.
|
||
(gen_const_vector): Call gen_const_vec_duplicate instead of
|
||
gen_const_vec_duplicate_1.
|
||
(const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
|
||
(gen_const_vec_duplicate): Use rtx_vector_builder.
|
||
(gen_const_vec_series): Likewise.
|
||
(gen_rtx_CONST_VECTOR): Likewise.
|
||
* config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
|
||
(swap_const_vector_halves): Take an rtx pointer rather than rtx.
|
||
Build a new vector rather than modifying a CONST_VECTOR in-place.
|
||
(handle_special_swappables): Update call accordingly.
|
||
* config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
|
||
(swap_const_vector_halves): Take an rtx pointer rather than rtx.
|
||
Build a new vector rather than modifying a CONST_VECTOR in-place.
|
||
(handle_special_swappables): Update call accordingly.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* simplify-rtx.c (simplify_const_binary_operation): Use
|
||
CONST_VECTOR_ELT instead of XVECEXP.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
|
||
the selector elements to be different from the data elements
|
||
if the selector is a VECTOR_CST.
|
||
* tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
|
||
ssizetype for the selector.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
|
||
before testing each element individually.
|
||
* tree-vect-generic.c (lower_vec_perm): Likewise.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* selftest.h (selftest::vec_perm_indices_c_tests): Declare.
|
||
* selftest-run-tests.c (selftest::run_tests): Call it.
|
||
* vector-builder.h (vector_builder::operator ==): New function.
|
||
(vector_builder::operator !=): Likewise.
|
||
* vec-perm-indices.h (vec_perm_indices::series_p): Declare.
|
||
(vec_perm_indices::all_from_input_p): New function.
|
||
* vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
|
||
(test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
|
||
* fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
|
||
instead of reading the VECTOR_CST directly. Detect whether both
|
||
vector inputs are the same before constructing the vec_perm_indices,
|
||
and update the number of inputs argument accordingly. Use the
|
||
utility functions added above. Only construct sel2 if we need to.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* optabs.c (expand_vec_perm_var): Use an explicit encoding for
|
||
the broadcast of the low byte.
|
||
(expand_mult_highpart): Use an explicit encoding for the permutes.
|
||
* optabs-query.c (can_mult_highpart_p): Likewise.
|
||
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
|
||
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
|
||
(vectorizable_bswap): Likewise.
|
||
* tree-vect-data-refs.c (vect_grouped_store_supported): Use an
|
||
explicit encoding for the power-of-2 permutes.
|
||
(vect_permute_store_chain): Likewise.
|
||
(vect_grouped_load_supported): Likewise.
|
||
(vect_permute_load_chain): Likewise.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
|
||
* vec-perm-indices.c (vec_perm_indices_to_tree): New function.
|
||
* tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
|
||
* tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
|
||
* tree-vect-stmts.c (vectorizable_bswap): Likewise.
|
||
(vect_gen_perm_mask_any): Likewise.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* int-vector-builder.h: New file.
|
||
* vec-perm-indices.h: Include int-vector-builder.h.
|
||
(vec_perm_indices): Redefine as an int_vector_builder.
|
||
(auto_vec_perm_indices): Delete.
|
||
(vec_perm_builder): Redefine as a stand-alone class.
|
||
(vec_perm_indices::vec_perm_indices): New function.
|
||
(vec_perm_indices::clamp): Likewise.
|
||
* vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
|
||
(vec_perm_indices::new_vector): New function.
|
||
(vec_perm_indices::new_expanded_vector): Update for new
|
||
vec_perm_indices class.
|
||
(vec_perm_indices::rotate_inputs): New function.
|
||
(vec_perm_indices::all_in_range_p): Operate directly on the
|
||
encoded form, without computing elided elements.
|
||
(tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
|
||
encoding. Update for new vec_perm_indices class.
|
||
* optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
|
||
the given vec_perm_builder.
|
||
(expand_vec_perm_var): Update vec_perm_builder constructor.
|
||
(expand_mult_highpart): Use vec_perm_builder instead of
|
||
auto_vec_perm_indices.
|
||
* optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
|
||
vec_perm_indices instead of auto_vec_perm_indices. Use a single
|
||
or double series encoding as appropriate.
|
||
* fold-const.c (fold_ternary_loc): Use vec_perm_builder and
|
||
vec_perm_indices instead of auto_vec_perm_indices.
|
||
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
|
||
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
|
||
(vect_permute_store_chain): Likewise.
|
||
(vect_grouped_load_supported): Likewise.
|
||
(vect_permute_load_chain): Likewise.
|
||
(vect_shift_permute_load_chain): Likewise.
|
||
* tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
|
||
(vect_transform_slp_perm_load): Likewise.
|
||
(vect_schedule_slp_instance): Likewise.
|
||
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
|
||
(vectorizable_mask_load_store): Likewise.
|
||
(vectorizable_bswap): Likewise.
|
||
(vectorizable_store): Likewise.
|
||
(vectorizable_load): Likewise.
|
||
* tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
|
||
vec_perm_indices instead of auto_vec_perm_indices. Use
|
||
tree_to_vec_perm_builder to read the vector from a tree.
|
||
* tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
|
||
vec_perm_builder instead of a vec_perm_indices.
|
||
(have_whole_vector_shift): Use vec_perm_builder and
|
||
vec_perm_indices instead of auto_vec_perm_indices. Leave the
|
||
truncation to calc_vec_perm_mask_for_shift.
|
||
(vect_create_epilog_for_reduction): Likewise.
|
||
* config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
|
||
from auto_vec_perm_indices to vec_perm_indices.
|
||
(aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
|
||
instead of changing individual elements.
|
||
(aarch64_vectorize_vec_perm_const): Use new_vector to install
|
||
the vector in d.perm.
|
||
* config/arm/arm.c (expand_vec_perm_d::perm): Change
|
||
from auto_vec_perm_indices to vec_perm_indices.
|
||
(arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
|
||
instead of changing individual elements.
|
||
(arm_vectorize_vec_perm_const): Use new_vector to install
|
||
the vector in d.perm.
|
||
* config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
|
||
Update vec_perm_builder constructor.
|
||
(rs6000_expand_interleave): Likewise.
|
||
* config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
|
||
(rs6000_expand_interleave): Likewise.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* optabs-query.c (can_vec_perm_var_p): Check whether lowering
|
||
to qimode could truncate the indices.
|
||
* optabs.c (expand_vec_perm_var): Likewise.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* Makefile.in (OBJS): Add vec-perm-indices.o.
|
||
* vec-perm-indices.h: New file.
|
||
* vec-perm-indices.c: Likewise.
|
||
* target.h (vec_perm_indices): Replace with a forward class
|
||
declaration.
|
||
(auto_vec_perm_indices): Move to vec-perm-indices.h.
|
||
* optabs.h: Include vec-perm-indices.h.
|
||
(expand_vec_perm): Delete.
|
||
(selector_fits_mode_p, expand_vec_perm_var): Declare.
|
||
(expand_vec_perm_const): Declare.
|
||
* target.def (vec_perm_const_ok): Replace with...
|
||
(vec_perm_const): ...this new hook.
|
||
* doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
|
||
(TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
|
||
* doc/tm.texi: Regenerate.
|
||
* optabs.def (vec_perm_const): Delete.
|
||
* doc/md.texi (vec_perm_const): Likewise.
|
||
(vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
|
||
* expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
|
||
expand_vec_perm for constant permutation vectors. Assert that
|
||
the mode of variable permutation vectors is the integer equivalent
|
||
of the mode that is being permuted.
|
||
* optabs-query.h (selector_fits_mode_p): Declare.
|
||
* optabs-query.c: Include vec-perm-indices.h.
|
||
(selector_fits_mode_p): New function.
|
||
(can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
|
||
is defined, instead of checking whether the vec_perm_const_optab
|
||
exists. Use targetm.vectorize.vec_perm_const instead of
|
||
targetm.vectorize.vec_perm_const_ok. Check whether the indices
|
||
fit in the vector mode before using a variable permute.
|
||
* optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
|
||
vec_perm_indices instead of an rtx.
|
||
(expand_vec_perm): Replace with...
|
||
(expand_vec_perm_const): ...this new function. Take the selector
|
||
as a vec_perm_indices rather than an rtx. Also take the mode of
|
||
the selector. Update call to shift_amt_for_vec_perm_mask.
|
||
Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
|
||
Use vec_perm_indices::new_expanded_vector to expand the original
|
||
selector into bytes. Check whether the indices fit in the vector
|
||
mode before using a variable permute.
|
||
(expand_vec_perm_var): Make global.
|
||
(expand_mult_highpart): Use expand_vec_perm_const.
|
||
* fold-const.c: Includes vec-perm-indices.h.
|
||
* tree-ssa-forwprop.c: Likewise.
|
||
* tree-vect-data-refs.c: Likewise.
|
||
* tree-vect-generic.c: Likewise.
|
||
* tree-vect-loop.c: Likewise.
|
||
* tree-vect-slp.c: Likewise.
|
||
* tree-vect-stmts.c: Likewise.
|
||
* config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
|
||
Delete.
|
||
* config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
|
||
* config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
|
||
(aarch64_vectorize_vec_perm_const_ok): Fuse into...
|
||
(aarch64_vectorize_vec_perm_const): ...this new function.
|
||
(TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
|
||
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
|
||
* config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
|
||
* config/arm/vec-common.md (vec_perm_const<mode>): Delete.
|
||
* config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
|
||
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
|
||
(arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
|
||
into...
|
||
(arm_vectorize_vec_perm_const): ...this new function. Explicitly
|
||
check for NEON modes.
|
||
* config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
|
||
* config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
|
||
* config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
|
||
(ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
|
||
into...
|
||
(ix86_vectorize_vec_perm_const): ...this new function. Incorporate
|
||
the old VEC_PERM_CONST conditions.
|
||
* config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
|
||
* config/ia64/vect.md (vec_perm_const<mode>): Delete.
|
||
* config/ia64/ia64.c (ia64_expand_vec_perm_const)
|
||
(ia64_vectorize_vec_perm_const_ok): Merge into...
|
||
(ia64_vectorize_vec_perm_const): ...this new function.
|
||
* config/mips/loongson.md (vec_perm_const<mode>): Delete.
|
||
* config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
|
||
* config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
|
||
* config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
|
||
* config/mips/mips.c (mips_expand_vec_perm_const)
|
||
(mips_vectorize_vec_perm_const_ok): Merge into...
|
||
(mips_vectorize_vec_perm_const): ...this new function.
|
||
* config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
|
||
* config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
|
||
* config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
|
||
* config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
|
||
* config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
|
||
(rs6000_expand_vec_perm_const): Delete.
|
||
* config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
|
||
Delete.
|
||
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
|
||
(altivec_expand_vec_perm_const_le): Take each operand individually.
|
||
Operate on constant selectors rather than rtxes.
|
||
(altivec_expand_vec_perm_const): Likewise. Update call to
|
||
altivec_expand_vec_perm_const_le.
|
||
(rs6000_expand_vec_perm_const): Delete.
|
||
(rs6000_vectorize_vec_perm_const_ok): Delete.
|
||
(rs6000_vectorize_vec_perm_const): New function.
|
||
(rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
|
||
an element count and rtx array.
|
||
(rs6000_expand_extract_even): Update call accordingly.
|
||
(rs6000_expand_interleave): Likewise.
|
||
* config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
|
||
* config/rs6000/paired.md (vec_perm_constv2sf): Delete.
|
||
* config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
|
||
* config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
|
||
(rs6000_expand_vec_perm_const): Delete.
|
||
* config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
|
||
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
|
||
(altivec_expand_vec_perm_const_le): Take each operand individually.
|
||
Operate on constant selectors rather than rtxes.
|
||
(altivec_expand_vec_perm_const): Likewise. Update call to
|
||
altivec_expand_vec_perm_const_le.
|
||
(rs6000_expand_vec_perm_const): Delete.
|
||
(rs6000_vectorize_vec_perm_const_ok): Delete.
|
||
(rs6000_vectorize_vec_perm_const): New function. Remove stray
|
||
reference to the SPE evmerge intructions.
|
||
(rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
|
||
an element count and rtx array.
|
||
(rs6000_expand_extract_even): Update call accordingly.
|
||
(rs6000_expand_interleave): Likewise.
|
||
* config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
|
||
* config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
|
||
new function.
|
||
(TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* optabs.c (expand_vec_perm_1): Assert that SEL has an integer
|
||
vector mode and that that mode matches the mode of the data
|
||
being permuted.
|
||
(expand_vec_perm): Split handling of non-CONST_VECTOR selectors
|
||
out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
|
||
directly using expand_vec_perm_1 when forcing selectors into
|
||
registers.
|
||
(expand_vec_perm_var): New function, split out from expand_vec_perm.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* optabs-query.h (can_vec_perm_p): Delete.
|
||
(can_vec_perm_var_p, can_vec_perm_const_p): Declare.
|
||
* optabs-query.c (can_vec_perm_p): Split into...
|
||
(can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
|
||
(can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
|
||
particular selector is valid.
|
||
* tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
|
||
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
|
||
(vect_grouped_load_supported): Likewise.
|
||
(vect_shift_permute_load_chain): Likewise.
|
||
* tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
|
||
(vect_transform_slp_perm_load): Likewise.
|
||
* tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
|
||
(vectorizable_bswap): Likewise.
|
||
(vect_gen_perm_mask_checked): Likewise.
|
||
* fold-const.c (fold_ternary_loc): Likewise. Don't take
|
||
implementations of variable permutation vectors into account
|
||
when deciding which selector to use.
|
||
* tree-vect-loop.c (have_whole_vector_shift): Don't check whether
|
||
vec_perm_const_optab is supported; instead use can_vec_perm_const_p
|
||
with a false third argument.
|
||
* tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
|
||
to test whether the constant selector is valid and can_vec_perm_var_p
|
||
to test whether a variable selector is valid.
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
|
||
* optabs-query.c (can_vec_perm_p): Likewise.
|
||
* fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
|
||
instead of vec_perm_indices.
|
||
* tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
|
||
(vect_gen_perm_mask_checked): Likewise,
|
||
* tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
|
||
(vect_gen_perm_mask_checked): Likewise,
|
||
|
||
2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
|
||
|
||
* optabs-query.h (qimode_for_vec_perm): Declare.
|
||
* optabs-query.c (can_vec_perm_p): Split out qimode search to...
|
||
(qimode_for_vec_perm): ...this new function.
|
||
* optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
|
||
|
||
2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
|
||
|
||
* rtlanal.c (canonicalize_condition): Return 0 if final rtx
|
||
does not have a conditional at the top.
|
||
|
||
2018-01-02 Richard Biener <rguenther@suse.de>
|
||
|
||
* ipa-inline.c (big_speedup_p): Fix expression.
|
||
|
||
2018-01-02 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR target/81616
|
||
* config/i386/x86-tune-costs.h: Increase cost of integer load costs
|
||
for generic 4->6.
|
||
|
||
2018-01-02 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR target/81616
|
||
Generic tuning.
|
||
* x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
|
||
cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
|
||
and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
|
||
cond_taken_branch_cost 3->4.
|
||
|
||
2018-01-01 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/83581
|
||
* tree-loop-distribution.c (pass_loop_distribution::execute): Return
|
||
TODO_cleanup_cfg if any changes have been made.
|
||
|
||
PR middle-end/83608
|
||
* expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
|
||
convert_modes if target mode has the right side, but different mode
|
||
class.
|
||
|
||
PR middle-end/83609
|
||
* expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
|
||
last argument when extracting from CONCAT. If either from_real or
|
||
from_imag is NULL, use expansion through memory. If result is not
|
||
a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
|
||
the parts directly to inner mode, if even that fails, use expansion
|
||
through memory.
|
||
|
||
PR middle-end/83623
|
||
* expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
|
||
check for bswap in mode rather than HImode and use that in expand_unop
|
||
too.
|
||
|
||
Copyright (C) 2018 Free Software Foundation, Inc.
|
||
|
||
Copying and distribution of this file, with or without modification,
|
||
are permitted in any medium without royalty provided the copyright
|
||
notice and this notice are preserved.
|