mirror of git://gcc.gnu.org/git/gcc.git
100 lines
2.3 KiB
C
100 lines
2.3 KiB
C
// locks.h - Thread synchronization primitives. PowerPC implementation.
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/* Copyright (C) 2002 Free Software Foundation
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This file is part of libgcj.
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This software is copyrighted work licensed under the terms of the
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Libgcj License. Please consult the file "LIBGCJ_LICENSE" for
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details. */
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#ifndef __SYSDEP_LOCKS_H__
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#define __SYSDEP_LOCKS_H__
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#ifdef __powerpc64__
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#define _LARX "ldarx "
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#define _STCX "stdcx. "
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#else
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#define _LARX "lwarx "
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#ifdef __PPC405__
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#define _STCX "sync; stwcx. "
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#else
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#define _STCX "stwcx. "
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#endif
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#endif
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typedef size_t obj_addr_t; /* Integer type big enough for object */
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/* address. */
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inline static bool
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compare_and_swap (volatile obj_addr_t *addr, obj_addr_t old,
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obj_addr_t new_val)
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{
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int ret;
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__asm__ __volatile__ (
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"0: " _LARX "%0,0,%1 \n"
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" xor. %0,%3,%0\n"
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" bne 1f\n"
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" " _STCX "%2,0,%1\n"
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" bne- 0b\n"
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"1: \n"
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: "=&r" (ret)
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: "r" (addr), "r" (new_val), "r" (old)
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: "cr0", "memory");
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/* This version of __compare_and_swap is to be used when acquiring
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a lock, so we don't need to worry about whether other memory
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operations have completed, but we do need to be sure that any loads
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after this point really occur after we have acquired the lock. */
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__asm__ __volatile__ ("isync" : : : "memory");
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return ret == 0;
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}
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inline static void
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release_set (volatile obj_addr_t *addr, obj_addr_t new_val)
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{
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__asm__ __volatile__ ("sync" : : : "memory");
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*addr = new_val;
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}
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inline static bool
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compare_and_swap_release (volatile obj_addr_t *addr, obj_addr_t old,
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obj_addr_t new_val)
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{
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int ret;
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__asm__ __volatile__ ("sync" : : : "memory");
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__asm__ __volatile__ (
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"0: " _LARX "%0,0,%1 \n"
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" xor. %0,%3,%0\n"
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" bne 1f\n"
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" " _STCX "%2,0,%1\n"
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" bne- 0b\n"
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"1: \n"
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: "=&r" (ret)
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: "r" (addr), "r" (new_val), "r" (old)
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: "cr0", "memory");
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return ret == 0;
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}
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// Ensure that subsequent instructions do not execute on stale
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// data that was loaded from memory before the barrier.
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inline static void
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read_barrier ()
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{
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__asm__ __volatile__ ("isync" : : : "memory");
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}
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// Ensure that prior stores to memory are completed with respect to other
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// processors.
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inline static void
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write_barrier ()
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{
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__asm__ __volatile__ ("sync" : : : "memory");
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}
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#endif
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