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https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
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KVM: arm64: selftests: Add a test case for a linked breakpoint
Currently, the debug-exceptions test doesn't have a test case for a linked breakpoint. Add a test case for the linked breakpoint to the test. The new test case uses a pair of breakpoints. One is the higiest numbered context-aware breakpoint (for Context ID match), and the other one is the breakpoint#0 (for Address Match), which is linked to the context-aware breakpoint. Signed-off-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221020054202.2119018-8-reijiw@google.com
This commit is contained in:
committed by
Marc Zyngier
parent
5dd544e882
commit
142365932f
@@ -12,6 +12,10 @@
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#define DBGBCR_EXEC (0x0 << 3)
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#define DBGBCR_EL1 (0x1 << 1)
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#define DBGBCR_E (0x1 << 0)
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#define DBGBCR_LBN_SHIFT 16
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#define DBGBCR_BT_SHIFT 20
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#define DBGBCR_BT_ADDR_LINK_CTX (0x1 << DBGBCR_BT_SHIFT)
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#define DBGBCR_BT_CTX_LINK (0x3 << DBGBCR_BT_SHIFT)
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#define DBGWCR_LEN8 (0xff << 5)
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#define DBGWCR_RD (0x1 << 3)
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@@ -22,7 +26,7 @@
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#define SPSR_D (1 << 9)
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#define SPSR_SS (1 << 21)
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extern unsigned char sw_bp, sw_bp2, hw_bp, hw_bp2, bp_svc, bp_brk, hw_wp, ss_start;
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extern unsigned char sw_bp, sw_bp2, hw_bp, hw_bp2, bp_svc, bp_brk, hw_wp, ss_start, hw_bp_ctx;
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extern unsigned char iter_ss_begin, iter_ss_end;
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static volatile uint64_t sw_bp_addr, hw_bp_addr;
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static volatile uint64_t wp_addr, wp_data_addr;
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@@ -105,6 +109,7 @@ static void reset_debug_state(void)
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isb();
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write_sysreg(0, mdscr_el1);
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write_sysreg(0, contextidr_el1);
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/* Reset all bcr/bvr/wcr/wvr registers */
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dfr0 = read_sysreg(id_aa64dfr0_el1);
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@@ -166,6 +171,31 @@ static void install_hw_bp(uint8_t bpn, uint64_t addr)
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enable_monitor_debug_exceptions();
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}
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void install_hw_bp_ctx(uint8_t addr_bp, uint8_t ctx_bp, uint64_t addr,
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uint64_t ctx)
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{
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uint32_t addr_bcr, ctx_bcr;
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/* Setup a context-aware breakpoint for Linked Context ID Match */
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ctx_bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E |
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DBGBCR_BT_CTX_LINK;
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write_dbgbcr(ctx_bp, ctx_bcr);
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write_dbgbvr(ctx_bp, ctx);
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/*
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* Setup a normal breakpoint for Linked Address Match, and link it
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* to the context-aware breakpoint.
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*/
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addr_bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E |
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DBGBCR_BT_ADDR_LINK_CTX |
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((uint32_t)ctx_bp << DBGBCR_LBN_SHIFT);
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write_dbgbcr(addr_bp, addr_bcr);
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write_dbgbvr(addr_bp, addr);
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isb();
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enable_monitor_debug_exceptions();
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}
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static void install_ss(void)
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{
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uint32_t mdscr;
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@@ -179,8 +209,10 @@ static void install_ss(void)
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static volatile char write_data;
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static void guest_code(uint8_t bpn, uint8_t wpn)
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static void guest_code(uint8_t bpn, uint8_t wpn, uint8_t ctx_bpn)
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{
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uint64_t ctx = 0xabcdef; /* a random context number */
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/* Software-breakpoint */
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reset_debug_state();
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asm volatile("sw_bp: brk #0");
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@@ -263,6 +295,17 @@ static void guest_code(uint8_t bpn, uint8_t wpn)
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: : : "x0");
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GUEST_ASSERT_EQ(ss_addr[0], 0);
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/* Linked hardware-breakpoint */
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hw_bp_addr = 0;
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reset_debug_state();
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install_hw_bp_ctx(bpn, ctx_bpn, PC(hw_bp_ctx), ctx);
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/* Set context id */
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write_sysreg(ctx, contextidr_el1);
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isb();
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asm volatile("hw_bp_ctx: nop");
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write_sysreg(0, contextidr_el1);
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GUEST_ASSERT_EQ(hw_bp_addr, PC(hw_bp_ctx));
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GUEST_DONE();
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}
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@@ -342,11 +385,12 @@ static int debug_version(uint64_t id_aa64dfr0)
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return FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_DEBUGVER), id_aa64dfr0);
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}
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static void test_guest_debug_exceptions(void)
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static void test_guest_debug_exceptions(uint64_t aa64dfr0)
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{
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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struct ucall uc;
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uint8_t brp_num;
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vm = vm_create_with_one_vcpu(&vcpu, guest_code);
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ucall_init(vm, NULL);
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@@ -365,8 +409,15 @@ static void test_guest_debug_exceptions(void)
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vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT,
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ESR_EC_SVC64, guest_svc_handler);
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/* Run tests with breakpoint#0 and watchpoint#0. */
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vcpu_args_set(vcpu, 2, 0, 0);
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/* Number of breakpoints */
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brp_num = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_BRPS), aa64dfr0) + 1;
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__TEST_REQUIRE(brp_num >= 2, "At least two breakpoints are required");
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/*
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* Run tests with breakpoint#0, watchpoint#0, and the higiest
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* numbered (context-aware) breakpoint.
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*/
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vcpu_args_set(vcpu, 3, 0, 0, brp_num - 1);
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vcpu_run(vcpu);
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switch (get_ucall(vcpu, &uc)) {
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@@ -483,7 +534,7 @@ int main(int argc, char *argv[])
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}
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}
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test_guest_debug_exceptions();
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test_guest_debug_exceptions(aa64dfr0);
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test_single_step_from_userspace(ss_iteration);
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return 0;
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