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drm/amdgpu: set RAS EEPROM address from VBIOS
update to latest atombios fw table Signed-off-by: John Clements <john.clements@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
564e3dcf79
commit
14fb496a84
@@ -468,6 +468,46 @@ bool amdgpu_atomfirmware_dynamic_boot_config_supported(struct amdgpu_device *ade
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return (fw_cap & ATOM_FIRMWARE_CAP_DYNAMIC_BOOT_CFG_ENABLE) ? true : false;
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}
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/*
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* Helper function to query RAS EEPROM address
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*
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* @adev: amdgpu_device pointer
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*
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* Return true if vbios supports ras rom address reporting
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*/
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bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_address)
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{
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struct amdgpu_mode_info *mode_info = &adev->mode_info;
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int index;
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u16 data_offset, size;
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union firmware_info *firmware_info;
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u8 frev, crev;
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if (i2c_address == NULL)
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return false;
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*i2c_address = 0;
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index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
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firmwareinfo);
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if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context,
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index, &size, &frev, &crev, &data_offset)) {
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/* support firmware_info 3.4 + */
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if ((frev == 3 && crev >=4) || (frev > 3)) {
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firmware_info = (union firmware_info *)
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(mode_info->atom_context->bios + data_offset);
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*i2c_address = firmware_info->v34.ras_rom_i2c_slave_addr;
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}
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}
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if (*i2c_address != 0)
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return true;
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return false;
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}
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union smu_info {
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struct atom_smu_info_v3_1 v31;
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};
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