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Merge tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pull asm-generic updates from Arnd Bergmann:
"The asm-generic tree contains three separate changes for linux-5.19:
- The h8300 architecture is retired after it has been effectively
unmaintained for a number of years. This is the last architecture
we supported that has no MMU implementation, but there are still a
few architectures (arm, m68k, riscv, sh and xtensa) that support
CPUs with and without an MMU.
- A series to add a generic ticket spinlock that can be shared by
most architectures with a working cmpxchg or ll/sc type atomic,
including the conversion of riscv, csky and openrisc. This series
is also a prerequisite for the loongarch64 architecture port that
will come as a separate pull request.
- A cleanup of some exported uapi header files to ensure they can be
included from user space without relying on other kernel headers"
* tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
h8300: remove stale bindings and symlink
sparc: add asm/stat.h to UAPI compile-test coverage
powerpc: add asm/stat.h to UAPI compile-test coverage
mips: add asm/stat.h to UAPI compile-test coverage
riscv: add linux/bpf_perf_event.h to UAPI compile-test coverage
kbuild: prevent exported headers from including <stdlib.h>, <stdbool.h>
agpgart.h: do not include <stdlib.h> from exported header
csky: Move to generic ticket-spinlock
RISC-V: Move to queued RW locks
RISC-V: Move to generic spinlocks
openrisc: Move to ticket-spinlock
asm-generic: qrwlock: Document the spinlock fairness requirements
asm-generic: qspinlock: Indicate the use of mixed-size atomics
asm-generic: ticket-lock: New generic ticket-based spinlock
remove the h8300 architecture
This commit is contained in:
@@ -1,22 +0,0 @@
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* H8/300H Interrupt controller
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Required properties:
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- compatible: has to be "renesas,h8300h-intc", "renesas,h8300-intc" as fallback.
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- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
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interrupts.txt in this directory
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- regs: Base address of interrupt controller registers.
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Optional properties:
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- any properties, listed in interrupts.txt, and any standard resource allocation
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properties
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Example:
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h8intc: interrupt-controller@fee012 {
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compatible = "renesas,h8300h-intc", "renesas,h8300-intc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xfee012 7>;
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};
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@@ -1,22 +0,0 @@
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* H8S Interrupt controller
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Required properties:
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- compatible: has to be "renesas,h8s-intc", "renesas,h8300-intc" as fallback.
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- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
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interrupts.txt in this directory
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- regs: Base address of interrupt controller registers.
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Optional properties:
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- any properties, listed in interrupts.txt, and any standard resource allocation
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properties
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Example:
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h8intc: interrupt-controller@fffe00 {
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compatible = "renesas,h8s-intc", "renesas,h8300-intc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xfffe00 24>;
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};
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