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drm/amd/display: make clk_mgr call enable_pme_wa

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[why]
Before for raven and navi we are calling pp_smu functions for pme

[how]
refactor a code so we will call clk_mgr's enable_pme_wa function so we
can use pme_wa for future asics. This way we don't need to worry about
different ASIC since clk_mgr already have that information

Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Su Sung Chung
2019-05-30 14:59:03 -04:00
committed by Alex Deucher
parent 7a5ab155d3
commit 170a2398d2
3 changed files with 35 additions and 24 deletions
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16
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
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@@ -303,10 +303,24 @@ void dcn2_init_clocks(struct clk_mgr *clk_mgr)
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
}
void dcn2_enable_pme_wa(struct clk_mgr *clk_mgr_base)
{
struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
struct pp_smu_funcs_nv *pp_smu = NULL;
if (clk_mgr->pp_smu) {
pp_smu = &clk_mgr->pp_smu->nv_funcs;
if (pp_smu->set_pme_wa_enable)
pp_smu->set_pme_wa_enable(&pp_smu->pp_smu);
}
}
static struct clk_mgr_funcs dcn2_funcs = {
.get_dp_ref_clk_frequency = dce12_get_dp_ref_freq_khz,
.update_clocks = dcn2_update_clocks,
.init_clocks = dcn2_init_clocks
.init_clocks = dcn2_init_clocks,
.enable_pme_wa = dcn2_enable_pme_wa
};