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https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-25 00:52:45 -04:00
drm/amdgpu/gfx: set sched.ready status after ring/IB test in gfx
sched.ready is nothing with ring initialization, it needs to set to be true after ring/IB test in amdgpu_ring_test_helper to tell the ring is ready for submission. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
61c31b8b6c
commit
232f243189
@@ -3228,7 +3228,6 @@ static int gfx_v11_0_cp_gfx_resume(struct amdgpu_device *adev)
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u32 tmp;
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u32 rb_bufsz;
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u64 rb_addr, rptr_addr, wptr_gpu_addr;
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u32 i;
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/* Set the write pointer delay */
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WREG32_SOC15(GC, 0, regCP_RB_WPTR_DELAY, 0);
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@@ -3320,11 +3319,6 @@ static int gfx_v11_0_cp_gfx_resume(struct amdgpu_device *adev)
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/* start the ring */
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gfx_v11_0_cp_gfx_start(adev);
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for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
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ring = &adev->gfx.gfx_ring[i];
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ring->sched.ready = true;
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}
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return 0;
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}
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@@ -3370,8 +3364,6 @@ static void gfx_v11_0_cp_compute_enable(struct amdgpu_device *adev, bool enable)
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WREG32_SOC15(GC, 0, regCP_MEC_CNTL, data);
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}
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adev->gfx.kiq[0].ring.sched.ready = enable;
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udelay(50);
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}
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@@ -3711,7 +3703,7 @@ static int gfx_v11_0_cp_async_gfx_ring_resume(struct amdgpu_device *adev)
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r = amdgpu_bo_reserve(ring->mqd_obj, false);
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if (unlikely(r != 0))
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goto done;
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return r;
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r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&ring->mqd_ptr);
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if (!r) {
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@@ -3721,23 +3713,14 @@ static int gfx_v11_0_cp_async_gfx_ring_resume(struct amdgpu_device *adev)
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}
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amdgpu_bo_unreserve(ring->mqd_obj);
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if (r)
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goto done;
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return r;
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}
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r = amdgpu_gfx_enable_kgq(adev, 0);
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if (r)
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goto done;
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return r;
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r = gfx_v11_0_cp_gfx_start(adev);
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if (r)
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goto done;
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for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
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ring = &adev->gfx.gfx_ring[i];
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ring->sched.ready = true;
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}
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done:
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return r;
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return gfx_v11_0_cp_gfx_start(adev);
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}
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static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
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