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firmware: zynqmp: Add MMIO read and write support for PS_MODE pin
Add Xilinx ZynqMP firmware MMIO APIs support to set and get PS_MODE pins value and status. These APIs create an interface path between mode pin controller driver and low-level API to access GPIO pins. Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
This commit is contained in:
committed by
Bartosz Golaszewski
parent
03e2080def
commit
23c64d7618
@@ -72,6 +72,8 @@ enum pm_api_id {
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PM_SET_REQUIREMENT = 15,
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PM_RESET_ASSERT = 17,
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PM_RESET_GET_STATUS = 18,
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PM_MMIO_WRITE = 19,
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PM_MMIO_READ = 20,
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PM_PM_INIT_FINALIZE = 21,
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PM_FPGA_LOAD = 22,
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PM_FPGA_GET_STATUS = 23,
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@@ -390,6 +392,8 @@ int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type);
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int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
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const enum zynqmp_pm_reset_action assert_flag);
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int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status);
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unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode);
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int zynqmp_pm_bootmode_write(u32 ps_mode);
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int zynqmp_pm_init_finalize(void);
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int zynqmp_pm_set_suspend_mode(u32 mode);
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int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
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@@ -520,6 +524,16 @@ static inline int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset,
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return -ENODEV;
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}
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static inline unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
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{
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return -ENODEV;
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}
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static inline int zynqmp_pm_bootmode_write(u32 ps_mode)
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{
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return -ENODEV;
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}
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static inline int zynqmp_pm_init_finalize(void)
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{
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return -ENODEV;
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