mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-25 00:52:45 -04:00
Merge tag 'devicetree-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring: - DT schemas for PWM, syscon, power domains, SRAM, syscon-reboot, syscon-poweroff, renesas-irqc, simple-pm-bus, renesas-bsc, pwm-rcar, Renesas tpu, at24 eeprom, rtc-sh, Allwinner PS/2, sharp,ld-d5116z01b panel, Arm SMMU, max77650, Meson CEC, Amlogic canvas and DWC3 glue, Allwinner A10 mUSB and CAN, TI Davinci MDIO, QCom QCS404 interconnect, Unisoc/Spreadtrum SoCs and UART - Convert a bunch of Samsung bindings to DT schema - Convert a bunch of ST stm32 bindings to DT schema - Realtek and Exynos additions to Arm Mali bindings - Fix schema errors in RiscV CPU schema - Various schema fixes from improved meta-schema checks - Improve the handling of 'dma-ranges' and in particular fix DMA mask setup on PCI bridges - Fix a memory leak in add_changeset_property() and DT unit tests. - Several documentation improvements for schema validation - Rework build rules to improve schema validation errors - Color output for dtx_diff * tag 'devicetree-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (138 commits) libfdt: define INT32_MAX and UINT32_MAX in libfdt_env.h dt-bindings: arm: Remove leftover axentia.txt of: unittest: fix memory leak in attach_node_and_children of: overlay: add_changeset_property() memory leak dt-bindings: interrupt-controller: arm,gic-v3: Add missing type to interrupt-partition-* nodes dt-bindings: firmware: ixp4xx: Drop redundant minItems/maxItems dt-bindings: power: Rename back power_domain.txt bindings to fix references dt-bindings: i2c: stm32: Migrate i2c-stm32 documentation to yaml dt-bindings: mtd: Convert stm32 fmc2-nand bindings to json-schema dt-bindings: remoteproc: convert stm32-rproc to json-schema dt-bindings: mailbox: convert stm32-ipcc to json-schema dt-bindings: mfd: Convert stm32 low power timers bindings to json-schema dt-bindings: interrupt-controller: Convert stm32-exti to json-schema dt-bindings: crypto: Convert stm32 HASH bindings to json-schema dt-bindings: rng: Convert stm32 RNG bindings to json-schema dt-bindings: pwm: Convert Samsung PWM bindings to json-schema dt-bindings: pwm: Convert PWM bindings to json-schema dt-bindings: serial: Add a new compatible string for SC9863A dt-bindings: serial: Convert sprd-uart to json-schema dt-bindings: arm: Add bindings for Unisoc SC9863A ...
This commit is contained in:
@@ -1,19 +0,0 @@
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Samsung SoC SlimSSS (Slim Security SubSystem) module
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The SlimSSS module in Exynos5433 SoC supports the following:
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-- Feeder (FeedCtrl)
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-- Advanced Encryption Standard (AES) with ECB,CBC,CTR,XTS and (CBC/XTS)/CTS
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-- SHA-1/SHA-256 and (SHA-1/SHA-256)/HMAC
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Required properties:
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- compatible : Should contain entry for slimSSS version:
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- "samsung,exynos5433-slim-sss" for Exynos5433 SoC.
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- reg : Offset and length of the register set for the module
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- interrupts : interrupt specifiers of SlimSSS module interrupts (one feed
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control interrupt).
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- clocks : list of clock phandle and specifier pairs for all clocks listed in
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clock-names property.
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- clock-names : list of device clock input names; should contain "pclk" and
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"aclk" for slim-sss in Exynos5433.
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@@ -0,0 +1,47 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/samsung-slimsss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos SoC SlimSSS (Slim Security SubSystem) module
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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- Kamil Konieczny <k.konieczny@partner.samsung.com>
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description: |+
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The SlimSSS module in Exynos5433 SoC supports the following:
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-- Feeder (FeedCtrl)
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-- Advanced Encryption Standard (AES) with ECB,CBC,CTR,XTS and (CBC/XTS)/CTS
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-- SHA-1/SHA-256 and (SHA-1/SHA-256)/HMAC
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properties:
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compatible:
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items:
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- const: samsung,exynos5433-slim-ss
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reg:
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maxItems: 1
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: pclk
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- const: aclk
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interrupts:
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description: One feed control interrupt.
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maxItems: 1
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required:
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- compatible
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- reg
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- clock-names
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- clocks
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- interrupts
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additionalProperties: false
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@@ -1,32 +0,0 @@
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Samsung SoC SSS (Security SubSystem) module
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The SSS module in S5PV210 SoC supports the following:
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-- Feeder (FeedCtrl)
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-- Advanced Encryption Standard (AES)
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-- Data Encryption Standard (DES)/3DES
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-- Public Key Accelerator (PKA)
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-- SHA-1/SHA-256/MD5/HMAC (SHA-1/SHA-256/MD5)/PRNG
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-- PRNG: Pseudo Random Number Generator
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The SSS module in Exynos4 (Exynos4210) and
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Exynos5 (Exynos5420 and Exynos5250) SoCs
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supports the following also:
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-- ARCFOUR (ARC4)
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-- True Random Number Generator (TRNG)
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-- Secure Key Manager
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Required properties:
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- compatible : Should contain entries for this and backward compatible
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SSS versions:
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- "samsung,s5pv210-secss" for S5PV210 SoC.
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- "samsung,exynos4210-secss" for Exynos4210, Exynos4212, Exynos4412, Exynos5250,
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Exynos5260 and Exynos5420 SoCs.
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- reg : Offset and length of the register set for the module
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- interrupts : interrupt specifiers of SSS module interrupts (one feed
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control interrupt).
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- clocks : list of clock phandle and specifier pairs for all clocks listed in
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clock-names property.
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- clock-names : list of device clock input names; should contain one entry
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"secss".
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58
Documentation/devicetree/bindings/crypto/samsung-sss.yaml
Normal file
58
Documentation/devicetree/bindings/crypto/samsung-sss.yaml
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@@ -0,0 +1,58 @@
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/samsung-sss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos SoC SSS (Security SubSystem) module
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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- Kamil Konieczny <k.konieczny@partner.samsung.com>
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description: |+
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The SSS module in S5PV210 SoC supports the following:
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-- Feeder (FeedCtrl)
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-- Advanced Encryption Standard (AES)
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-- Data Encryption Standard (DES)/3DES
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-- Public Key Accelerator (PKA)
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-- SHA-1/SHA-256/MD5/HMAC (SHA-1/SHA-256/MD5)/PRNG
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-- PRNG: Pseudo Random Number Generator
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The SSS module in Exynos4 (Exynos4210) and Exynos5 (Exynos5420 and Exynos5250)
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SoCs supports the following also:
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-- ARCFOUR (ARC4)
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-- True Random Number Generator (TRNG)
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-- Secure Key Manager
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properties:
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compatible:
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items:
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- enum:
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- samsung,s5pv210-secss # for S5PV210
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- samsung,exynos4210-secss # for Exynos4210, Exynos4212,
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# Exynos4412, Exynos5250,
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# Exynos5260 and Exynos5420
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: secss
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interrupts:
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description: One feed control interrupt.
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maxItems: 1
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required:
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- compatible
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- reg
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- clock-names
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- clocks
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- interrupts
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additionalProperties: false
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@@ -1,16 +0,0 @@
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* STMicroelectronics STM32 CRC
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Required properties:
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- compatible: Should be "st,stm32f7-crc".
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- reg: The address and length of the peripheral registers space
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- clocks: The input clock of the CRC instance
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Optional properties: none
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Example:
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crc: crc@40023000 {
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compatible = "st,stm32f7-crc";
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reg = <0x40023000 0x400>;
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clocks = <&rcc 0 12>;
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};
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38
Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml
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38
Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml
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@@ -0,0 +1,38 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/st,stm32-crc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 CRC bindings
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maintainers:
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- Lionel Debieve <lionel.debieve@st.com>
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properties:
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compatible:
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const: st,stm32f7-crc
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/stm32mp1-clks.h>
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crc@40023000 {
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compatible = "st,stm32f7-crc";
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reg = <0x40023000 0x400>;
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clocks = <&rcc 0 12>;
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};
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...
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@@ -1,19 +0,0 @@
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* STMicroelectronics STM32 CRYP
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Required properties:
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- compatible: Should be "st,stm32f756-cryp".
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- reg: The address and length of the peripheral registers space
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- clocks: The input clock of the CRYP instance
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- interrupts: The CRYP interrupt
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Optional properties:
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- resets: The input reset of the CRYP instance
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Example:
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crypto@50060000 {
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compatible = "st,stm32f756-cryp";
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reg = <0x50060000 0x400>;
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interrupts = <79>;
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clocks = <&rcc 0 STM32F7_AHB2_CLOCK(CRYP)>;
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resets = <&rcc STM32F7_AHB2_RESET(CRYP)>;
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};
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51
Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml
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51
Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml
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@@ -0,0 +1,51 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/st,stm32-cryp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 CRYP bindings
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maintainers:
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- Lionel Debieve <lionel.debieve@st.com>
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properties:
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compatible:
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enum:
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- st,stm32f756-cryp
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- st,stm32mp1-cryp
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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#include <dt-bindings/reset/stm32mp1-resets.h>
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cryp@54001000 {
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compatible = "st,stm32mp1-cryp";
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reg = <0x54001000 0x400>;
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CRYP1>;
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resets = <&rcc CRYP1_R>;
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};
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...
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@@ -1,30 +0,0 @@
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* STMicroelectronics STM32 HASH
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Required properties:
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- compatible: Should contain entries for this and backward compatible
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HASH versions:
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- "st,stm32f456-hash" for stm32 F456.
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- "st,stm32f756-hash" for stm32 F756.
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- reg: The address and length of the peripheral registers space
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- interrupts: the interrupt specifier for the HASH
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- clocks: The input clock of the HASH instance
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Optional properties:
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- resets: The input reset of the HASH instance
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- dmas: DMA specifiers for the HASH. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: DMA request name. Should be "in" if a dma is present.
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- dma-maxburst: Set number of maximum dma burst supported
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Example:
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hash1: hash@50060400 {
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compatible = "st,stm32f756-hash";
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reg = <0x50060400 0x400>;
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interrupts = <80>;
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clocks = <&rcc 0 STM32F7_AHB2_CLOCK(HASH)>;
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resets = <&rcc STM32F7_AHB2_RESET(HASH)>;
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dmas = <&dma2 7 2 0x400 0x0>;
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dma-names = "in";
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dma-maxburst = <0>;
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};
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69
Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml
Normal file
69
Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml
Normal file
@@ -0,0 +1,69 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 HASH bindings
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maintainers:
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- Lionel Debieve <lionel.debieve@st.com>
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properties:
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compatible:
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enum:
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- st,stm32f456-hash
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- st,stm32f756-hash
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 1
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resets:
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maxItems: 1
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dmas:
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maxItems: 1
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dma-names:
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items:
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- const: in
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dma-maxburst:
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description: Set number of maximum dma burst supported
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32
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- minimum: 0
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- maximum: 2
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- default: 0
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required:
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- compatible
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- reg
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- clocks
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- interrupts
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additionalProperties: false
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|
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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#include <dt-bindings/reset/stm32mp1-resets.h>
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hash@54002000 {
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compatible = "st,stm32f756-hash";
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reg = <0x54002000 0x400>;
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc HASH1>;
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resets = <&rcc HASH1_R>;
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dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>;
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dma-names = "in";
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dma-maxburst = <2>;
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};
|
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|
||||
...
|
||||
Reference in New Issue
Block a user