drm/amd/display: Enforce DPCD Address ranges

[WHY]
Some DPCD addresses, notably LTTPR Capability registers, are expected to
be read all together in a single DPCD transaction. Rather than force callers to
read registers they don't need, we want to quietly extend the addresses
read, and only return back the values the caller asked for.
This does not affect DPCD writes.

[HOW]
Create an additional layer above AUX to perform 'checked' DPCD
transactions.
Iterate through an array of DPCD address ranges that are marked as being
contiguous. If a requested read falls within one of those ranges, extend
the read to include the entire range.
After DPCD has been queried, copy the requested bytes into the caller's
data buffer, and deallocate all resources used.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wesley Chalmers
2021-04-01 12:23:06 -04:00
committed by Alex Deucher
parent 788797c793
commit 30adeee52d
11 changed files with 162 additions and 45 deletions

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@@ -0,0 +1,18 @@
#ifndef __LINK_DPCD_H__
#define __LINK_DPCD_H__
#include <inc/core_status.h>
#include <dc_link.h>
#include <inc/link_hwss.h>
enum dc_status core_link_read_dpcd(
struct dc_link *link,
uint32_t address,
uint8_t *data,
uint32_t size);
enum dc_status core_link_write_dpcd(
struct dc_link *link,
uint32_t address,
const uint8_t *data,
uint32_t size);
#endif

View File

@@ -26,20 +26,6 @@
#ifndef __DC_LINK_HWSS_H__
#define __DC_LINK_HWSS_H__
#include "inc/core_status.h"
enum dc_status core_link_read_dpcd(
struct dc_link *link,
uint32_t address,
uint8_t *data,
uint32_t size);
enum dc_status core_link_write_dpcd(
struct dc_link *link,
uint32_t address,
const uint8_t *data,
uint32_t size);
struct gpio *get_hpd_gpio(struct dc_bios *dcb,
struct graphics_object_id link_id,
struct gpio_service *gpio_service);