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drm/amdgpu: Add new PF2VF flags for VF register access method

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Add 3 sub flags to notify guest for indirect reg access of
gc, mmhub and ih

The host sets these flags depending on L1 RAP version,
asic and other scenarios. These flags ensure that
there is compatibility between different guest/host/vbios versions.

Signed-off-by: Rohit Khaire <rohit.khaire@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rohit Khaire
2021-03-29 15:40:13 -04:00
committed by Alex Deucher
parent 1c0f04303b
commit 4d675e1eb8
2 changed files with 26 additions and 2 deletions
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11
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
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@@ -104,6 +104,17 @@ enum AMDGIM_FEATURE_FLAG {
AMDGIM_FEATURE_GIM_MM_BW_MGR = 0x8,
/* PP ONE VF MODE in GIM */
AMDGIM_FEATURE_PP_ONE_VF = (1 << 4),
/* Indirect Reg Access enabled */
AMDGIM_FEATURE_INDIRECT_REG_ACCESS = (1 << 5),
};
enum AMDGIM_REG_ACCESS_FLAG {
/* Use PSP to program IH_RB_CNTL */
AMDGIM_FEATURE_IH_REG_PSP_EN = (1 << 0),
/* Use RLC to program MMHUB regs */
AMDGIM_FEATURE_RLC_MMHUB_EN = (1 << 1),
/* Use RLC to program GC regs */
AMDGIM_FEATURE_RLC_GC_EN = (1 << 2),
};
struct amdgim_pf2vf_info_v1 {