Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM driver updates from Olof Johansson:
 "Updates of SoC-near drivers and other driver updates that makes more
  sense to take through our tree.  In this case it's involved:

   - Some Davinci driver updates that has required corresponding
     platform code changes (gpio mostly)
   - CCI bindings and a few driver updates
   - Marvell mvebu patches for PCI MSI support (could have gone through
     the PCI tree for this release, but they were acked by Bjorn for
     3.12 so we kept them through arm-soc).
   - Marvell dove switch-over to DT-based PCIe configuration
   - Misc updates for Samsung platform dmaengine drivers"

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (32 commits)
  ARM: S3C24XX: add dma pdata for s3c2410, s3c2440 and s3c2442
  dmaengine: s3c24xx-dma: add support for the s3c2410 type of controller
  ARM: S3C24XX: Fix possible dma selection warning
  PCI: mvebu: make local functions static
  PCI: mvebu: add I/O access wrappers
  PCI: mvebu: Dynamically detect if the PEX link is up to enable hot plug
  ARM: mvebu: fix gated clock documentation
  ARM: dove: remove legacy pcie and clock init
  ARM: dove: switch to DT probed mbus address windows
  ARM: SAMSUNG: set s3c24xx_dma_filter for s3c64xx-spi0 device
  ARM: S3C24XX: add platform-devices for new dma driver for s3c2412 and s3c2443
  dmaengine: add driver for Samsung s3c24xx SoCs
  ARM: S3C24XX: number the dma clocks
  PCI: mvebu: add support for Marvell Dove SoCs
  PCI: mvebu: add support for reset on GPIO
  PCI: mvebu: remove subsys_initcall
  PCI: mvebu: increment nports only for registered ports
  PCI: mvebu: move clock enable before register access
  PCI: mvebu: add support for MSI
  irqchip: armada-370-xp: implement MSI support
  ...
This commit is contained in:
Linus Torvalds
2013-11-11 17:05:37 +09:00
50 changed files with 3088 additions and 440 deletions

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/*
* S3C24XX DMA handling
*
* Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or (at your option)
* any later version.
*/
/* Helper to encode the source selection constraints for early s3c socs. */
#define S3C24XX_DMA_CHANREQ(src, chan) ((BIT(3) | src) << chan * 4)
enum s3c24xx_dma_bus {
S3C24XX_DMA_APB,
S3C24XX_DMA_AHB,
};
/**
* @bus: on which bus does the peripheral reside - AHB or APB.
* @handshake: is a handshake with the peripheral necessary
* @chansel: channel selection information, depending on variant; reqsel for
* s3c2443 and later and channel-selection map for earlier SoCs
* see CHANSEL doc in s3c2443-dma.c
*/
struct s3c24xx_dma_channel {
enum s3c24xx_dma_bus bus;
bool handshake;
u16 chansel;
};
/**
* struct s3c24xx_dma_platdata - platform specific settings
* @num_phy_channels: number of physical channels
* @channels: array of virtual channel descriptions
* @num_channels: number of virtual channels
*/
struct s3c24xx_dma_platdata {
int num_phy_channels;
struct s3c24xx_dma_channel *channels;
int num_channels;
};
struct dma_chan;
bool s3c24xx_dma_filter(struct dma_chan *chan, void *param);

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/*
* DaVinci GPIO Platform Related Defines
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __DAVINCI_GPIO_PLATFORM_H
#define __DAVINCI_GPIO_PLATFORM_H
#include <linux/io.h>
#include <linux/spinlock.h>
#include <asm-generic/gpio.h>
enum davinci_gpio_type {
GPIO_TYPE_TNETV107X = 0,
};
struct davinci_gpio_platform_data {
u32 ngpio;
u32 gpio_unbanked;
u32 intc_irq_num;
};
struct davinci_gpio_controller {
struct gpio_chip chip;
int irq_base;
/* Serialize access to GPIO registers */
spinlock_t lock;
void __iomem *regs;
void __iomem *set_data;
void __iomem *clr_data;
void __iomem *in_data;
int gpio_unbanked;
unsigned gpio_irq;
};
/*
* basic gpio routines
*/
#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
/* Convert GPIO signal to GPIO pin number */
#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
static inline u32 __gpio_mask(unsigned gpio)
{
return 1 << (gpio % 32);
}
#endif