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drm/amdgpu: Added ISR for CP ECC/EDC interrupt v2.

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ISR will DRM_ERROR ECC error message.

v2:
Remove CZ only limitation.
Rebase.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
David Panariti
2018-05-15 11:45:11 -04:00
committed by Alex Deucher
parent 8f4039fefd
commit 5a2f291343
2 changed files with 76 additions and 0 deletions
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drivers/gpu/drm/amd/amdgpu/amdgpu.h
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@@ -968,6 +968,7 @@ struct amdgpu_gfx {
struct amdgpu_irq_src eop_irq;
struct amdgpu_irq_src priv_reg_irq;
struct amdgpu_irq_src priv_inst_irq;
struct amdgpu_irq_src cp_ecc_error_irq;
/* gfx status */
uint32_t gfx_current_status;
/* ce ram size*/