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drm/amdgpu: indirect register access for nv12 sriov
using the control bits got from host to control registers access. Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: Emily.Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher
parent
77eabc6f59
commit
5d23851029
@@ -466,6 +466,8 @@ static int amdgpu_virt_read_pf2vf_data(struct amdgpu_device *adev)
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((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->vf2pf_update_interval_ms;
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adev->virt.gim_feature =
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((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->feature_flags.all;
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adev->virt.reg_access =
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((struct amd_sriov_msg_pf2vf_info *)pf2vf_info)->reg_access_flags.all;
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break;
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default:
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