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drm/i915: preparation for using PAT index
This patch is a preparation for replacing enum i915_cache_level with PAT
index. Caching policy for buffer objects is set through the PAT index in
PTE, the old i915_cache_level is not sufficient to represent all caching
modes supported by the hardware.
Preparing the transition by adding some platform dependent data structures
and helper functions to translate the cache_level to pat_index.
cachelevel_to_pat: a platform dependent array mapping cache_level to
pat_index.
max_pat_index: the maximum PAT index recommended in hardware specification
Needed for validating the PAT index passed in from user
space.
i915_gem_get_pat_index: function to convert cache_level to PAT index.
obj_to_i915(obj): macro moved to header file for wider usage.
I915_MAX_CACHE_LEVEL: upper bound of i915_cache_level for the
convenience of coding.
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Fei Yang <fei.yang@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230509165200.1740-2-fei.yang@intel.com
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@@ -45,6 +45,15 @@ static struct kmem_cache *slab_objects;
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static const struct drm_gem_object_funcs i915_gem_object_funcs;
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unsigned int i915_gem_get_pat_index(struct drm_i915_private *i915,
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enum i915_cache_level level)
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{
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if (drm_WARN_ON(&i915->drm, level >= I915_MAX_CACHE_LEVEL))
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return 0;
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return INTEL_INFO(i915)->cachelevel_to_pat[level];
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}
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struct drm_i915_gem_object *i915_gem_object_alloc(void)
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{
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struct drm_i915_gem_object *obj;
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