mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-23 05:56:14 -04:00
drm/amdgpu: parse base address from new ip discovery with 64bit ip base address
Truncate the 64bit base address from ip discovery and only store lower 32bit ip base in reg_offset[]. Bits > 32 follows ASIC specific format, thus just discard them and handle it within specific ASIC. By this way reg_offset[] and related helpers can stay unchanged. v2: make comments more generic Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -532,7 +532,10 @@ static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev,
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}
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}
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next_ip:
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ip_offset += struct_size(ip, base_address, ip->num_base_address);
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if (ihdr->base_addr_64_bit)
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ip_offset += struct_size(ip, base_address_64, ip->num_base_address);
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else
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ip_offset += struct_size(ip, base_address, ip->num_base_address);
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}
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}
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}
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@@ -838,7 +841,8 @@ static void ip_disc_release(struct kobject *kobj)
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static int amdgpu_discovery_sysfs_ips(struct amdgpu_device *adev,
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struct ip_die_entry *ip_die_entry,
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const size_t _ip_offset, const int num_ips)
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const size_t _ip_offset, const int num_ips,
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bool reg_base_64)
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{
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int ii, jj, kk, res;
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@@ -910,15 +914,25 @@ static int amdgpu_discovery_sysfs_ips(struct amdgpu_device *adev,
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ip_hw_instance->harvest = ip->variant;
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ip_hw_instance->num_base_addresses = ip->num_base_address;
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for (kk = 0; kk < ip_hw_instance->num_base_addresses; kk++)
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ip_hw_instance->base_addr[kk] = ip->base_address[kk];
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for (kk = 0; kk < ip_hw_instance->num_base_addresses; kk++) {
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if (reg_base_64)
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ip_hw_instance->base_addr[kk] =
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lower_32_bits(le64_to_cpu(ip->base_address_64[kk])) & 0x3FFFFFFF;
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else
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ip_hw_instance->base_addr[kk] = ip->base_address[kk];
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}
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kobject_init(&ip_hw_instance->kobj, &ip_hw_instance_ktype);
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ip_hw_instance->kobj.kset = &ip_hw_id->hw_id_kset;
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res = kobject_add(&ip_hw_instance->kobj, NULL,
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"%d", ip_hw_instance->num_instance);
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next_ip:
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ip_offset += struct_size(ip, base_address, ip->num_base_address);
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if (reg_base_64)
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ip_offset += struct_size(ip, base_address_64,
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ip->num_base_address);
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else
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ip_offset += struct_size(ip, base_address,
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ip->num_base_address);
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}
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}
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@@ -972,7 +986,7 @@ static int amdgpu_discovery_sysfs_recurse(struct amdgpu_device *adev)
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return res;
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}
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amdgpu_discovery_sysfs_ips(adev, ip_die_entry, ip_offset, num_ips);
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amdgpu_discovery_sysfs_ips(adev, ip_die_entry, ip_offset, num_ips, !!ihdr->base_addr_64_bit);
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}
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return 0;
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@@ -1174,12 +1188,26 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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* convert the endianness of base addresses in place,
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* so that we don't need to convert them when accessing adev->reg_offset.
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*/
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ip->base_address[k] = le32_to_cpu(ip->base_address[k]);
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if (ihdr->base_addr_64_bit)
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/* Truncate the 64bit base address from ip discovery
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* and only store lower 32bit ip base in reg_offset[].
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* Bits > 32 follows ASIC specific format, thus just
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* discard them and handle it within specific ASIC.
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* By this way reg_offset[] and related helpers can
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* stay unchanged.
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* The base address is in dwords, thus clear the
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* highest 2 bits to store.
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*/
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ip->base_address[k] =
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lower_32_bits(le64_to_cpu(ip->base_address_64[k])) & 0x3FFFFFFF;
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else
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ip->base_address[k] = le32_to_cpu(ip->base_address[k]);
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DRM_DEBUG("\t0x%08x\n", ip->base_address[k]);
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}
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for (hw_ip = 0; hw_ip < MAX_HWIP; hw_ip++) {
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if (hw_id_map[hw_ip] == le16_to_cpu(ip->hw_id)) {
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if (hw_id_map[hw_ip] == le16_to_cpu(ip->hw_id) &&
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hw_id_map[hw_ip] != 0) {
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DRM_DEBUG("set register base offset for %s\n",
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hw_id_names[le16_to_cpu(ip->hw_id)]);
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adev->reg_offset[hw_ip][ip->instance_number] =
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@@ -1199,7 +1227,10 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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}
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next_ip:
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ip_offset += struct_size(ip, base_address, ip->num_base_address);
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if (ihdr->base_addr_64_bit)
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ip_offset += struct_size(ip, base_address_64, ip->num_base_address);
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else
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ip_offset += struct_size(ip, base_address, ip->num_base_address);
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}
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}
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