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drm/amdkfd: Move TLB flushing logic into amdgpu

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This will make it possible for amdgpu GEM ioctls to flush TLBs on compute
VMs.

This removes VMID-based TLB flushing and always uses PASID-based
flushing. This still works because it scans the VMID-PASID mapping
registers to find the right VMID. It's only slightly less efficient. This
is not a production use case.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Felix Kuehling
2023-02-24 18:22:32 -05:00
committed by Alex Deucher
parent e6ed364efa
commit 94e2dae0a8
6 changed files with 57 additions and 67 deletions
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44
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
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@@ -1437,6 +1437,50 @@ int amdgpu_vm_handle_moved(struct amdgpu_device *adev,
return 0;
}
/**
* amdgpu_vm_flush_compute_tlb - Flush TLB on compute VM
*
* @adev: amdgpu_device pointer
* @vm: requested vm
* @flush_type: flush type
*
* Flush TLB if needed for a compute VM.
*
* Returns:
* 0 for success.
*/
int amdgpu_vm_flush_compute_tlb(struct amdgpu_device *adev,
struct amdgpu_vm *vm,
uint32_t flush_type,
uint32_t xcc_mask)
{
uint64_t tlb_seq = amdgpu_vm_tlb_seq(vm);
bool all_hub = false;
int xcc = 0, r = 0;
WARN_ON_ONCE(!vm->is_compute_context);
/*
* It can be that we race and lose here, but that is extremely unlikely
* and the worst thing which could happen is that we flush the changes
* into the TLB once more which is harmless.
*/
if (atomic64_xchg(&vm->kfd_last_flushed_seq, tlb_seq) == tlb_seq)
return 0;
if (adev->family == AMDGPU_FAMILY_AI ||
adev->family == AMDGPU_FAMILY_RV)
all_hub = true;
for_each_inst(xcc, xcc_mask) {
r = amdgpu_gmc_flush_gpu_tlb_pasid(adev, vm->pasid, flush_type,
all_hub, xcc);
if (r)
break;
}
return r;
}
/**
* amdgpu_vm_bo_add - add a bo to a specific vm
*