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drm/amdgpu: Follow up change to previous drm scheduler change.
Align refcount behaviour for amdgpu_job embedded HW fence with classic pointer style HW fences by increasing refcount each time emit is called so amdgpu code doesn't need to make workarounds using amdgpu_job.job_run_counter to keep the HW fence refcount balanced. Also since in the previous patch we resumed setting s_fence->parent to NULL in drm_sched_stop switch to directly checking if job->hw_fence is signaled to short circuit reset if already signed. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Tested-by: Yiqing Yao <yiqing.yao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
45ecaea738
commit
9ae55f030d
@@ -164,11 +164,16 @@ int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **f, struct amd
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if (job && job->job_run_counter) {
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/* reinit seq for resubmitted jobs */
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fence->seqno = seq;
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/* TO be inline with external fence creation and other drivers */
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dma_fence_get(fence);
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} else {
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if (job)
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if (job) {
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dma_fence_init(fence, &amdgpu_job_fence_ops,
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&ring->fence_drv.lock,
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adev->fence_context + ring->idx, seq);
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/* Against remove in amdgpu_job_{free, free_cb} */
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dma_fence_get(fence);
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}
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else
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dma_fence_init(fence, &amdgpu_fence_ops,
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&ring->fence_drv.lock,
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