drm/amd/display: OPP refactor and consolidation for DCE.

Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Zeyu Fan
2016-12-14 18:54:41 -05:00
committed by Alex Deucher
parent e63d86dc9b
commit ab3ee7a556
26 changed files with 1547 additions and 3960 deletions

View File

@@ -3,8 +3,8 @@
# It provides the control and status of HW CRTC block.
DCE110 = dce110_ipp.o dce110_ipp_cursor.o \
dce110_ipp_gamma.o dce110_opp.o dce110_opp_csc.o \
dce110_timing_generator.o dce110_opp_formatter.o dce110_opp_regamma.o \
dce110_ipp_gamma.o \
dce110_timing_generator.o \
dce110_compressor.o dce110_mem_input.o dce110_hw_sequencer.o \
dce110_resource.o \
dce110_opp_regamma_v.o dce110_opp_csc_v.o dce110_timing_generator_v.o \