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drm/i915: capture aux page table error register
TGL introduced a feature in which we map the main surface to the auxiliary surface. If we screw up the page tables, the HW has a register to tell us which engine encounters a fault in the page table walk. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> [ickle: Be brave and apply to gen12] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20191025121718.18806-1-lionel.g.landwerlin@intel.com
This commit is contained in:
committed by
Chris Wilson
parent
dd5279c714
commit
ba1d18e386
@@ -734,6 +734,9 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
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if (IS_GEN_RANGE(m->i915, 8, 11))
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err_printf(m, "GTT_CACHE_EN: 0x%08x\n", error->gtt_cache);
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if (IS_GEN(m->i915, 12))
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err_printf(m, "AUX_ERR_DBG: 0x%08x\n", error->aux_err);
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for (ee = error->engine; ee; ee = ee->next)
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error_print_engine(m, ee, error->capture);
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@@ -1554,6 +1557,9 @@ static void capture_reg_state(struct i915_gpu_state *error)
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if (IS_GEN_RANGE(i915, 8, 11))
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error->gtt_cache = intel_uncore_read(uncore, HSW_GTT_CACHE_EN);
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if (IS_GEN(i915, 12))
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error->aux_err = intel_uncore_read(uncore, GEN12_AUX_ERR_DBG);
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/* 4: Everything else */
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if (INTEL_GEN(i915) >= 11) {
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error->ier = intel_uncore_read(uncore, GEN8_DE_MISC_IER);
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