drm/amdgpu: Modify sdma block to fit for the unified ras block data and ops

1.Modify sdma block to fit for the unified ras block data and ops.
2.Change amdgpu_sdma_ras_funcs to amdgpu_sdma_ras, and the corresponding variable name remove _funcs suffix.
3.Remove the const flag of sdma ras variable so that sdma ras block can be able to be inserted into amdgpu device ras block link list.
4.Invoke amdgpu_ras_register_ras_block function to register sdma ras block into amdgpu device ras block link list.
5.Remove the redundant code about sdma in amdgpu_ras.c after using the unified ras block.
6.Fill unified ras block .name .block .ras_late_init and .ras_fini for all of sdma versions. If .ras_late_init and .ras_fini had been defined by the selected sdma version, the defined functions will take effect; if not defined, default fill them with amdgpu_sdma_ras_late_init and amdgpu_sdma_ras_fini.

v2: squash in warning fix (Alex)

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
yipechai
2022-01-05 15:30:37 +08:00
committed by Alex Deucher
parent efe17d5a21
commit bdc4292bd3
5 changed files with 71 additions and 36 deletions

View File

@@ -188,7 +188,7 @@ static void sdma_v4_4_get_ras_error_count(struct amdgpu_device *adev,
}
}
static int sdma_v4_4_query_ras_error_count(struct amdgpu_device *adev,
static int sdma_v4_4_query_ras_error_count_by_instance(struct amdgpu_device *adev,
uint32_t instance,
void *ras_error_status)
{
@@ -245,9 +245,26 @@ static void sdma_v4_4_reset_ras_error_count(struct amdgpu_device *adev)
}
}
const struct amdgpu_sdma_ras_funcs sdma_v4_4_ras_funcs = {
.ras_late_init = amdgpu_sdma_ras_late_init,
.ras_fini = amdgpu_sdma_ras_fini,
static void sdma_v4_4_query_ras_error_count(struct amdgpu_device *adev, void *ras_error_status)
{
int i = 0;
for (i = 0; i < adev->sdma.num_instances; i++) {
if (sdma_v4_4_query_ras_error_count_by_instance(adev, i, ras_error_status))
{
dev_err(adev->dev, "Query ras error count failed in SDMA%d \n", i);
return;
}
}
}
const struct amdgpu_ras_block_hw_ops sdma_v4_4_ras_hw_ops = {
.query_ras_error_count = sdma_v4_4_query_ras_error_count,
.reset_ras_error_count = sdma_v4_4_reset_ras_error_count,
};
struct amdgpu_sdma_ras sdma_v4_4_ras = {
.ras_block = {
.hw_ops = &sdma_v4_4_ras_hw_ops,
},
};