drm/amd/display: fix dcn pipe reset sequence

This change fixes dcn10 front end reset sequence. Previously we
would reset front end during flip which led to issues
in certain MPO and 4k/5k scenarios. We would also never properly
power gate our front end.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin
2017-06-14 18:58:04 -04:00
committed by Alex Deucher
parent 7f524a0d83
commit cfe4645e17
13 changed files with 158 additions and 178 deletions

View File

@@ -2380,7 +2380,7 @@ static void amdgpu_dm_do_flip(
surface_updates->flip_addr = &addr;
dc_update_surfaces_for_stream(adev->dm.dc, surface_updates, 1, acrtc->stream);
dc_update_surfaces_and_stream(adev->dm.dc, surface_updates, 1, acrtc->stream, NULL);
DRM_DEBUG_DRIVER("%s Flipping to hi: 0x%x, low: 0x%x \n",
__func__,