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drm/amdgpu/mes: add multi-xcc support

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a. extend mes pipe instances to num_xcc * max_mes_pipe
b. initialize mes schq/kiq pipes per xcc
c. submit mes packet to mes ring according to xcc_id

v2: rebase (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jack Xiao
2024-11-21 16:22:38 +08:00
committed by Alex Deucher
parent 2718942f48
commit d09c7e266c
13 changed files with 158 additions and 108 deletions
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2
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
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@@ -813,7 +813,7 @@ void amdgpu_gmc_fw_reg_write_reg_wait(struct amdgpu_device *adev,
if (adev->mes.ring[0].sched.ready) {
amdgpu_mes_reg_write_reg_wait(adev, reg0, reg1,
ref, mask);
ref, mask, xcc_inst);
return;
}