dpll: netlink/core: add support for pin-dpll signal phase offset/adjust

Add callback ops for pin-dpll phase measurement.
Add callback for pin signal phase adjustment.
Add min and max phase adjustment values to pin proprties.
Invoke callbacks in dpll_netlink.c when filling the pin details to
provide user with phase related attribute values.

Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Arkadiusz Kubalewski
2023-10-11 12:12:34 +02:00
committed by David S. Miller
parent c3c6ab95c3
commit d7fbc0b7e8
2 changed files with 155 additions and 1 deletions

View File

@@ -68,6 +68,18 @@ struct dpll_pin_ops {
int (*prio_set)(const struct dpll_pin *pin, void *pin_priv,
const struct dpll_device *dpll, void *dpll_priv,
const u32 prio, struct netlink_ext_ack *extack);
int (*phase_offset_get)(const struct dpll_pin *pin, void *pin_priv,
const struct dpll_device *dpll, void *dpll_priv,
s64 *phase_offset,
struct netlink_ext_ack *extack);
int (*phase_adjust_get)(const struct dpll_pin *pin, void *pin_priv,
const struct dpll_device *dpll, void *dpll_priv,
s32 *phase_adjust,
struct netlink_ext_ack *extack);
int (*phase_adjust_set)(const struct dpll_pin *pin, void *pin_priv,
const struct dpll_device *dpll, void *dpll_priv,
const s32 phase_adjust,
struct netlink_ext_ack *extack);
};
struct dpll_pin_frequency {
@@ -91,6 +103,11 @@ struct dpll_pin_frequency {
#define DPLL_PIN_FREQUENCY_DCF77 \
DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_77_5_KHZ)
struct dpll_pin_phase_adjust_range {
s32 min;
s32 max;
};
struct dpll_pin_properties {
const char *board_label;
const char *panel_label;
@@ -99,6 +116,7 @@ struct dpll_pin_properties {
unsigned long capabilities;
u32 freq_supported_num;
struct dpll_pin_frequency *freq_supported;
struct dpll_pin_phase_adjust_range phase_range;
};
#if IS_ENABLED(CONFIG_DPLL)