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drm/amdgpu: Stop clearing kiq position during fini

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Do not clear kiq position in RLC_CP_SCHEDULER so that CP could perform
IDLE-SAVE after VF fini.
Otherwise it could cause GFX hang if another Win guest is rendering.

Signed-off-by: leiyaoyao <yaoyao.lei@amd.com>
Acked-by: ZhenGuo Yin <zhenguo.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
leiyaoyao
2023-02-27 13:24:03 +08:00
committed by Alex Deucher
parent c0d5c293ce
commit db1c1a8f0a
1 changed files with 3 additions and 11 deletions
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14
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
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@@ -7285,17 +7285,9 @@ static int gfx_v10_0_hw_fini(void *handle)
if (amdgpu_sriov_vf(adev)) {
gfx_v10_0_cp_gfx_enable(adev, false);
/* Program KIQ position of RLC_CP_SCHEDULERS during destroy */
if (adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 3, 0)) {
tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid);
tmp &= 0xffffff00;
WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS_Sienna_Cichlid, tmp);
} else {
tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);
tmp &= 0xffffff00;
WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
}
/* Remove the steps of clearing KIQ position.
* It causes GFX hang when another Win guest is rendering.
*/
return 0;
}
gfx_v10_0_cp_enable(adev, false);