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https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
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KVM: selftests: Introduce hyperv_features test
The initial implementation of the test only tests that access to Hyper-V MSRs and hypercalls is in compliance with guest visible CPUID feature bits. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210521095204.2161214-31-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Vitaly Kuznetsov
committed by
Paolo Bonzini
Paolo Bonzini
parent
d504df3c91
commit
e2e1cc1fbe
649
tools/testing/selftests/kvm/x86_64/hyperv_features.c
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649
tools/testing/selftests/kvm/x86_64/hyperv_features.c
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@@ -0,0 +1,649 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2021, Red Hat, Inc.
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*
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* Tests for Hyper-V features enablement
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*/
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#include <asm/kvm_para.h>
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#include <linux/kvm_para.h>
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#include <stdint.h>
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#include "test_util.h"
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#include "kvm_util.h"
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#include "processor.h"
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#include "hyperv.h"
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#define VCPU_ID 0
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#define LINUX_OS_ID ((u64)0x8100 << 48)
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extern unsigned char rdmsr_start;
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extern unsigned char rdmsr_end;
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static u64 do_rdmsr(u32 idx)
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{
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u32 lo, hi;
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asm volatile("rdmsr_start: rdmsr;"
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"rdmsr_end:"
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: "=a"(lo), "=c"(hi)
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: "c"(idx));
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return (((u64) hi) << 32) | lo;
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}
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extern unsigned char wrmsr_start;
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extern unsigned char wrmsr_end;
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static void do_wrmsr(u32 idx, u64 val)
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{
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u32 lo, hi;
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lo = val;
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hi = val >> 32;
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asm volatile("wrmsr_start: wrmsr;"
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"wrmsr_end:"
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: : "a"(lo), "c"(idx), "d"(hi));
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}
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static int nr_gp;
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static inline u64 hypercall(u64 control, vm_vaddr_t input_address,
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vm_vaddr_t output_address)
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{
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u64 hv_status;
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asm volatile("mov %3, %%r8\n"
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"vmcall"
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: "=a" (hv_status),
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"+c" (control), "+d" (input_address)
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: "r" (output_address)
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: "cc", "memory", "r8", "r9", "r10", "r11");
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return hv_status;
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}
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static void guest_gp_handler(struct ex_regs *regs)
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{
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unsigned char *rip = (unsigned char *)regs->rip;
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bool r, w;
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r = rip == &rdmsr_start;
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w = rip == &wrmsr_start;
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GUEST_ASSERT(r || w);
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nr_gp++;
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if (r)
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regs->rip = (uint64_t)&rdmsr_end;
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else
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regs->rip = (uint64_t)&wrmsr_end;
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}
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struct msr_data {
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uint32_t idx;
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bool available;
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bool write;
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u64 write_val;
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};
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struct hcall_data {
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uint64_t control;
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uint64_t expect;
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};
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static void guest_msr(struct msr_data *msr)
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{
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int i = 0;
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while (msr->idx) {
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WRITE_ONCE(nr_gp, 0);
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if (!msr->write)
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do_rdmsr(msr->idx);
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else
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do_wrmsr(msr->idx, msr->write_val);
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if (msr->available)
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GUEST_ASSERT(READ_ONCE(nr_gp) == 0);
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else
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GUEST_ASSERT(READ_ONCE(nr_gp) == 1);
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GUEST_SYNC(i++);
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}
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GUEST_DONE();
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}
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static void guest_hcall(vm_vaddr_t pgs_gpa, struct hcall_data *hcall)
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{
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int i = 0;
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wrmsr(HV_X64_MSR_GUEST_OS_ID, LINUX_OS_ID);
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wrmsr(HV_X64_MSR_HYPERCALL, pgs_gpa);
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while (hcall->control) {
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GUEST_ASSERT(hypercall(hcall->control, pgs_gpa,
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pgs_gpa + 4096) == hcall->expect);
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GUEST_SYNC(i++);
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}
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GUEST_DONE();
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}
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static void hv_set_cpuid(struct kvm_vm *vm, struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 *feat,
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struct kvm_cpuid_entry2 *recomm,
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struct kvm_cpuid_entry2 *dbg)
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{
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TEST_ASSERT(set_cpuid(cpuid, feat),
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"failed to set KVM_CPUID_FEATURES leaf");
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TEST_ASSERT(set_cpuid(cpuid, recomm),
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"failed to set HYPERV_CPUID_ENLIGHTMENT_INFO leaf");
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TEST_ASSERT(set_cpuid(cpuid, dbg),
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"failed to set HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES leaf");
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vcpu_set_cpuid(vm, VCPU_ID, cpuid);
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}
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static void guest_test_msrs_access(struct kvm_vm *vm, struct msr_data *msr,
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struct kvm_cpuid2 *best)
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{
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struct kvm_run *run;
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struct ucall uc;
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int stage = 0, r;
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struct kvm_cpuid_entry2 feat = {
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.function = HYPERV_CPUID_FEATURES
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};
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struct kvm_cpuid_entry2 recomm = {
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.function = HYPERV_CPUID_ENLIGHTMENT_INFO
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};
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struct kvm_cpuid_entry2 dbg = {
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.function = HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES
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};
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struct kvm_enable_cap cap = {0};
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run = vcpu_state(vm, VCPU_ID);
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while (true) {
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switch (stage) {
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case 0:
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/*
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* Only available when Hyper-V identification is set
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*/
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msr->idx = HV_X64_MSR_GUEST_OS_ID;
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msr->write = 0;
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msr->available = 0;
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break;
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case 1:
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msr->idx = HV_X64_MSR_HYPERCALL;
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msr->write = 0;
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msr->available = 0;
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break;
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case 2:
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feat.eax |= HV_MSR_HYPERCALL_AVAILABLE;
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/*
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* HV_X64_MSR_GUEST_OS_ID has to be written first to make
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* HV_X64_MSR_HYPERCALL available.
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*/
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msr->idx = HV_X64_MSR_GUEST_OS_ID;
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msr->write = 1;
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msr->write_val = LINUX_OS_ID;
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msr->available = 1;
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break;
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case 3:
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msr->idx = HV_X64_MSR_GUEST_OS_ID;
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msr->write = 0;
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msr->available = 1;
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break;
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case 4:
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msr->idx = HV_X64_MSR_HYPERCALL;
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msr->write = 0;
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msr->available = 1;
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break;
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case 5:
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msr->idx = HV_X64_MSR_VP_RUNTIME;
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msr->write = 0;
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msr->available = 0;
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break;
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case 6:
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feat.eax |= HV_MSR_VP_RUNTIME_AVAILABLE;
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msr->write = 0;
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msr->available = 1;
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break;
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case 7:
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/* Read only */
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msr->write = 1;
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msr->write_val = 1;
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msr->available = 0;
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break;
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case 8:
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msr->idx = HV_X64_MSR_TIME_REF_COUNT;
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msr->write = 0;
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msr->available = 0;
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break;
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case 9:
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feat.eax |= HV_MSR_TIME_REF_COUNT_AVAILABLE;
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msr->write = 0;
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msr->available = 1;
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break;
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case 10:
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/* Read only */
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msr->write = 1;
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msr->write_val = 1;
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msr->available = 0;
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break;
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case 11:
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msr->idx = HV_X64_MSR_VP_INDEX;
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msr->write = 0;
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msr->available = 0;
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break;
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case 12:
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feat.eax |= HV_MSR_VP_INDEX_AVAILABLE;
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msr->write = 0;
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msr->available = 1;
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break;
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case 13:
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/* Read only */
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msr->write = 1;
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msr->write_val = 1;
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msr->available = 0;
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break;
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case 14:
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msr->idx = HV_X64_MSR_RESET;
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msr->write = 0;
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msr->available = 0;
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break;
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case 15:
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feat.eax |= HV_MSR_RESET_AVAILABLE;
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msr->write = 0;
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msr->available = 1;
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break;
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case 16:
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msr->write = 1;
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msr->write_val = 0;
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msr->available = 1;
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break;
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case 17:
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msr->idx = HV_X64_MSR_REFERENCE_TSC;
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msr->write = 0;
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msr->available = 0;
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break;
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case 18:
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feat.eax |= HV_MSR_REFERENCE_TSC_AVAILABLE;
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msr->write = 0;
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msr->available = 1;
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break;
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case 19:
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msr->write = 1;
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msr->write_val = 0;
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msr->available = 1;
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break;
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case 20:
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msr->idx = HV_X64_MSR_EOM;
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msr->write = 0;
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msr->available = 0;
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break;
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case 21:
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/*
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* Remains unavailable even with KVM_CAP_HYPERV_SYNIC2
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* capability enabled and guest visible CPUID bit unset.
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*/
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cap.cap = KVM_CAP_HYPERV_SYNIC2;
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vcpu_enable_cap(vm, VCPU_ID, &cap);
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break;
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case 22:
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feat.eax |= HV_MSR_SYNIC_AVAILABLE;
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msr->write = 0;
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msr->available = 1;
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break;
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case 23:
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msr->write = 1;
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msr->write_val = 0;
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msr->available = 1;
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break;
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case 24:
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msr->idx = HV_X64_MSR_STIMER0_CONFIG;
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msr->write = 0;
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msr->available = 0;
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break;
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case 25:
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feat.eax |= HV_MSR_SYNTIMER_AVAILABLE;
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msr->write = 0;
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msr->available = 1;
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break;
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case 26:
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msr->write = 1;
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msr->write_val = 0;
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msr->available = 1;
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break;
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case 27:
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/* Direct mode test */
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msr->write = 1;
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msr->write_val = 1 << 12;
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msr->available = 0;
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break;
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case 28:
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feat.edx |= HV_STIMER_DIRECT_MODE_AVAILABLE;
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msr->available = 1;
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break;
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case 29:
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msr->idx = HV_X64_MSR_EOI;
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msr->write = 0;
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msr->available = 0;
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break;
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case 30:
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feat.eax |= HV_MSR_APIC_ACCESS_AVAILABLE;
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msr->write = 1;
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msr->write_val = 1;
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msr->available = 1;
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break;
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case 31:
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msr->idx = HV_X64_MSR_TSC_FREQUENCY;
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msr->write = 0;
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msr->available = 0;
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break;
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case 32:
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feat.eax |= HV_ACCESS_FREQUENCY_MSRS;
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msr->write = 0;
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msr->available = 1;
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break;
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case 33:
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/* Read only */
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msr->write = 1;
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msr->write_val = 1;
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msr->available = 0;
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break;
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case 34:
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msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL;
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msr->write = 0;
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msr->available = 0;
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break;
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case 35:
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feat.eax |= HV_ACCESS_REENLIGHTENMENT;
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msr->write = 0;
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msr->available = 1;
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break;
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case 36:
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msr->write = 1;
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msr->write_val = 1;
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msr->available = 1;
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break;
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case 37:
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/* Can only write '0' */
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msr->idx = HV_X64_MSR_TSC_EMULATION_STATUS;
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msr->write = 1;
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msr->write_val = 1;
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msr->available = 0;
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break;
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case 38:
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msr->idx = HV_X64_MSR_CRASH_P0;
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msr->write = 0;
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msr->available = 0;
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break;
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case 39:
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feat.edx |= HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
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msr->write = 0;
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msr->available = 1;
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break;
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case 40:
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msr->write = 1;
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msr->write_val = 1;
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msr->available = 1;
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break;
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case 41:
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msr->idx = HV_X64_MSR_SYNDBG_STATUS;
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msr->write = 0;
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msr->available = 0;
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break;
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case 42:
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feat.edx |= HV_FEATURE_DEBUG_MSRS_AVAILABLE;
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dbg.eax |= HV_X64_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING;
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msr->write = 0;
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msr->available = 1;
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break;
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case 43:
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msr->write = 1;
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msr->write_val = 0;
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msr->available = 1;
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break;
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case 44:
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/* END */
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msr->idx = 0;
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break;
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}
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hv_set_cpuid(vm, best, &feat, &recomm, &dbg);
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if (msr->idx)
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pr_debug("Stage %d: testing msr: 0x%x for %s\n", stage,
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msr->idx, msr->write ? "write" : "read");
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else
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pr_debug("Stage %d: finish\n", stage);
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r = _vcpu_run(vm, VCPU_ID);
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TEST_ASSERT(!r, "vcpu_run failed: %d\n", r);
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TEST_ASSERT(run->exit_reason == KVM_EXIT_IO,
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"unexpected exit reason: %u (%s)",
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run->exit_reason, exit_reason_str(run->exit_reason));
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switch (get_ucall(vm, VCPU_ID, &uc)) {
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case UCALL_SYNC:
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TEST_ASSERT(uc.args[1] == stage,
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"Unexpected stage: %ld (%d expected)\n",
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uc.args[1], stage);
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break;
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case UCALL_ABORT:
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TEST_FAIL("%s at %s:%ld", (const char *)uc.args[0],
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__FILE__, uc.args[1]);
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return;
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case UCALL_DONE:
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return;
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}
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stage++;
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}
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}
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static void guest_test_hcalls_access(struct kvm_vm *vm, struct hcall_data *hcall,
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void *input, void *output, struct kvm_cpuid2 *best)
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{
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struct kvm_run *run;
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struct ucall uc;
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int stage = 0, r;
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struct kvm_cpuid_entry2 feat = {
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.function = HYPERV_CPUID_FEATURES,
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.eax = HV_MSR_HYPERCALL_AVAILABLE
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};
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struct kvm_cpuid_entry2 recomm = {
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.function = HYPERV_CPUID_ENLIGHTMENT_INFO
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};
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struct kvm_cpuid_entry2 dbg = {
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.function = HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES
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};
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run = vcpu_state(vm, VCPU_ID);
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while (true) {
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switch (stage) {
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case 0:
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hcall->control = 0xdeadbeef;
|
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hcall->expect = HV_STATUS_INVALID_HYPERCALL_CODE;
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break;
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case 1:
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hcall->control = HVCALL_POST_MESSAGE;
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hcall->expect = HV_STATUS_ACCESS_DENIED;
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break;
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case 2:
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||||
feat.ebx |= HV_POST_MESSAGES;
|
||||
hcall->expect = HV_STATUS_INVALID_HYPERCALL_INPUT;
|
||||
break;
|
||||
|
||||
case 3:
|
||||
hcall->control = HVCALL_SIGNAL_EVENT;
|
||||
hcall->expect = HV_STATUS_ACCESS_DENIED;
|
||||
break;
|
||||
case 4:
|
||||
feat.ebx |= HV_SIGNAL_EVENTS;
|
||||
hcall->expect = HV_STATUS_INVALID_HYPERCALL_INPUT;
|
||||
break;
|
||||
|
||||
case 5:
|
||||
hcall->control = HVCALL_RESET_DEBUG_SESSION;
|
||||
hcall->expect = HV_STATUS_INVALID_HYPERCALL_CODE;
|
||||
break;
|
||||
case 6:
|
||||
dbg.eax |= HV_X64_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING;
|
||||
hcall->expect = HV_STATUS_ACCESS_DENIED;
|
||||
break;
|
||||
case 7:
|
||||
feat.ebx |= HV_DEBUGGING;
|
||||
hcall->expect = HV_STATUS_OPERATION_DENIED;
|
||||
break;
|
||||
|
||||
case 8:
|
||||
hcall->control = HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE;
|
||||
hcall->expect = HV_STATUS_ACCESS_DENIED;
|
||||
break;
|
||||
case 9:
|
||||
recomm.eax |= HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
|
||||
hcall->expect = HV_STATUS_SUCCESS;
|
||||
break;
|
||||
case 10:
|
||||
hcall->control = HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX;
|
||||
hcall->expect = HV_STATUS_ACCESS_DENIED;
|
||||
break;
|
||||
case 11:
|
||||
recomm.eax |= HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED;
|
||||
hcall->expect = HV_STATUS_SUCCESS;
|
||||
break;
|
||||
|
||||
case 12:
|
||||
hcall->control = HVCALL_SEND_IPI;
|
||||
hcall->expect = HV_STATUS_ACCESS_DENIED;
|
||||
break;
|
||||
case 13:
|
||||
recomm.eax |= HV_X64_CLUSTER_IPI_RECOMMENDED;
|
||||
hcall->expect = HV_STATUS_INVALID_HYPERCALL_INPUT;
|
||||
break;
|
||||
case 14:
|
||||
/* Nothing in 'sparse banks' -> success */
|
||||
hcall->control = HVCALL_SEND_IPI_EX;
|
||||
hcall->expect = HV_STATUS_SUCCESS;
|
||||
break;
|
||||
|
||||
case 15:
|
||||
hcall->control = HVCALL_NOTIFY_LONG_SPIN_WAIT;
|
||||
hcall->expect = HV_STATUS_ACCESS_DENIED;
|
||||
break;
|
||||
case 16:
|
||||
recomm.ebx = 0xfff;
|
||||
hcall->expect = HV_STATUS_SUCCESS;
|
||||
break;
|
||||
|
||||
case 17:
|
||||
/* END */
|
||||
hcall->control = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
hv_set_cpuid(vm, best, &feat, &recomm, &dbg);
|
||||
|
||||
if (hcall->control)
|
||||
pr_debug("Stage %d: testing hcall: 0x%lx\n", stage,
|
||||
hcall->control);
|
||||
else
|
||||
pr_debug("Stage %d: finish\n", stage);
|
||||
|
||||
r = _vcpu_run(vm, VCPU_ID);
|
||||
TEST_ASSERT(!r, "vcpu_run failed: %d\n", r);
|
||||
TEST_ASSERT(run->exit_reason == KVM_EXIT_IO,
|
||||
"unexpected exit reason: %u (%s)",
|
||||
run->exit_reason, exit_reason_str(run->exit_reason));
|
||||
|
||||
switch (get_ucall(vm, VCPU_ID, &uc)) {
|
||||
case UCALL_SYNC:
|
||||
TEST_ASSERT(uc.args[1] == stage,
|
||||
"Unexpected stage: %ld (%d expected)\n",
|
||||
uc.args[1], stage);
|
||||
break;
|
||||
case UCALL_ABORT:
|
||||
TEST_FAIL("%s at %s:%ld", (const char *)uc.args[0],
|
||||
__FILE__, uc.args[1]);
|
||||
return;
|
||||
case UCALL_DONE:
|
||||
return;
|
||||
}
|
||||
|
||||
stage++;
|
||||
}
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
struct kvm_cpuid2 *best;
|
||||
struct kvm_vm *vm;
|
||||
vm_vaddr_t msr_gva, hcall_page, hcall_params;
|
||||
struct kvm_enable_cap cap = {
|
||||
.cap = KVM_CAP_HYPERV_ENFORCE_CPUID,
|
||||
.args = {1}
|
||||
};
|
||||
|
||||
/* Test MSRs */
|
||||
vm = vm_create_default(VCPU_ID, 0, guest_msr);
|
||||
|
||||
msr_gva = vm_vaddr_alloc(vm, getpagesize(), 0x10000, 0, 0);
|
||||
memset(addr_gva2hva(vm, msr_gva), 0x0, getpagesize());
|
||||
vcpu_args_set(vm, VCPU_ID, 1, msr_gva);
|
||||
vcpu_enable_cap(vm, VCPU_ID, &cap);
|
||||
|
||||
vcpu_set_hv_cpuid(vm, VCPU_ID);
|
||||
|
||||
best = kvm_get_supported_hv_cpuid();
|
||||
|
||||
vm_init_descriptor_tables(vm);
|
||||
vcpu_init_descriptor_tables(vm, VCPU_ID);
|
||||
vm_handle_exception(vm, GP_VECTOR, guest_gp_handler);
|
||||
|
||||
pr_info("Testing access to Hyper-V specific MSRs\n");
|
||||
guest_test_msrs_access(vm, addr_gva2hva(vm, msr_gva),
|
||||
best);
|
||||
kvm_vm_free(vm);
|
||||
|
||||
/* Test hypercalls */
|
||||
vm = vm_create_default(VCPU_ID, 0, guest_hcall);
|
||||
|
||||
/* Hypercall input/output */
|
||||
hcall_page = vm_vaddr_alloc(vm, 2 * getpagesize(), 0x10000, 0, 0);
|
||||
memset(addr_gva2hva(vm, hcall_page), 0x0, 2 * getpagesize());
|
||||
|
||||
hcall_params = vm_vaddr_alloc(vm, getpagesize(), 0x20000, 0, 0);
|
||||
memset(addr_gva2hva(vm, hcall_page), 0x0, getpagesize());
|
||||
|
||||
vcpu_args_set(vm, VCPU_ID, 2, addr_gva2gpa(vm, hcall_page), hcall_params);
|
||||
vcpu_enable_cap(vm, VCPU_ID, &cap);
|
||||
|
||||
vcpu_set_hv_cpuid(vm, VCPU_ID);
|
||||
|
||||
best = kvm_get_supported_hv_cpuid();
|
||||
|
||||
pr_info("Testing access to Hyper-V hypercalls\n");
|
||||
guest_test_hcalls_access(vm, addr_gva2hva(vm, hcall_params),
|
||||
addr_gva2hva(vm, hcall_page),
|
||||
addr_gva2hva(vm, hcall_page) + getpagesize(),
|
||||
best);
|
||||
|
||||
kvm_vm_free(vm);
|
||||
}
|
||||
Reference in New Issue
Block a user