mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-18 03:23:53 -04:00
regulator: Add TPS65185
Merge series from Andreas Kemnade <andreas@kemnade.info>: Add a driver for the TPS65185 regulator which provides the comparatively high voltages needed for electronic paper displays. Datasheet for the TPS65185 is at https://www.ti.com/lit/gpn/tps65185 To simplify things, include the hwmon part directly which is only one temperature sensor and there are no other functions besides regulators in this chip.
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@@ -14,7 +14,6 @@ use core::{any::TypeId, marker::PhantomData, ptr};
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#[cfg(CONFIG_PRINTK)]
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use crate::c_str;
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use crate::str::CStrExt as _;
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pub mod property;
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@@ -67,8 +66,9 @@ static_assert!(core::mem::size_of::<bindings::driver_type>() >= core::mem::size_
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///
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/// # Implementing Bus Devices
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///
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/// This section provides a guideline to implement bus specific devices, such as [`pci::Device`] or
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/// [`platform::Device`].
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/// This section provides a guideline to implement bus specific devices, such as:
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#[cfg_attr(CONFIG_PCI, doc = "* [`pci::Device`](kernel::pci::Device)")]
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/// * [`platform::Device`]
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///
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/// A bus specific device should be defined as follows.
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///
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@@ -160,7 +160,6 @@ static_assert!(core::mem::size_of::<bindings::driver_type>() >= core::mem::size_
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///
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/// [`AlwaysRefCounted`]: kernel::types::AlwaysRefCounted
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/// [`impl_device_context_deref`]: kernel::impl_device_context_deref
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/// [`pci::Device`]: kernel::pci::Device
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/// [`platform::Device`]: kernel::platform::Device
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#[repr(transparent)]
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pub struct Device<Ctx: DeviceContext = Normal>(Opaque<bindings::device>, PhantomData<Ctx>);
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@@ -15,7 +15,7 @@ use core::mem::MaybeUninit;
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/// # Safety
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///
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/// Implementers must ensure that `Self` is layout-compatible with [`RawDeviceId::RawType`];
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/// i.e. it's safe to transmute to `RawDeviceId`.
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/// i.e. it's safe to transmute to `RawType`.
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///
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/// This requirement is needed so `IdArray::new` can convert `Self` to `RawType` when building
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/// the ID table.
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@@ -27,8 +27,9 @@ pub type DmaAddress = bindings::dma_addr_t;
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/// Trait to be implemented by DMA capable bus devices.
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///
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/// The [`dma::Device`](Device) trait should be implemented by bus specific device representations,
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/// where the underlying bus is DMA capable, such as [`pci::Device`](::kernel::pci::Device) or
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/// [`platform::Device`](::kernel::platform::Device).
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/// where the underlying bus is DMA capable, such as:
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#[cfg_attr(CONFIG_PCI, doc = "* [`pci::Device`](kernel::pci::Device)")]
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/// * [`platform::Device`](::kernel::platform::Device)
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pub trait Device: AsRef<device::Device<Core>> {
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/// Set up the device's DMA streaming addressing capabilities.
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///
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@@ -532,8 +533,6 @@ impl<T: AsBytes + FromBytes> CoherentAllocation<T> {
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///
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/// # Safety
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///
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/// * Callers must ensure that the device does not read/write to/from memory while the returned
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/// slice is live.
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/// * Callers must ensure that this call does not race with a read or write to the same region
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/// that overlaps with this write.
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///
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@@ -33,7 +33,14 @@
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//! }
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//! ```
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//!
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//! For specific examples see [`auxiliary::Driver`], [`pci::Driver`] and [`platform::Driver`].
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//! For specific examples see:
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//!
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//! * [`platform::Driver`](kernel::platform::Driver)
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#"
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)]
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#")]
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//!
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//! The `probe()` callback should return a `impl PinInit<Self, Error>`, i.e. the driver's private
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//! data. The bus abstraction should store the pointer in the corresponding bus device. The generic
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@@ -79,7 +86,6 @@
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//!
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//! For this purpose the generic infrastructure in [`device_id`] should be used.
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//!
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//! [`auxiliary::Driver`]: kernel::auxiliary::Driver
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//! [`Core`]: device::Core
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//! [`Device`]: device::Device
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//! [`Device<Core>`]: device::Device<device::Core>
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@@ -87,8 +93,6 @@
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//! [`DeviceContext`]: device::DeviceContext
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//! [`device_id`]: kernel::device_id
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//! [`module_driver`]: kernel::module_driver
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//! [`pci::Driver`]: kernel::pci::Driver
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//! [`platform::Driver`]: kernel::platform::Driver
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use crate::error::{Error, Result};
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use crate::{acpi, device, of, str::CStr, try_pin_init, types::Opaque, ThisModule};
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@@ -20,7 +20,7 @@ use core::ops::Deref;
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///
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/// # Invariants
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///
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/// `Bar` always holds an `IoRaw` inststance that holds a valid pointer to the start of the I/O
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/// `Bar` always holds an `IoRaw` instance that holds a valid pointer to the start of the I/O
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/// memory mapped PCI BAR and its size.
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pub struct Bar<const SIZE: usize = 0> {
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pdev: ARef<Device>,
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@@ -54,7 +54,7 @@ impl<const SIZE: usize> Bar<SIZE> {
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let ioptr: usize = unsafe { bindings::pci_iomap(pdev.as_raw(), num, 0) } as usize;
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if ioptr == 0 {
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// SAFETY:
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// `pdev` valid by the invariants of `Device`.
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// `pdev` is valid by the invariants of `Device`.
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// `num` is checked for validity by a previous call to `Device::resource_len`.
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unsafe { bindings::pci_release_region(pdev.as_raw(), num) };
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return Err(ENOMEM);
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