drm/amd/amdgpu: support MES command SET_HW_RESOURCE1 in sriov

support MES command SET_HW_RESOURCE1 in sriov

Signed-off-by: chongli2 <chongli2@amd.com>
Reviewed-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Acked-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
chongli2
2024-03-26 13:24:21 +08:00
committed by Alex Deucher
parent 9ecef5b2d0
commit f6ac084236
6 changed files with 85 additions and 3 deletions

View File

@@ -61,6 +61,7 @@ enum MES_SCH_API_OPCODE {
MES_SCH_API_MISC = 14,
MES_SCH_API_UPDATE_ROOT_PAGE_TABLE = 15,
MES_SCH_API_AMD_LOG = 16,
MES_SCH_API_SET_HW_RSRC_1 = 19,
MES_SCH_API_MAX = 0xFF
};
@@ -238,6 +239,26 @@ union MESAPI_SET_HW_RESOURCES {
uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
};
union MESAPI_SET_HW_RESOURCES_1 {
struct {
union MES_API_HEADER header;
struct MES_API_STATUS api_status;
uint64_t timestamp;
union {
struct {
uint32_t enable_mes_info_ctx : 1;
uint32_t reserved : 31;
};
uint32_t uint32_all;
};
uint64_t mes_info_ctx_mc_addr;
uint32_t mes_info_ctx_size;
uint32_t mes_kiq_unmap_timeout; // unit is 100ms
};
uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
};
union MESAPI__ADD_QUEUE {
struct {
union MES_API_HEADER header;