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drm/amd/display: Turn functions into static

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Silence [-Wmissing-prototypes] sparse warnings from the display folder
such as:

../drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_smu.c:126:5: warning: no previous prototype for ‘dcn315_smu_send_msg_with_param’ [-Wmissing-prototypes]
  126 | int dcn315_smu_send_msg_with_param(
      |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

v2: drop unused function dcn315_smu_set_voltage_via_phyclk() to avoid
    adding a warning (Alex)

Cc: Qingqing Zhuo (Lillian) <qingqing.zhuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Magali Lemes <magalilemes00@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Magali Lemes
2022-02-24 16:15:51 -03:00
committed by Alex Deucher
parent b83e1ba939
commit f728eb3a50
3 changed files with 3 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
View File

@@ -430,7 +430,7 @@ static unsigned int find_clk_for_voltage(
return 0;
}
void dcn315_clk_mgr_helper_populate_bw_params(
static void dcn315_clk_mgr_helper_populate_bw_params(
struct clk_mgr_internal *clk_mgr,
struct integrated_info *bios_info,
const DpmClocks_315_t *clock_table)

17
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
View File

@@ -123,7 +123,7 @@ static uint32_t dcn315_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, u
return res_val;
}
int dcn315_smu_send_msg_with_param(
static int dcn315_smu_send_msg_with_param(
struct clk_mgr_internal *clk_mgr,
unsigned int msg_id, unsigned int param)
{
@@ -181,21 +181,6 @@ int dcn315_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispc
return actual_dispclk_set_mhz * 1000;
}
int dcn315_smu_set_voltage_via_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz)
{
int actual_phypclk_set_mhz = -1;
if (!clk_mgr->smu_present && requested_phyclk_khz)
return requested_phyclk_khz;
/* Unit of SMU msg parameter is Mhz */
actual_phypclk_set_mhz = dcn315_smu_send_msg_with_param(
clk_mgr,
VBIOSSMC_MSG_SetPhyclkVoltageByFreq,
khz_to_mhz_ceil(requested_phyclk_khz));
return actual_phypclk_set_mhz * 1000;
}
int dcn315_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz)
{

2
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
View File

@@ -42,7 +42,7 @@
#define DCN_BASE__INST0_SEG4 0x02403C00
#define DCN_BASE__INST0_SEG5 0
enum dc_irq_source to_dal_irq_source_dcn315(
static enum dc_irq_source to_dal_irq_source_dcn315(
struct irq_service *irq_service,
uint32_t src_id,
uint32_t ext_id)