mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-18 11:33:36 -04:00
bc5233c090
This intends to have high coverage of the page table format functions and the IOMMU implementation itself, exercising the various corner cases. The kunit tests can be run in the kunit framework, using commands like: tools/testing/kunit/kunit.py run --build_dir build_kunit_arm64 --arch arm64 --make_options LLVM=-19 --kunitconfig ./drivers/iommu/generic_pt/.kunitconfig tools/testing/kunit/kunit.py run --build_dir build_kunit_uml --kunitconfig ./drivers/iommu/generic_pt/.kunitconfig tools/testing/kunit/kunit.py run --build_dir build_kunit_x86_64 --arch x86_64 --kunitconfig ./drivers/iommu/generic_pt/.kunitconfig tools/testing/kunit/kunit.py run --build_dir build_kunit_i386 --arch i386 --kunitconfig ./drivers/iommu/generic_pt/.kunitconfig tools/testing/kunit/kunit.py run --build_dir build_kunit_i386pae --arch i386 --kunitconfig ./drivers/iommu/generic_pt/.kunitconfig --kconfig_add CONFIG_X86_PAE=y There are several interesting corner cases on the 32 bit platforms that need checking. Like the generic tests, these are run on the format's configuration list using kunit "params". This also checks the core iommu parts of the page table code as it enters the logic through a mock iommu_domain. The following are checked: - PT_FEAT_DYNAMIC_TOP properly adds levels one by one - Every page size can be iommu_map()'d, and mapping creates that size - iommu_iova_to_phys() works with every page size - Test converting OA -> non present -> OA when the two OAs overlap and free table levels - Test that unmap stops at holes, unmap doesn't split, and unmap returns the right values for partial unmap requests - Randomly map/unmap. Checks map with random sizes, that map fails when hitting collisions doing nothing, unmap/map with random intersections and full unmap of random sizes. Also checks iommu_iova_to_phys() with random sizes - Check for memory leaks by monitoring NR_SECONDARY_PAGETABLE Reviewed-by: Kevin Tian <kevin.tian@intel.com> Tested-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Tested-by: Pasha Tatashin <pasha.tatashin@soleen.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
96 lines
2.3 KiB
C
96 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* Copyright (C) 2021 Western Digital Corporation or its affiliates.
|
|
* Copyright (C) 2022 Ventana Micro Systems Inc.
|
|
*/
|
|
#ifndef __LINUX_IRQCHIP_RISCV_IMSIC_H
|
|
#define __LINUX_IRQCHIP_RISCV_IMSIC_H
|
|
|
|
#include <linux/types.h>
|
|
#include <linux/bitops.h>
|
|
#include <linux/device.h>
|
|
#include <linux/fwnode.h>
|
|
|
|
#define IMSIC_MMIO_PAGE_SHIFT 12
|
|
#define IMSIC_MMIO_PAGE_SZ BIT(IMSIC_MMIO_PAGE_SHIFT)
|
|
#define IMSIC_MMIO_PAGE_LE 0x00
|
|
#define IMSIC_MMIO_PAGE_BE 0x04
|
|
|
|
#define IMSIC_MIN_ID 63
|
|
#define IMSIC_MAX_ID 2048
|
|
|
|
#define IMSIC_EIDELIVERY 0x70
|
|
|
|
#define IMSIC_EITHRESHOLD 0x72
|
|
|
|
#define IMSIC_EIP0 0x80
|
|
#define IMSIC_EIP63 0xbf
|
|
#define IMSIC_EIPx_BITS 32
|
|
|
|
#define IMSIC_EIE0 0xc0
|
|
#define IMSIC_EIE63 0xff
|
|
#define IMSIC_EIEx_BITS 32
|
|
|
|
#define IMSIC_FIRST IMSIC_EIDELIVERY
|
|
#define IMSIC_LAST IMSIC_EIE63
|
|
|
|
#define IMSIC_MMIO_SETIPNUM_LE 0x00
|
|
#define IMSIC_MMIO_SETIPNUM_BE 0x04
|
|
|
|
struct imsic_local_config {
|
|
phys_addr_t msi_pa;
|
|
void __iomem *msi_va;
|
|
};
|
|
|
|
struct imsic_global_config {
|
|
/*
|
|
* MSI Target Address Scheme
|
|
*
|
|
* XLEN-1 12 0
|
|
* | | |
|
|
* -------------------------------------------------------------
|
|
* |xxxxxx|Group Index|xxxxxxxxxxx|HART Index|Guest Index| 0 |
|
|
* -------------------------------------------------------------
|
|
*/
|
|
|
|
/* Bits representing Guest index, HART index, and Group index */
|
|
u32 guest_index_bits;
|
|
u32 hart_index_bits;
|
|
u32 group_index_bits;
|
|
u32 group_index_shift;
|
|
|
|
/* Global base address matching all target MSI addresses */
|
|
phys_addr_t base_addr;
|
|
|
|
/* Number of interrupt identities */
|
|
u32 nr_ids;
|
|
|
|
/* Number of guest interrupt identities */
|
|
u32 nr_guest_ids;
|
|
|
|
/* Per-CPU IMSIC addresses */
|
|
struct imsic_local_config __percpu *local;
|
|
};
|
|
|
|
#ifdef CONFIG_RISCV_IMSIC
|
|
|
|
const struct imsic_global_config *imsic_get_global_config(void);
|
|
|
|
#else
|
|
|
|
static inline const struct imsic_global_config *imsic_get_global_config(void)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_ACPI) && IS_ENABLED(CONFIG_RISCV_IMSIC)
|
|
int imsic_platform_acpi_probe(struct fwnode_handle *fwnode);
|
|
struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev);
|
|
#else
|
|
static inline struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev) { return NULL; }
|
|
#endif
|
|
|
|
#endif
|