mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-18 03:23:53 -04:00
I finally got a big endian PPC64 kernel to boot in QEMU. The PPC64 VSX
optimized AES library code does work in that case, with the exception of
rndkey_from_vsx() which doesn't take into account that the order in
which the VSX code stores the round key words depends on the endianness.
So fix rndkey_from_vsx() to do the right thing on big endian CPUs.
Fixes: 7cf2082e74 ("lib/crypto: powerpc/aes: Migrate POWER8 optimized code into library")
Link: https://lore.kernel.org/r/20260216022104.332991-1-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
241 lines
6.9 KiB
C
241 lines
6.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015 Markus Stockhausen <stockhausen@collogia.de>
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* Copyright (C) 2015 International Business Machines Inc.
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* Copyright 2026 Google LLC
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*/
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#include <asm/simd.h>
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#include <asm/switch_to.h>
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#include <linux/cpufeature.h>
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#include <linux/jump_label.h>
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#include <linux/preempt.h>
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#include <linux/uaccess.h>
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#ifdef CONFIG_SPE
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EXPORT_SYMBOL_GPL(ppc_expand_key_128);
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EXPORT_SYMBOL_GPL(ppc_expand_key_192);
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EXPORT_SYMBOL_GPL(ppc_expand_key_256);
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EXPORT_SYMBOL_GPL(ppc_generate_decrypt_key);
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EXPORT_SYMBOL_GPL(ppc_encrypt_ecb);
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EXPORT_SYMBOL_GPL(ppc_decrypt_ecb);
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EXPORT_SYMBOL_GPL(ppc_encrypt_cbc);
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EXPORT_SYMBOL_GPL(ppc_decrypt_cbc);
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EXPORT_SYMBOL_GPL(ppc_crypt_ctr);
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EXPORT_SYMBOL_GPL(ppc_encrypt_xts);
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EXPORT_SYMBOL_GPL(ppc_decrypt_xts);
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void ppc_encrypt_aes(u8 *out, const u8 *in, const u32 *key_enc, u32 rounds);
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void ppc_decrypt_aes(u8 *out, const u8 *in, const u32 *key_dec, u32 rounds);
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static void spe_begin(void)
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{
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/* disable preemption and save users SPE registers if required */
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preempt_disable();
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enable_kernel_spe();
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}
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static void spe_end(void)
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{
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disable_kernel_spe();
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/* reenable preemption */
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preempt_enable();
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}
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static void aes_preparekey_arch(union aes_enckey_arch *k,
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union aes_invkey_arch *inv_k,
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const u8 *in_key, int key_len, int nrounds)
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{
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if (key_len == AES_KEYSIZE_128)
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ppc_expand_key_128(k->spe_enc_key, in_key);
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else if (key_len == AES_KEYSIZE_192)
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ppc_expand_key_192(k->spe_enc_key, in_key);
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else
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ppc_expand_key_256(k->spe_enc_key, in_key);
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if (inv_k)
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ppc_generate_decrypt_key(inv_k->spe_dec_key, k->spe_enc_key,
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key_len);
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}
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static void aes_encrypt_arch(const struct aes_enckey *key,
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u8 out[AES_BLOCK_SIZE],
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const u8 in[AES_BLOCK_SIZE])
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{
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spe_begin();
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ppc_encrypt_aes(out, in, key->k.spe_enc_key, key->nrounds / 2 - 1);
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spe_end();
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}
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static void aes_decrypt_arch(const struct aes_key *key,
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u8 out[AES_BLOCK_SIZE],
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const u8 in[AES_BLOCK_SIZE])
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{
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spe_begin();
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ppc_decrypt_aes(out, in, key->inv_k.spe_dec_key, key->nrounds / 2 - 1);
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spe_end();
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}
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#else /* CONFIG_SPE */
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_vec_crypto);
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EXPORT_SYMBOL_GPL(aes_p8_set_encrypt_key);
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EXPORT_SYMBOL_GPL(aes_p8_set_decrypt_key);
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EXPORT_SYMBOL_GPL(aes_p8_encrypt);
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EXPORT_SYMBOL_GPL(aes_p8_decrypt);
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EXPORT_SYMBOL_GPL(aes_p8_cbc_encrypt);
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EXPORT_SYMBOL_GPL(aes_p8_ctr32_encrypt_blocks);
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EXPORT_SYMBOL_GPL(aes_p8_xts_encrypt);
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EXPORT_SYMBOL_GPL(aes_p8_xts_decrypt);
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static inline bool is_vsx_format(const struct p8_aes_key *key)
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{
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return key->nrounds != 0;
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}
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/*
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* Convert a round key from VSX to generic format by reflecting all 16 bytes (if
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* little endian) or reflecting the bytes in each 4-byte word (if big endian),
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* and (if apply_inv_mix=true) applying InvMixColumn to each column.
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*
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* It would be nice if the VSX and generic key formats would be compatible. But
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* that's very difficult to do, with the assembly code having been borrowed from
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* OpenSSL and also targeted to POWER8 rather than POWER9.
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*
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* Fortunately, this conversion should only be needed in extremely rare cases,
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* possibly not at all in practice. It's just included for full correctness.
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*/
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static void rndkey_from_vsx(u32 out[4], const u32 in[4], bool apply_inv_mix)
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{
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const bool be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
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u32 k0 = swab32(in[0]);
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u32 k1 = swab32(in[1]);
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u32 k2 = swab32(in[2]);
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u32 k3 = swab32(in[3]);
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if (apply_inv_mix) {
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k0 = inv_mix_columns(k0);
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k1 = inv_mix_columns(k1);
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k2 = inv_mix_columns(k2);
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k3 = inv_mix_columns(k3);
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}
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out[0] = be ? k0 : k3;
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out[1] = be ? k1 : k2;
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out[2] = be ? k2 : k1;
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out[3] = be ? k3 : k0;
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}
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static void aes_preparekey_arch(union aes_enckey_arch *k,
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union aes_invkey_arch *inv_k,
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const u8 *in_key, int key_len, int nrounds)
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{
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const int keybits = 8 * key_len;
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int ret;
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if (static_branch_likely(&have_vec_crypto) && likely(may_use_simd())) {
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preempt_disable();
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pagefault_disable();
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enable_kernel_vsx();
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ret = aes_p8_set_encrypt_key(in_key, keybits, &k->p8);
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/*
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* aes_p8_set_encrypt_key() should never fail here, since the
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* key length was already validated.
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*/
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WARN_ON_ONCE(ret);
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if (inv_k) {
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ret = aes_p8_set_decrypt_key(in_key, keybits,
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&inv_k->p8);
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/* ... and likewise for aes_p8_set_decrypt_key(). */
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WARN_ON_ONCE(ret);
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}
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disable_kernel_vsx();
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pagefault_enable();
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preempt_enable();
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} else {
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aes_expandkey_generic(k->rndkeys,
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inv_k ? inv_k->inv_rndkeys : NULL,
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in_key, key_len);
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/* Mark the key as using the generic format. */
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k->p8.nrounds = 0;
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if (inv_k)
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inv_k->p8.nrounds = 0;
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}
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}
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static void aes_encrypt_arch(const struct aes_enckey *key,
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u8 out[AES_BLOCK_SIZE],
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const u8 in[AES_BLOCK_SIZE])
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{
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if (static_branch_likely(&have_vec_crypto) &&
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likely(is_vsx_format(&key->k.p8) && may_use_simd())) {
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preempt_disable();
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pagefault_disable();
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enable_kernel_vsx();
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aes_p8_encrypt(in, out, &key->k.p8);
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disable_kernel_vsx();
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pagefault_enable();
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preempt_enable();
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} else if (unlikely(is_vsx_format(&key->k.p8))) {
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/*
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* This handles (the hopefully extremely rare) case where a key
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* was prepared using the VSX optimized format, then encryption
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* is done in a context that cannot use VSX instructions.
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*/
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u32 rndkeys[AES_MAX_KEYLENGTH_U32];
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for (int i = 0; i < 4 * (key->nrounds + 1); i += 4)
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rndkey_from_vsx(&rndkeys[i],
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&key->k.p8.rndkeys[i], false);
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aes_encrypt_generic(rndkeys, key->nrounds, out, in);
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} else {
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aes_encrypt_generic(key->k.rndkeys, key->nrounds, out, in);
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}
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}
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static void aes_decrypt_arch(const struct aes_key *key, u8 out[AES_BLOCK_SIZE],
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const u8 in[AES_BLOCK_SIZE])
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{
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if (static_branch_likely(&have_vec_crypto) &&
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likely(is_vsx_format(&key->inv_k.p8) && may_use_simd())) {
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preempt_disable();
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pagefault_disable();
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enable_kernel_vsx();
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aes_p8_decrypt(in, out, &key->inv_k.p8);
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disable_kernel_vsx();
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pagefault_enable();
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preempt_enable();
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} else if (unlikely(is_vsx_format(&key->inv_k.p8))) {
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/*
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* This handles (the hopefully extremely rare) case where a key
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* was prepared using the VSX optimized format, then decryption
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* is done in a context that cannot use VSX instructions.
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*/
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u32 inv_rndkeys[AES_MAX_KEYLENGTH_U32];
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int i;
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rndkey_from_vsx(&inv_rndkeys[0],
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&key->inv_k.p8.rndkeys[0], false);
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for (i = 4; i < 4 * key->nrounds; i += 4) {
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rndkey_from_vsx(&inv_rndkeys[i],
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&key->inv_k.p8.rndkeys[i], true);
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}
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rndkey_from_vsx(&inv_rndkeys[i],
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&key->inv_k.p8.rndkeys[i], false);
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aes_decrypt_generic(inv_rndkeys, key->nrounds, out, in);
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} else {
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aes_decrypt_generic(key->inv_k.inv_rndkeys, key->nrounds,
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out, in);
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}
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}
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#define aes_mod_init_arch aes_mod_init_arch
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static void aes_mod_init_arch(void)
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{
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if (cpu_has_feature(CPU_FTR_ARCH_207S) &&
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(cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_VEC_CRYPTO))
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static_branch_enable(&have_vec_crypto);
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}
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#endif /* !CONFIG_SPE */
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