mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-23 05:56:14 -04:00
7afd2a5aec
Probe the SEAD3 EHCI controller using the generic-ehci driver & device tree rather than platform code, in order to reduce the amount of the latter. Now that no devices probed from platform code require interrupts, remove the retrieval of the IRQ domain & sead3int.h. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14051/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
112 lines
2.0 KiB
Plaintext
112 lines
2.0 KiB
Plaintext
/dts-v1/;
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/memreserve/ 0x00000000 0x00001000; // reserved
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/memreserve/ 0x00001000 0x000ef000; // ROM data
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/memreserve/ 0x000f0000 0x004cc000; // reserved
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#include <dt-bindings/interrupt-controller/mips-gic.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mti,sead-3";
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interrupt-parent = <&gic>;
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chosen {
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stdout-path = "uart1:115200";
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};
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aliases {
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uart0 = &uart0;
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uart1 = &uart1;
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};
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cpus {
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cpu@0 {
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compatible = "mti,mips14KEc", "mti,mips14Kc";
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x08000000>;
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};
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cpu_intc: interrupt-controller {
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gic: interrupt-controller@1b1c0000 {
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compatible = "mti,gic";
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reg = <0x1b1c0000 0x20000>;
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interrupt-controller;
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#interrupt-cells = <3>;
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/*
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* Declare the interrupt-parent even though the mti,gic
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* binding doesn't require it, such that the kernel can
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* figure out that cpu_intc is the root interrupt
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* controller & should be probed first.
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*/
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interrupt-parent = <&cpu_intc>;
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timer {
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compatible = "mti,gic-timer";
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interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
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};
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};
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ehci@1b200000 {
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compatible = "generic-ehci";
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reg = <0x1b200000 0x1000>;
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interrupts = <0>; /* GIC 0 or CPU 6 */
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has-transaction-translator;
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};
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/* UART connected to FTDI & miniUSB socket */
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uart0: uart@1f000900 {
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compatible = "ns16550a";
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reg = <0x1f000900 0x20>;
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reg-io-width = <4>;
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reg-shift = <2>;
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clock-frequency = <14745600>;
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interrupts = <3>; /* GIC 3 or CPU 4 */
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no-loopback-test;
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};
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/* UART connected to RS232 socket */
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uart1: uart@1f000800 {
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compatible = "ns16550a";
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reg = <0x1f000800 0x20>;
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reg-io-width = <4>;
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reg-shift = <2>;
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clock-frequency = <14745600>;
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interrupts = <2>; /* GIC 2 or CPU 4 */
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no-loopback-test;
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};
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eth@1f010000 {
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compatible = "smsc,lan9115";
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reg = <0x1f010000 0x10000>;
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reg-io-width = <4>;
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interrupts = <0>; /* GIC 0 or CPU 6 */
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phy-mode = "mii";
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smsc,irq-push-pull;
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smsc,save-mac-address;
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};
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};
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