mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-19 20:13:49 -04:00
37b14f2dfa
QAT GEN4 devices support chained compression operations. These
allow, with a single request to firmware, to hash then compress
data.
Extend the configuration to enable such mode. The cfg_services
operations in sysfs are extended to allow the string "dcc". When
selected, the driver downloads to the device both the symmetric
crypto and the compression firmware images and sends an admin message
to firmware which enables `chained` operations.
In addition, it sets the device's capabilities as the combination
of compression and symmetric crypto capabilities, while excluding
the ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC bit to indicate
that in this mode, symmetric crypto instances are not supported.
When "dcc" is enabled, the device will handle compression requests
as if the "dc" configuration is loaded ("dcc" is a variation of "dc")
and the driver will register the acomp algorithms.
As for the other extended configurations, "dcc" is only available for
qat_4xxx devices and the chaining service will be only accessible from
user space.
Signed-off-by: Adam Guerin <adam.guerin@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
54 lines
2.0 KiB
C
54 lines
2.0 KiB
C
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
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/* Copyright(c) 2014 - 2020 Intel Corporation */
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#ifndef ADF_CFG_STRINGS_H_
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#define ADF_CFG_STRINGS_H_
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#define ADF_GENERAL_SEC "GENERAL"
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#define ADF_KERNEL_SEC "KERNEL"
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#define ADF_ACCEL_SEC "Accelerator"
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#define ADF_NUM_CY "NumberCyInstances"
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#define ADF_NUM_DC "NumberDcInstances"
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#define ADF_RING_SYM_SIZE "NumConcurrentSymRequests"
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#define ADF_RING_ASYM_SIZE "NumConcurrentAsymRequests"
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#define ADF_RING_DC_SIZE "NumConcurrentRequests"
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#define ADF_RING_ASYM_TX "RingAsymTx"
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#define ADF_RING_SYM_TX "RingSymTx"
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#define ADF_RING_ASYM_RX "RingAsymRx"
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#define ADF_RING_SYM_RX "RingSymRx"
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#define ADF_RING_DC_TX "RingTx"
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#define ADF_RING_DC_RX "RingRx"
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#define ADF_ETRMGR_BANK "Bank"
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#define ADF_RING_SYM_BANK_NUM "BankSymNumber"
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#define ADF_RING_ASYM_BANK_NUM "BankAsymNumber"
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#define ADF_RING_DC_BANK_NUM "BankDcNumber"
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#define ADF_CY "Cy"
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#define ADF_DC "Dc"
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#define ADF_CFG_DC "dc"
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#define ADF_CFG_CY "sym;asym"
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#define ADF_CFG_SYM "sym"
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#define ADF_CFG_ASYM "asym"
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#define ADF_CFG_ASYM_SYM "asym;sym"
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#define ADF_CFG_ASYM_DC "asym;dc"
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#define ADF_CFG_DC_ASYM "dc;asym"
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#define ADF_CFG_SYM_DC "sym;dc"
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#define ADF_CFG_DC_SYM "dc;sym"
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#define ADF_CFG_DCC "dcc"
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#define ADF_SERVICES_ENABLED "ServicesEnabled"
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#define ADF_PM_IDLE_SUPPORT "PmIdleSupport"
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#define ADF_ETRMGR_COALESCING_ENABLED "InterruptCoalescingEnabled"
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#define ADF_ETRMGR_COALESCING_ENABLED_FORMAT \
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ADF_ETRMGR_BANK "%d" ADF_ETRMGR_COALESCING_ENABLED
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#define ADF_ETRMGR_COALESCE_TIMER "InterruptCoalescingTimerNs"
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#define ADF_ETRMGR_COALESCE_TIMER_FORMAT \
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ADF_ETRMGR_BANK "%d" ADF_ETRMGR_COALESCE_TIMER
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#define ADF_ETRMGR_COALESCING_MSG_ENABLED "InterruptCoalescingNumResponses"
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#define ADF_ETRMGR_COALESCING_MSG_ENABLED_FORMAT \
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ADF_ETRMGR_BANK "%d" ADF_ETRMGR_COALESCING_MSG_ENABLED
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#define ADF_ETRMGR_CORE_AFFINITY "CoreAffinity"
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#define ADF_ETRMGR_CORE_AFFINITY_FORMAT \
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ADF_ETRMGR_BANK "%d" ADF_ETRMGR_CORE_AFFINITY
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#define ADF_ACCEL_STR "Accelerator%d"
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#define ADF_HEARTBEAT_TIMER "HeartbeatTimer"
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#endif
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