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Preventing the driver from initializing GTs of specific type(s) can be useful for debugging and early hardware bringup. Add a configfs attribute to allow this kind of control for debugging. With today's platforms and software design, this configuration setting is only effective for disabling the media GT since the driver currently requires that there always be a primary GT to probe the device. However this might change in the future --- in theory it should be possible (with some additional driver work) to allow an igpu device to come up with only the media GT and no primary GT. Or to allow an igpu device to come up with no GTs at all (for display-only usage). A primary GT will likely always be required on dgpu platforms because we rely on the BCS engines inside the primary GT for various vram operations. v2: - Expand/clarify kerneldoc for configfs attribute. (Gustavo) - Tighten type usage in gt_types[] structure. (Gustavo) - Adjust string parsing/name matching to match exact GT names and not accept partial names. (Gustavo) v3: - Switch to scope-based cleanup in gt_types_allowed_store() to fix a leak if the device is already bound. (Gustavo) - Switch configfs lookup interface to two boolean functions that specify whether primary/media are supported rather than one function that returns a mask. This is simpler to use and understand. v4: - Rename xe_configfs_*_gt_supported to xe_configfs_*_gt_allowed for consistency with configfs interface and other functions. (Gustavo) - Simplify boolean check in xe_configfs_*_gt_allowed. (Michal) - Use xe_info() for message printing. (Michal) - Use guard() instead of scoped_guard(). (Michal) - Make new functions take 'struct pci_dev' for consistency with other configfs lookup functions. (Michal) Cc: Gustavo Sousa <gustavo.sousa@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://lore.kernel.org/r/20251013200944.2499947-47-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
48 lines
1.9 KiB
C
48 lines
1.9 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2025 Intel Corporation
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*/
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#ifndef _XE_CONFIGFS_H_
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#define _XE_CONFIGFS_H_
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#include <linux/limits.h>
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#include <linux/types.h>
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#include <xe_hw_engine_types.h>
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struct pci_dev;
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#if IS_ENABLED(CONFIG_CONFIGFS_FS)
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int xe_configfs_init(void);
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void xe_configfs_exit(void);
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void xe_configfs_check_device(struct pci_dev *pdev);
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bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
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bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
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bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
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u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
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bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
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u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class,
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const u32 **cs);
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u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
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const u32 **cs);
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#ifdef CONFIG_PCI_IOV
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unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev);
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#endif
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#else
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static inline int xe_configfs_init(void) { return 0; }
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static inline void xe_configfs_exit(void) { }
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static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
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static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
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static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
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static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
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static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
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static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
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static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class,
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const u32 **cs) { return 0; }
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static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
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const u32 **cs) { return 0; }
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static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev) { return UINT_MAX; }
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#endif
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#endif
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