mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-18 03:23:53 -04:00
a2faac3986
Similar to commita6c30873ee("ARM: 8989/1: use .fpu assembler directives instead of assembler arguments"). GCC and GNU binutils support setting the "sub arch" via -march=, -Wa,-march, target function attribute, and .arch assembler directive. Clang was missing support for -Wa,-march=, but this was implemented in clang-13. The behavior of both GCC and Clang is to prefer -Wa,-march= over -march= for assembler and assembler-with-cpp sources, but Clang will warn about the -march= being unused. clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument] Since most assembler is non-conditionally assembled with one sub arch (modulo arch/arm/delay-loop.S which conditionally is assembled as armv4 based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the .arch assembler directive. Add a few more instances found in compile testing as found by Arnd and Nathan. Link:1d51c699b9Link: https://bugs.llvm.org/show_bug.cgi?id=48894 Link: https://github.com/ClangBuiltLinux/linux/issues/1195 Link: https://github.com/ClangBuiltLinux/linux/issues/1315 Suggested-by: Arnd Bergmann <arnd@arndb.de> Suggested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
70 lines
1.3 KiB
ArmAsm
70 lines
1.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright © 2014-2017 Broadcom
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include "pm.h"
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.arch armv7-a
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.text
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.align 3
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#define AON_CTRL_REG r10
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#define DDR_PHY_STATUS_REG r11
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/*
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* r0: AON_CTRL base address
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* r1: DDRY PHY PLL status register address
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*/
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ENTRY(brcmstb_pm_do_s2)
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stmfd sp!, {r4-r11, lr}
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mov AON_CTRL_REG, r0
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mov DDR_PHY_STATUS_REG, r1
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/* Flush memory transactions */
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dsb
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/* Cache DDR_PHY_STATUS_REG translation */
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ldr r0, [DDR_PHY_STATUS_REG]
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/* power down request */
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ldr r0, =PM_S2_COMMAND
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ldr r1, =0
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str r1, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
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ldr r1, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
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str r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
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ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
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/* Wait for interrupt */
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wfi
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nop
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/* Bring MEMC back up */
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1: ldr r0, [DDR_PHY_STATUS_REG]
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ands r0, #1
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beq 1b
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/* Power-up handshake */
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ldr r0, =1
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str r0, [AON_CTRL_REG, #AON_CTRL_HOST_MISC_CMDS]
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ldr r0, [AON_CTRL_REG, #AON_CTRL_HOST_MISC_CMDS]
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ldr r0, =0
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str r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
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ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL]
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/* Return to caller */
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ldr r0, =0
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ldmfd sp!, {r4-r11, pc}
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ENDPROC(brcmstb_pm_do_s2)
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/* Place literal pool here */
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.ltorg
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ENTRY(brcmstb_pm_do_s2_sz)
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.word . - brcmstb_pm_do_s2
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