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https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
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7a5a8a67c0
Add devicetree bindings for the global clock controller on Qualcomm SDM439 platform. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20251117-gcc-msm8940-sdm439-v2-3-4af57c8bc7eb@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
82 lines
2.1 KiB
YAML
82 lines
2.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller on MSM8937, MSM8940, MSM8953 and SDM439
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maintainers:
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- Adam Skladowski <a_skl39@protonmail.com>
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- Sireesh Kodali <sireeshkodali@protonmail.com>
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- Barnabas Czeman <barnabas.czeman@mainlining.org>
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description: |
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Qualcomm global clock control module provides the clocks, resets and power
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domains on MSM8937, MSM8940, MSM8953 or SDM439.
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See also::
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include/dt-bindings/clock/qcom,gcc-msm8917.h
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include/dt-bindings/clock/qcom,gcc-msm8953.h
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properties:
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compatible:
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enum:
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- qcom,gcc-msm8937
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- qcom,gcc-msm8940
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- qcom,gcc-msm8953
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- qcom,gcc-sdm439
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clocks:
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items:
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- description: Board XO source
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- description: Sleep clock source
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- description: Byte clock from DSI PHY0
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- description: Pixel clock from DSI PHY0
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- description: Byte clock from DSI PHY1
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- description: Pixel clock from DSI PHY1
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clock-names:
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items:
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- const: xo
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- const: sleep
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- const: dsi0pll
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- const: dsi0pllbyte
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- const: dsi1pll
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- const: dsi1pllbyte
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required:
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- compatible
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- clocks
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- clock-names
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmcc.h>
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clock-controller@1800000 {
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compatible = "qcom,gcc-msm8953";
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reg = <0x01800000 0x80000>;
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
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<&sleep_clk>,
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<&dsi0_phy 1>,
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<&dsi0_phy 0>,
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<&dsi1_phy 1>,
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<&dsi1_phy 0>;
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clock-names = "xo",
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"sleep",
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"dsi0pll",
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"dsi0pllbyte",
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"dsi1pll",
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"dsi1pllbyte";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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