mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-18 03:23:53 -04:00
3ee315537e
Add bindings for the Global Clock Controller (GCC) present on the Qualcomm SAR2130P platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20241027-sar2130p-clocks-v5-2-ecad2a1432ba@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
66 lines
1.5 KiB
YAML
66 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/qcom,sar2130p-gcc.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Qualcomm Global Clock & Reset Controller on sar2130p
|
|
|
|
maintainers:
|
|
- Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
|
|
|
description: |
|
|
Qualcomm global clock control module provides the clocks, resets and
|
|
power domains on sar2130p.
|
|
|
|
See also: include/dt-bindings/clock/qcom,sar2130p-gcc.h
|
|
|
|
properties:
|
|
compatible:
|
|
const: qcom,sar2130p-gcc
|
|
|
|
clocks:
|
|
items:
|
|
- description: XO reference clock
|
|
- description: Sleep clock
|
|
- description: PCIe 0 pipe clock
|
|
- description: PCIe 1 pipe clock
|
|
- description: Primary USB3 PHY wrapper pipe clock
|
|
|
|
protected-clocks:
|
|
maxItems: 240
|
|
|
|
power-domains:
|
|
maxItems: 1
|
|
|
|
required:
|
|
- compatible
|
|
- clocks
|
|
- '#power-domain-cells'
|
|
|
|
allOf:
|
|
- $ref: qcom,gcc.yaml#
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/clock/qcom,rpmh.h>
|
|
#include <dt-bindings/power/qcom,rpmhpd.h>
|
|
|
|
gcc: clock-controller@100000 {
|
|
compatible = "qcom,sar2130p-gcc";
|
|
reg = <0x100000 0x1f4200>;
|
|
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
|
<&sleep_clk>,
|
|
<&pcie_0_pipe_clk>,
|
|
<&pcie_1_pipe_clk>,
|
|
<&usb_0_ssphy>;
|
|
power-domains = <&rpmhpd RPMHPD_CX>;
|
|
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
#power-domain-cells = <1>;
|
|
};
|
|
...
|