mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
synced 2026-04-23 14:02:06 -04:00
Pull drm updates from Dave Airlie:
"There's a lot of rework, the panic helper support is being added to
more drivers, v3d gets support for HW superpages, scheduler
documentation, drm client and video aperture reworks, some new
MAINTAINERS added, amdgpu has the usual lots of IP refactors, Intel
has some Pantherlake enablement and xe is getting some SRIOV bits, but
just lots of stuff everywhere.
core:
- split DSC helpers from DP helpers
- clang build fixes for drm/mm test
- drop simple pipeline support for gem vram
- document submission error signaling
- move drm_rect to drm core module from kms helper
- add default client setup to most drivers
- move to video aperture helpers instead of drm ones
tests:
- new framebuffer tests
ttm:
- remove swapped and pinned BOs from TTM lru
panic:
- fix uninit spinlock
- add ABGR2101010 support
bridge:
- add TI TDP158 support
- use standard PM OPS
dma-fence:
- use read_trylock instead of read_lock to help lockdep
scheduler:
- add errno to sched start to report different errors
- add locking to drm_sched_entity_modify_sched
- improve documentation
xe:
- add drm_line_printer
- lots of refactoring
- Enable Xe2 + PES disaggregation
- add new ARL PCI ID
- SRIOV development work
- fix exec unnecessary implicit fence
- define and parse OA sync props
- forcewake refactoring
i915:
- Enable BMG/LNL ultra joiner
- Enable 10bpx + CCS scanout on ICL+, fp16/CCS on TGL+
- use DSB for plane/color mgmt
- Arrow lake PCI IDs
- lots of i915/xe display refactoring
- enable PXP GuC autoteardown
- Pantherlake (PTL) Xe3 LPD display enablement
- Allow fastset HDR infoframe changes
- write DP source OUI for non-eDP sinks
- share PCI IDs between i915 and xe
amdgpu:
- SDMA queue reset support
- SMU 13.0.6, JPEG 4.0.3 updates
- Initial runtime repartitioning support
- rework IP structs for multiple IP instances
- Fetch EDID from _DDC if available
- SMU13 zero rpm user control
- lots of fixes/cleanups
amdkfd:
- Increase event FIFO size
- add topology cap flag for per queue reset
msm:
- DPU:
- SA8775P support
- (disabled by default) MSM8917, MSM8937, MSM8953 and MSM8996 support
- Enable large framebuffer support
- Drop MSM8998 and SDM845
- DP:
- SA8775P support
- GPU:
- a7xx preemption support
- Adreno A663 support
ast:
- warn about unsupported TX chips
ivpu:
- add coredump
- add pantherlake support
rockchip:
- 4K@60Hz display enablement
- generate pll programming tables
panthor:
- add timestamp query API
- add realtime group priority
- add fdinfo support
etnaviv:
- improve handling of DMA address limits
- improve GPU hangcheck
exynos:
- Decon Exynos7870 support
mediatek:
- add OF graph support
omap:
- locking fixes
bochs:
- convert to gem/shmem from simpledrm
v3d:
- support big/super pages
- add gemfs
vc4:
- BCM2712 support refactoring
- add YUV444 format support
udmabuf:
- folio related fixes
nouveau:
- add panic support on nv50+"
* tag 'drm-next-2024-11-21' of https://gitlab.freedesktop.org/drm/kernel: (1583 commits)
drm/xe/guc: Fix dereference before NULL check
drm/amd: Fix initialization mistake for NBIO 7.7.0
Revert "drm/amd/display: parse umc_info or vram_info based on ASIC"
drm/amd/display: Fix failure to read vram info due to static BP_RESULT
drm/amdgpu: enable GTT fallback handling for dGPUs only
drm/amd/amdgpu: limit single process inside MES
drm/fourcc: add AMD_FMT_MOD_TILE_GFX9_4K_D_X
drm/amdgpu/mes12: correct kiq unmap latency
drm/amdgpu: Support vcn and jpeg error info parsing
drm/amd : Update MES API header file for v11 & v12
drm/amd/amdkfd: add/remove kfd queues on start/stop KFD scheduling
drm/amdkfd: change kfd process kref count at creation
drm/amdgpu: Cleanup shift coding style
drm/amd/amdgpu: Increase MES log buffer to dump mes scratch data
drm/amdgpu: Implement virt req_ras_err_count
drm/amdgpu: VF Query RAS Caps from Host if supported
drm/amdgpu: Add msg handlers for SRIOV RAS Telemetry
drm/amdgpu: Update SRIOV Exchange Headers for RAS Telemetry Support
drm/amd/display: 3.2.309
drm/amd/display: Adjust VSDB parser for replay feature
...
209 lines
5.6 KiB
C
209 lines
5.6 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#ifndef _XE_DEVICE_H_
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#define _XE_DEVICE_H_
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#include <drm/drm_util.h>
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#include "xe_device_types.h"
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#include "xe_gt_types.h"
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#include "xe_sriov.h"
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static inline struct xe_device *to_xe_device(const struct drm_device *dev)
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{
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return container_of(dev, struct xe_device, drm);
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}
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static inline struct xe_device *kdev_to_xe_device(struct device *kdev)
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{
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struct drm_device *drm = dev_get_drvdata(kdev);
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return drm ? to_xe_device(drm) : NULL;
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}
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static inline struct xe_device *pdev_to_xe_device(struct pci_dev *pdev)
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{
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struct drm_device *drm = pci_get_drvdata(pdev);
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return drm ? to_xe_device(drm) : NULL;
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}
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static inline struct xe_device *xe_device_const_cast(const struct xe_device *xe)
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{
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return (struct xe_device *)xe;
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}
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static inline struct xe_device *ttm_to_xe_device(struct ttm_device *ttm)
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{
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return container_of(ttm, struct xe_device, ttm);
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}
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struct xe_device *xe_device_create(struct pci_dev *pdev,
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const struct pci_device_id *ent);
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int xe_device_probe_early(struct xe_device *xe);
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int xe_device_probe(struct xe_device *xe);
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void xe_device_remove(struct xe_device *xe);
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void xe_device_shutdown(struct xe_device *xe);
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void xe_device_wmb(struct xe_device *xe);
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static inline struct xe_file *to_xe_file(const struct drm_file *file)
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{
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return file->driver_priv;
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}
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static inline struct xe_tile *xe_device_get_root_tile(struct xe_device *xe)
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{
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return &xe->tiles[0];
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}
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#define XE_MAX_GT_PER_TILE 2
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static inline struct xe_gt *xe_tile_get_gt(struct xe_tile *tile, u8 gt_id)
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{
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if (drm_WARN_ON(&tile_to_xe(tile)->drm, gt_id >= XE_MAX_GT_PER_TILE))
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gt_id = 0;
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return gt_id ? tile->media_gt : tile->primary_gt;
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}
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static inline struct xe_gt *xe_device_get_gt(struct xe_device *xe, u8 gt_id)
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{
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struct xe_tile *root_tile = xe_device_get_root_tile(xe);
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struct xe_gt *gt;
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/*
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* FIXME: This only works for now because multi-tile and standalone
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* media are mutually exclusive on the platforms we have today.
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*
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* id => GT mapping may change once we settle on how we want to handle
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* our UAPI.
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*/
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if (MEDIA_VER(xe) >= 13) {
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gt = xe_tile_get_gt(root_tile, gt_id);
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} else {
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if (drm_WARN_ON(&xe->drm, gt_id >= XE_MAX_TILES_PER_DEVICE))
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gt_id = 0;
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gt = xe->tiles[gt_id].primary_gt;
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}
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if (!gt)
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return NULL;
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drm_WARN_ON(&xe->drm, gt->info.id != gt_id);
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drm_WARN_ON(&xe->drm, gt->info.type == XE_GT_TYPE_UNINITIALIZED);
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return gt;
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}
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/*
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* Provide a GT structure suitable for performing non-GT MMIO operations against
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* the primary tile. Primarily intended for early tile initialization, display
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* handling, top-most interrupt enable/disable, etc. Since anything using the
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* MMIO handle returned by this function doesn't need GSI offset translation,
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* we'll return the primary GT from the root tile.
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*
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* FIXME: Fix the driver design so that 'gt' isn't the target of all MMIO
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* operations.
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*
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* Returns the primary gt of the root tile.
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*/
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static inline struct xe_gt *xe_root_mmio_gt(struct xe_device *xe)
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{
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return xe_device_get_root_tile(xe)->primary_gt;
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}
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static inline bool xe_device_uc_enabled(struct xe_device *xe)
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{
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return !xe->info.force_execlist;
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}
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#define for_each_tile(tile__, xe__, id__) \
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for ((id__) = 0; (id__) < (xe__)->info.tile_count; (id__)++) \
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for_each_if((tile__) = &(xe__)->tiles[(id__)])
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#define for_each_remote_tile(tile__, xe__, id__) \
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for ((id__) = 1; (id__) < (xe__)->info.tile_count; (id__)++) \
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for_each_if((tile__) = &(xe__)->tiles[(id__)])
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/*
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* FIXME: This only works for now since multi-tile and standalone media
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* happen to be mutually exclusive. Future platforms may change this...
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*/
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#define for_each_gt(gt__, xe__, id__) \
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for ((id__) = 0; (id__) < (xe__)->info.gt_count; (id__)++) \
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for_each_if((gt__) = xe_device_get_gt((xe__), (id__)))
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static inline struct xe_force_wake *gt_to_fw(struct xe_gt *gt)
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{
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return >->pm.fw;
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}
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void xe_device_assert_mem_access(struct xe_device *xe);
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static inline bool xe_device_has_flat_ccs(struct xe_device *xe)
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{
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return xe->info.has_flat_ccs;
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}
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static inline bool xe_device_has_sriov(struct xe_device *xe)
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{
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return xe->info.has_sriov;
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}
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static inline bool xe_device_has_msix(struct xe_device *xe)
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{
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/* TODO: change this when MSI-X support is fully integrated */
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return false;
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}
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static inline bool xe_device_has_memirq(struct xe_device *xe)
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{
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return GRAPHICS_VERx100(xe) >= 1250;
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}
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static inline bool xe_device_uses_memirq(struct xe_device *xe)
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{
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return xe_device_has_memirq(xe) && (IS_SRIOV_VF(xe) || xe_device_has_msix(xe));
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}
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u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
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void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
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u64 xe_device_canonicalize_addr(struct xe_device *xe, u64 address);
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u64 xe_device_uncanonicalize_addr(struct xe_device *xe, u64 address);
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void xe_device_td_flush(struct xe_device *xe);
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void xe_device_l2_flush(struct xe_device *xe);
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static inline bool xe_device_wedged(struct xe_device *xe)
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{
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return atomic_read(&xe->wedged.flag);
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}
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void xe_device_declare_wedged(struct xe_device *xe);
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struct xe_file *xe_file_get(struct xe_file *xef);
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void xe_file_put(struct xe_file *xef);
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/*
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* Occasionally it is seen that the G2H worker starts running after a delay of more than
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* a second even after being queued and activated by the Linux workqueue subsystem. This
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* leads to G2H timeout error. The root cause of issue lies with scheduling latency of
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* Lunarlake Hybrid CPU. Issue disappears if we disable Lunarlake atom cores from BIOS
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* and this is beyond xe kmd.
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*
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* TODO: Drop this change once workqueue scheduling delay issue is fixed on LNL Hybrid CPU.
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*/
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#define LNL_FLUSH_WORKQUEUE(wq__) \
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flush_workqueue(wq__)
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#define LNL_FLUSH_WORK(wrk__) \
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flush_work(wrk__)
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#endif
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